i965: Enable ARB_gpu_shader_int64 on Gen8+
[mesa.git] / src / mesa / drivers / dri / i965 / brw_multisample_state.h
1 /*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdint.h>
25
26 /**
27 * Note: There are no standard multisample positions defined in OpenGL
28 * specifications. Implementations have the freedom to pick the positions
29 * which give plausible results. But the Vulkan specification does define
30 * standard sample positions. So, we decided to pick the same pattern in
31 * OpenGL as in Vulkan to keep it uniform across drivers and also to avoid
32 * breaking applications which rely on this standard pattern.
33 */
34
35 /**
36 * 1x MSAA has a single sample at the center: (0.5, 0.5) -> (0x8, 0x8).
37 *
38 * 2x MSAA sample positions are (0.25, 0.25) and (0.75, 0.75):
39 * 4 c
40 * 4 0
41 * c 1
42 */
43 static const uint32_t
44 brw_multisample_positions_1x_2x = 0x0088cc44;
45
46 /**
47 * Sample positions:
48 * 2 6 a e
49 * 2 0
50 * 6 1
51 * a 2
52 * e 3
53 */
54 static const uint32_t
55 brw_multisample_positions_4x = 0xae2ae662;
56
57 /**
58 * Sample positions:
59 *
60 * From the Ivy Bridge PRM, Vol2 Part1 p304 (3DSTATE_MULTISAMPLE:
61 * Programming Notes):
62 * "When programming the sample offsets (for NUMSAMPLES_4 or _8 and
63 * MSRASTMODE_xxx_PATTERN), the order of the samples 0 to 3 (or 7
64 * for 8X) must have monotonically increasing distance from the
65 * pixel center. This is required to get the correct centroid
66 * computation in the device."
67 *
68 * Sample positions:
69 * 1 3 5 7 9 b d f
70 * 1 7
71 * 3 3
72 * 5 0
73 * 7 5
74 * 9 2
75 * b 1
76 * d 4
77 * f 6
78 */
79 static const uint32_t
80 brw_multisample_positions_8x[] = { 0x53d97b95, 0xf1bf173d };
81
82 /**
83 * Sample positions:
84 *
85 * 0 1 2 3 4 5 6 7 8 9 a b c d e f
86 * 0 15
87 * 1 9
88 * 2 10
89 * 3 7
90 * 4 13
91 * 5 1
92 * 6 4
93 * 7 3
94 * 8 12
95 * 9 0
96 * a 2
97 * b 6
98 * c 11
99 * d 5
100 * e 8
101 * f 14
102 */
103 static const uint32_t
104 brw_multisample_positions_16x[] = {
105 0xc75a7599, 0xb3dbad36, 0x2c42816e, 0x10eff408
106 };