Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / mesa / drivers / dri / i965 / brw_nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_nir.h"
25 #include "glsl/glsl_parser_extras.h"
26 #include "glsl/nir/glsl_to_nir.h"
27 #include "program/prog_to_nir.h"
28
29 static void
30 nir_optimize(nir_shader *nir, bool is_scalar)
31 {
32 bool progress;
33 do {
34 progress = false;
35 nir_lower_vars_to_ssa(nir);
36 nir_validate_shader(nir);
37
38 if (is_scalar) {
39 nir_lower_alu_to_scalar(nir);
40 nir_validate_shader(nir);
41 }
42
43 progress |= nir_copy_prop(nir);
44 nir_validate_shader(nir);
45
46 if (is_scalar) {
47 nir_lower_phis_to_scalar(nir);
48 nir_validate_shader(nir);
49 }
50
51 progress |= nir_copy_prop(nir);
52 nir_validate_shader(nir);
53 progress |= nir_opt_dce(nir);
54 nir_validate_shader(nir);
55 progress |= nir_opt_cse(nir);
56 nir_validate_shader(nir);
57 progress |= nir_opt_peephole_select(nir);
58 nir_validate_shader(nir);
59 progress |= nir_opt_algebraic(nir);
60 nir_validate_shader(nir);
61 progress |= nir_opt_constant_folding(nir);
62 nir_validate_shader(nir);
63 progress |= nir_opt_remove_phis(nir);
64 nir_validate_shader(nir);
65 } while (progress);
66 }
67
68 nir_shader *
69 brw_create_nir(struct brw_context *brw,
70 const struct gl_shader_program *shader_prog,
71 const struct gl_program *prog,
72 gl_shader_stage stage,
73 bool is_scalar)
74 {
75 struct gl_context *ctx = &brw->ctx;
76 const nir_shader_compiler_options *options =
77 ctx->Const.ShaderCompilerOptions[stage].NirOptions;
78 struct gl_shader *shader = shader_prog ? shader_prog->_LinkedShaders[stage] : NULL;
79 nir_shader *nir;
80
81 /* First, lower the GLSL IR or Mesa IR to NIR */
82 if (shader_prog) {
83 nir = glsl_to_nir(shader, options);
84 } else {
85 nir = prog_to_nir(prog, options);
86 nir_convert_to_ssa(nir); /* turn registers into SSA */
87 }
88 nir_validate_shader(nir);
89
90 brw_process_nir(nir, brw->intelScreen->devinfo, shader_prog, stage, is_scalar);
91
92 static GLuint msg_id = 0;
93 _mesa_gl_debug(&brw->ctx, &msg_id,
94 MESA_DEBUG_SOURCE_SHADER_COMPILER,
95 MESA_DEBUG_TYPE_OTHER,
96 MESA_DEBUG_SEVERITY_NOTIFICATION,
97 "%s NIR shader:\n",
98 _mesa_shader_stage_to_abbrev(stage));
99
100 return nir;
101 }
102
103 void
104 brw_process_nir(nir_shader *nir,
105 const struct brw_device_info *devinfo,
106 const struct gl_shader_program *shader_prog,
107 gl_shader_stage stage, bool is_scalar)
108 {
109 bool debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage);
110
111 nir_lower_global_vars_to_local(nir);
112 nir_validate_shader(nir);
113
114 nir_lower_tex_projector(nir);
115 nir_validate_shader(nir);
116
117 nir_normalize_cubemap_coords(nir);
118 nir_validate_shader(nir);
119
120 nir_split_var_copies(nir);
121 nir_validate_shader(nir);
122
123 nir_optimize(nir, is_scalar);
124
125 /* Lower a bunch of stuff */
126 nir_lower_var_copies(nir);
127 nir_validate_shader(nir);
128
129 /* Get rid of split copies */
130 nir_optimize(nir, is_scalar);
131
132 if (is_scalar) {
133 nir_assign_var_locations_direct_first(nir, &nir->uniforms,
134 &nir->num_direct_uniforms,
135 &nir->num_uniforms,
136 is_scalar);
137 nir_assign_var_locations(&nir->outputs, &nir->num_outputs, is_scalar);
138 } else {
139 nir_assign_var_locations(&nir->uniforms,
140 &nir->num_uniforms,
141 is_scalar);
142
143 foreach_list_typed(nir_variable, var, node, &nir->outputs)
144 var->data.driver_location = var->data.location;
145 }
146 nir_assign_var_locations(&nir->inputs, &nir->num_inputs, is_scalar);
147
148 nir_lower_io(nir, is_scalar);
149
150 nir_validate_shader(nir);
151
152 nir_remove_dead_variables(nir);
153 nir_validate_shader(nir);
154
155 if (shader_prog) {
156 nir_lower_samplers(nir, shader_prog, stage);
157 } else {
158 nir_lower_samplers_for_vk(nir);
159 }
160 nir_validate_shader(nir);
161
162 nir_lower_system_values(nir);
163 nir_validate_shader(nir);
164
165 nir_lower_atomics(nir);
166 nir_validate_shader(nir);
167
168 nir_optimize(nir, is_scalar);
169
170 if (devinfo->gen >= 6) {
171 /* Try and fuse multiply-adds */
172 nir_opt_peephole_ffma(nir);
173 nir_validate_shader(nir);
174 }
175
176 nir_opt_algebraic_late(nir);
177 nir_validate_shader(nir);
178
179 nir_lower_locals_to_regs(nir);
180 nir_validate_shader(nir);
181
182 nir_lower_to_source_mods(nir);
183 nir_validate_shader(nir);
184 nir_copy_prop(nir);
185 nir_validate_shader(nir);
186 nir_opt_dce(nir);
187 nir_validate_shader(nir);
188
189 if (unlikely(debug_enabled)) {
190 /* Re-index SSA defs so we print more sensible numbers. */
191 nir_foreach_overload(nir, overload) {
192 if (overload->impl)
193 nir_index_ssa_defs(overload->impl);
194 }
195
196 fprintf(stderr, "NIR (SSA form) for %s shader:\n",
197 _mesa_shader_stage_to_string(stage));
198 nir_print_shader(nir, stderr);
199 }
200
201 nir_convert_from_ssa(nir, is_scalar);
202 nir_validate_shader(nir);
203
204 if (!is_scalar) {
205 nir_lower_vec_to_movs(nir);
206 nir_validate_shader(nir);
207 }
208
209 /* This is the last pass we run before we start emitting stuff. It
210 * determines when we need to insert boolean resolves on Gen <= 5. We
211 * run it last because it stashes data in instr->pass_flags and we don't
212 * want that to be squashed by other NIR passes.
213 */
214 if (devinfo->gen <= 5)
215 brw_nir_analyze_boolean_resolves(nir);
216
217 nir_sweep(nir);
218
219 if (unlikely(debug_enabled)) {
220 fprintf(stderr, "NIR (final form) for %s shader:\n",
221 _mesa_shader_stage_to_string(stage));
222 nir_print_shader(nir, stderr);
223 }
224 }
225
226 enum brw_reg_type
227 brw_type_for_nir_type(nir_alu_type type)
228 {
229 switch (type) {
230 case nir_type_unsigned:
231 return BRW_REGISTER_TYPE_UD;
232 case nir_type_bool:
233 case nir_type_int:
234 return BRW_REGISTER_TYPE_D;
235 case nir_type_float:
236 return BRW_REGISTER_TYPE_F;
237 default:
238 unreachable("unknown type");
239 }
240
241 return BRW_REGISTER_TYPE_F;
242 }
243
244 /* Returns the glsl_base_type corresponding to a nir_alu_type.
245 * This is used by both brw_vec4_nir and brw_fs_nir.
246 */
247 enum glsl_base_type
248 brw_glsl_base_type_for_nir_type(nir_alu_type type)
249 {
250 switch (type) {
251 case nir_type_float:
252 return GLSL_TYPE_FLOAT;
253
254 case nir_type_int:
255 return GLSL_TYPE_INT;
256
257 case nir_type_unsigned:
258 return GLSL_TYPE_UINT;
259
260 default:
261 unreachable("bad type");
262 }
263 }