i965/nir: Move brw_type_for_nir_type() to brw_nir to allow reuse
[mesa.git] / src / mesa / drivers / dri / i965 / brw_nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_nir.h"
25 #include "glsl/glsl_parser_extras.h"
26 #include "glsl/nir/glsl_to_nir.h"
27 #include "program/prog_to_nir.h"
28
29 static void
30 nir_optimize(nir_shader *nir)
31 {
32 bool progress;
33 do {
34 progress = false;
35 nir_lower_vars_to_ssa(nir);
36 nir_validate_shader(nir);
37 nir_lower_alu_to_scalar(nir);
38 nir_validate_shader(nir);
39 progress |= nir_copy_prop(nir);
40 nir_validate_shader(nir);
41 nir_lower_phis_to_scalar(nir);
42 nir_validate_shader(nir);
43 progress |= nir_copy_prop(nir);
44 nir_validate_shader(nir);
45 progress |= nir_opt_dce(nir);
46 nir_validate_shader(nir);
47 progress |= nir_opt_cse(nir);
48 nir_validate_shader(nir);
49 progress |= nir_opt_peephole_select(nir);
50 nir_validate_shader(nir);
51 progress |= nir_opt_algebraic(nir);
52 nir_validate_shader(nir);
53 progress |= nir_opt_constant_folding(nir);
54 nir_validate_shader(nir);
55 progress |= nir_opt_remove_phis(nir);
56 nir_validate_shader(nir);
57 } while (progress);
58 }
59
60 nir_shader *
61 brw_create_nir(struct brw_context *brw,
62 const struct gl_shader_program *shader_prog,
63 const struct gl_program *prog,
64 gl_shader_stage stage,
65 bool is_scalar)
66 {
67 struct gl_context *ctx = &brw->ctx;
68 const nir_shader_compiler_options *options =
69 ctx->Const.ShaderCompilerOptions[stage].NirOptions;
70 struct gl_shader *shader = shader_prog ? shader_prog->_LinkedShaders[stage] : NULL;
71 bool debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage);
72 nir_shader *nir;
73
74 /* First, lower the GLSL IR or Mesa IR to NIR */
75 if (shader_prog) {
76 nir = glsl_to_nir(shader, options);
77 } else {
78 nir = prog_to_nir(prog, options);
79 nir_convert_to_ssa(nir); /* turn registers into SSA */
80 }
81 nir_validate_shader(nir);
82
83 nir_lower_global_vars_to_local(nir);
84 nir_validate_shader(nir);
85
86 nir_lower_tex_projector(nir);
87 nir_validate_shader(nir);
88
89 nir_normalize_cubemap_coords(nir);
90 nir_validate_shader(nir);
91
92 nir_split_var_copies(nir);
93 nir_validate_shader(nir);
94
95 nir_optimize(nir);
96
97 /* Lower a bunch of stuff */
98 nir_lower_var_copies(nir);
99 nir_validate_shader(nir);
100
101 /* Get rid of split copies */
102 nir_optimize(nir);
103
104 if (is_scalar) {
105 nir_assign_var_locations_direct_first(nir, &nir->uniforms,
106 &nir->num_direct_uniforms,
107 &nir->num_uniforms,
108 is_scalar);
109 } else {
110 nir_assign_var_locations(&nir->uniforms,
111 &nir->num_uniforms,
112 is_scalar);
113 }
114 nir_assign_var_locations(&nir->inputs, &nir->num_inputs, is_scalar);
115 nir_assign_var_locations(&nir->outputs, &nir->num_outputs, is_scalar);
116
117 nir_lower_io(nir, is_scalar);
118
119 nir_validate_shader(nir);
120
121 nir_remove_dead_variables(nir);
122 nir_validate_shader(nir);
123
124 if (shader_prog) {
125 nir_lower_samplers(nir, shader_prog, stage);
126 nir_validate_shader(nir);
127 }
128
129 nir_lower_system_values(nir);
130 nir_validate_shader(nir);
131
132 nir_lower_atomics(nir);
133 nir_validate_shader(nir);
134
135 nir_optimize(nir);
136
137 if (brw->gen >= 6) {
138 /* Try and fuse multiply-adds */
139 nir_opt_peephole_ffma(nir);
140 nir_validate_shader(nir);
141 }
142
143 nir_opt_algebraic_late(nir);
144 nir_validate_shader(nir);
145
146 nir_lower_locals_to_regs(nir);
147 nir_validate_shader(nir);
148
149 nir_lower_to_source_mods(nir);
150 nir_validate_shader(nir);
151 nir_copy_prop(nir);
152 nir_validate_shader(nir);
153 nir_opt_dce(nir);
154 nir_validate_shader(nir);
155
156 if (unlikely(debug_enabled)) {
157 /* Re-index SSA defs so we print more sensible numbers. */
158 nir_foreach_overload(nir, overload) {
159 if (overload->impl)
160 nir_index_ssa_defs(overload->impl);
161 }
162
163 fprintf(stderr, "NIR (SSA form) for %s shader:\n",
164 _mesa_shader_stage_to_string(stage));
165 nir_print_shader(nir, stderr);
166 }
167
168 nir_convert_from_ssa(nir, is_scalar);
169 nir_validate_shader(nir);
170
171 /* This is the last pass we run before we start emitting stuff. It
172 * determines when we need to insert boolean resolves on Gen <= 5. We
173 * run it last because it stashes data in instr->pass_flags and we don't
174 * want that to be squashed by other NIR passes.
175 */
176 if (brw->gen <= 5)
177 brw_nir_analyze_boolean_resolves(nir);
178
179 nir_sweep(nir);
180
181 if (unlikely(debug_enabled)) {
182 fprintf(stderr, "NIR (final form) for %s shader:\n",
183 _mesa_shader_stage_to_string(stage));
184 nir_print_shader(nir, stderr);
185 }
186
187 return nir;
188 }
189
190 enum brw_reg_type
191 brw_type_for_nir_type(nir_alu_type type)
192 {
193 switch (type) {
194 case nir_type_unsigned:
195 return BRW_REGISTER_TYPE_UD;
196 case nir_type_bool:
197 case nir_type_int:
198 return BRW_REGISTER_TYPE_D;
199 case nir_type_float:
200 return BRW_REGISTER_TYPE_F;
201 default:
202 unreachable("unknown type");
203 }
204
205 return BRW_REGISTER_TYPE_F;
206 }