src/mesa/drivers/dri/i965/brw_nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_nir.h"
  25 #include "brw_shader.h"
  26 #include "glsl/glsl_parser_extras.h"
  27 #include "glsl/nir/glsl_to_nir.h"
  28 #include "program/prog_to_nir.h"
  29
  30 static void
  31 brw_nir_lower_inputs(nir_shader *nir,
  32                      const struct gl_program *prog,
  33                      bool is_scalar)
  34 {
  35    nir_assign_var_locations(&nir->inputs, &nir->num_inputs,
  36                             is_scalar ? type_size_scalar : type_size_vec4);
  37 }
  38
  39 static void
  40 brw_nir_lower_outputs(nir_shader *nir, bool is_scalar)
  41 {
  42    if (is_scalar) {
  43       nir_assign_var_locations(&nir->outputs, &nir->num_outputs, type_size_scalar);
  44    } else {
  45       foreach_list_typed(nir_variable, var, node, &nir->outputs)
  46          var->data.driver_location = var->data.location;
  47    }
  48 }
  49
  50 static void
  51 nir_optimize(nir_shader *nir, bool is_scalar)
  52 {
  53    bool progress;
  54    do {
  55       progress = false;
  56       nir_lower_vars_to_ssa(nir);
  57       nir_validate_shader(nir);
  58
  59       if (is_scalar) {
  60          nir_lower_alu_to_scalar(nir);
  61          nir_validate_shader(nir);
  62       }
  63
  64       progress |= nir_copy_prop(nir);
  65       nir_validate_shader(nir);
  66
  67       if (is_scalar) {
  68          nir_lower_phis_to_scalar(nir);
  69          nir_validate_shader(nir);
  70       }
  71
  72       progress |= nir_copy_prop(nir);
  73       nir_validate_shader(nir);
  74       progress |= nir_opt_dce(nir);
  75       nir_validate_shader(nir);
  76       progress |= nir_opt_cse(nir);
  77       nir_validate_shader(nir);
  78       progress |= nir_opt_peephole_select(nir);
  79       nir_validate_shader(nir);
  80       progress |= nir_opt_algebraic(nir);
  81       nir_validate_shader(nir);
  82       progress |= nir_opt_constant_folding(nir);
  83       nir_validate_shader(nir);
  84       progress |= nir_opt_dead_cf(nir);
  85       nir_validate_shader(nir);
  86       progress |= nir_opt_remove_phis(nir);
  87       nir_validate_shader(nir);
  88       progress |= nir_opt_undef(nir);
  89       nir_validate_shader(nir);
  90    } while (progress);
  91 }
  92
  93 nir_shader *
  94 brw_create_nir(struct brw_context *brw,
  95                const struct gl_shader_program *shader_prog,
  96                const struct gl_program *prog,
  97                gl_shader_stage stage,
  98                bool is_scalar)
  99 {
 100    struct gl_context *ctx = &brw->ctx;
 101    const nir_shader_compiler_options *options =
 102       ctx->Const.ShaderCompilerOptions[stage].NirOptions;
 103    static const nir_lower_tex_options tex_options = {
 104       .lower_txp = ~0,
 105    };
 106    bool debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage);
 107    nir_shader *nir;
 108
 109    /* First, lower the GLSL IR or Mesa IR to NIR */
 110    if (shader_prog) {
 111       nir = glsl_to_nir(shader_prog, stage, options);
 112    } else {
 113       nir = prog_to_nir(prog, options);
 114       nir_convert_to_ssa(nir); /* turn registers into SSA */
 115    }
 116    nir_validate_shader(nir);
 117
 118    if (stage == MESA_SHADER_GEOMETRY) {
 119       nir_lower_gs_intrinsics(nir);
 120       nir_validate_shader(nir);
 121    }
 122
 123    nir_lower_global_vars_to_local(nir);
 124    nir_validate_shader(nir);
 125
 126    nir_lower_tex(nir, &tex_options);
 127    nir_validate_shader(nir);
 128
 129    nir_normalize_cubemap_coords(nir);
 130    nir_validate_shader(nir);
 131
 132    nir_split_var_copies(nir);
 133    nir_validate_shader(nir);
 134
 135    nir_optimize(nir, is_scalar);
 136
 137    /* Lower a bunch of stuff */
 138    nir_lower_var_copies(nir);
 139    nir_validate_shader(nir);
 140
 141    /* Get rid of split copies */
 142    nir_optimize(nir, is_scalar);
 143
 144    brw_nir_lower_inputs(nir, prog, is_scalar);
 145    brw_nir_lower_outputs(nir, is_scalar);
 146    nir_assign_var_locations(&nir->uniforms,
 147                             &nir->num_uniforms,
 148                             is_scalar ? type_size_scalar : type_size_vec4);
 149    nir_lower_io(nir, -1, is_scalar ? type_size_scalar : type_size_vec4);
 150    nir_validate_shader(nir);
 151
 152    nir_remove_dead_variables(nir);
 153    nir_validate_shader(nir);
 154
 155    if (shader_prog) {
 156       nir_lower_samplers(nir, shader_prog);
 157       nir_validate_shader(nir);
 158    }
 159
 160    nir_lower_system_values(nir);
 161    nir_validate_shader(nir);
 162
 163    nir_lower_atomics(nir);
 164    nir_validate_shader(nir);
 165
 166    nir_optimize(nir, is_scalar);
 167
 168    if (brw->gen >= 6) {
 169       /* Try and fuse multiply-adds */
 170       nir_opt_peephole_ffma(nir);
 171       nir_validate_shader(nir);
 172    }
 173
 174    nir_opt_algebraic_late(nir);
 175    nir_validate_shader(nir);
 176
 177    nir_lower_locals_to_regs(nir);
 178    nir_validate_shader(nir);
 179
 180    nir_lower_to_source_mods(nir);
 181    nir_validate_shader(nir);
 182    nir_copy_prop(nir);
 183    nir_validate_shader(nir);
 184    nir_opt_dce(nir);
 185    nir_validate_shader(nir);
 186
 187    if (unlikely(debug_enabled)) {
 188       /* Re-index SSA defs so we print more sensible numbers. */
 189       nir_foreach_overload(nir, overload) {
 190          if (overload->impl)
 191             nir_index_ssa_defs(overload->impl);
 192       }
 193
 194       fprintf(stderr, "NIR (SSA form) for %s shader:\n",
 195               _mesa_shader_stage_to_string(stage));
 196       nir_print_shader(nir, stderr);
 197    }
 198
 199    nir_convert_from_ssa(nir, true);
 200    nir_validate_shader(nir);
 201
 202    if (!is_scalar) {
 203       nir_move_vec_src_uses_to_dest(nir);
 204       nir_validate_shader(nir);
 205
 206       nir_lower_vec_to_movs(nir);
 207       nir_validate_shader(nir);
 208    }
 209
 210    /* This is the last pass we run before we start emitting stuff.  It
 211     * determines when we need to insert boolean resolves on Gen <= 5.  We
 212     * run it last because it stashes data in instr->pass_flags and we don't
 213     * want that to be squashed by other NIR passes.
 214     */
 215    if (brw->gen <= 5)
 216       brw_nir_analyze_boolean_resolves(nir);
 217
 218    nir_sweep(nir);
 219
 220    if (unlikely(debug_enabled)) {
 221       fprintf(stderr, "NIR (final form) for %s shader:\n",
 222               _mesa_shader_stage_to_string(stage));
 223       nir_print_shader(nir, stderr);
 224    }
 225
 226    return nir;
 227 }
 228
 229 enum brw_reg_type
 230 brw_type_for_nir_type(nir_alu_type type)
 231 {
 232    switch (type) {
 233    case nir_type_unsigned:
 234       return BRW_REGISTER_TYPE_UD;
 235    case nir_type_bool:
 236    case nir_type_int:
 237       return BRW_REGISTER_TYPE_D;
 238    case nir_type_float:
 239       return BRW_REGISTER_TYPE_F;
 240    default:
 241       unreachable("unknown type");
 242    }
 243
 244    return BRW_REGISTER_TYPE_F;
 245 }
 246
 247 /* Returns the glsl_base_type corresponding to a nir_alu_type.
 248  * This is used by both brw_vec4_nir and brw_fs_nir.
 249  */
 250 enum glsl_base_type
 251 brw_glsl_base_type_for_nir_type(nir_alu_type type)
 252 {
 253    switch (type) {
 254    case nir_type_float:
 255       return GLSL_TYPE_FLOAT;
 256
 257    case nir_type_int:
 258       return GLSL_TYPE_INT;
 259
 260    case nir_type_unsigned:
 261       return GLSL_TYPE_UINT;
 262
 263    default:
 264       unreachable("bad type");
 265    }
 266 }