src/mesa/drivers/dri/i965/brw_nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_nir.h"
  25 #include "brw_shader.h"
  26 #include "glsl/glsl_parser_extras.h"
  27 #include "glsl/nir/glsl_to_nir.h"
  28 #include "program/prog_to_nir.h"
  29
  30 static void
  31 nir_optimize(nir_shader *nir, bool is_scalar)
  32 {
  33    bool progress;
  34    do {
  35       progress = false;
  36       nir_lower_vars_to_ssa(nir);
  37       nir_validate_shader(nir);
  38
  39       if (is_scalar) {
  40          nir_lower_alu_to_scalar(nir);
  41          nir_validate_shader(nir);
  42       }
  43
  44       progress |= nir_copy_prop(nir);
  45       nir_validate_shader(nir);
  46
  47       if (is_scalar) {
  48          nir_lower_phis_to_scalar(nir);
  49          nir_validate_shader(nir);
  50       }
  51
  52       progress |= nir_copy_prop(nir);
  53       nir_validate_shader(nir);
  54       progress |= nir_opt_dce(nir);
  55       nir_validate_shader(nir);
  56       progress |= nir_opt_cse(nir);
  57       nir_validate_shader(nir);
  58       progress |= nir_opt_peephole_select(nir);
  59       nir_validate_shader(nir);
  60       progress |= nir_opt_algebraic(nir);
  61       nir_validate_shader(nir);
  62       progress |= nir_opt_constant_folding(nir);
  63       nir_validate_shader(nir);
  64       progress |= nir_opt_remove_phis(nir);
  65       nir_validate_shader(nir);
  66       progress |= nir_opt_undef(nir);
  67       nir_validate_shader(nir);
  68    } while (progress);
  69 }
  70
  71 nir_shader *
  72 brw_create_nir(struct brw_context *brw,
  73                const struct gl_shader_program *shader_prog,
  74                const struct gl_program *prog,
  75                gl_shader_stage stage,
  76                bool is_scalar)
  77 {
  78    struct gl_context *ctx = &brw->ctx;
  79    const nir_shader_compiler_options *options =
  80       ctx->Const.ShaderCompilerOptions[stage].NirOptions;
  81    struct gl_shader *shader = shader_prog ? shader_prog->_LinkedShaders[stage] : NULL;
  82    nir_shader *nir;
  83
  84    /* First, lower the GLSL IR or Mesa IR to NIR */
  85    if (shader_prog) {
  86       nir = glsl_to_nir(shader, options);
  87    } else {
  88       nir = prog_to_nir(prog, options);
  89       nir_convert_to_ssa(nir); /* turn registers into SSA */
  90    }
  91    nir_validate_shader(nir);
  92
  93    brw_process_nir(nir, brw->intelScreen->devinfo, shader_prog, stage, is_scalar);
  94
  95    static GLuint msg_id = 0;
  96    _mesa_gl_debug(&brw->ctx, &msg_id,
  97                   MESA_DEBUG_SOURCE_SHADER_COMPILER,
  98                   MESA_DEBUG_TYPE_OTHER,
  99                   MESA_DEBUG_SEVERITY_NOTIFICATION,
 100                   "%s NIR shader:\n",
 101                   _mesa_shader_stage_to_abbrev(stage));
 102
 103    return nir;
 104 }
 105
 106 void
 107 brw_process_nir(nir_shader *nir,
 108                 const struct brw_device_info *devinfo,
 109                 const struct gl_shader_program *shader_prog,
 110                 gl_shader_stage stage, bool is_scalar)
 111 {
 112    bool debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage);
 113
 114    nir_lower_global_vars_to_local(nir);
 115    nir_validate_shader(nir);
 116
 117    nir_lower_tex_projector(nir);
 118    nir_validate_shader(nir);
 119
 120    nir_normalize_cubemap_coords(nir);
 121    nir_validate_shader(nir);
 122
 123    nir_split_var_copies(nir);
 124    nir_validate_shader(nir);
 125
 126    nir_optimize(nir, is_scalar);
 127
 128    /* Lower a bunch of stuff */
 129    nir_lower_var_copies(nir);
 130    nir_validate_shader(nir);
 131
 132    /* Get rid of split copies */
 133    nir_optimize(nir, is_scalar);
 134
 135    if (is_scalar) {
 136       nir_assign_var_locations(&nir->uniforms,
 137                                &nir->num_uniforms,
 138                                type_size_scalar);
 139       nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_scalar);
 140       nir_assign_var_locations(&nir->outputs, &nir->num_outputs, type_size_scalar);
 141       nir_lower_io(nir, type_size_scalar);
 142    } else {
 143       nir_assign_var_locations(&nir->uniforms,
 144                                &nir->num_uniforms,
 145                                type_size_vec4);
 146
 147       nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_vec4);
 148
 149       foreach_list_typed(nir_variable, var, node, &nir->outputs)
 150          var->data.driver_location = var->data.location;
 151
 152       nir_lower_io(nir, type_size_vec4);
 153    }
 154
 155    nir_validate_shader(nir);
 156
 157    nir_remove_dead_variables(nir);
 158    nir_validate_shader(nir);
 159
 160    if (shader_prog) {
 161       nir_lower_samplers(nir, shader_prog);
 162    } else {
 163       nir_lower_samplers_for_vk(nir);
 164    }
 165    nir_validate_shader(nir);
 166
 167    nir_lower_system_values(nir);
 168    nir_validate_shader(nir);
 169
 170    nir_lower_atomics(nir);
 171    nir_validate_shader(nir);
 172
 173    nir_optimize(nir, is_scalar);
 174
 175    if (devinfo->gen >= 6) {
 176       /* Try and fuse multiply-adds */
 177       nir_opt_peephole_ffma(nir);
 178       nir_validate_shader(nir);
 179    }
 180
 181    nir_opt_algebraic_late(nir);
 182    nir_validate_shader(nir);
 183
 184    nir_lower_locals_to_regs(nir);
 185    nir_validate_shader(nir);
 186
 187    nir_lower_to_source_mods(nir);
 188    nir_validate_shader(nir);
 189    nir_copy_prop(nir);
 190    nir_validate_shader(nir);
 191    nir_opt_dce(nir);
 192    nir_validate_shader(nir);
 193
 194    if (unlikely(debug_enabled)) {
 195       /* Re-index SSA defs so we print more sensible numbers. */
 196       nir_foreach_overload(nir, overload) {
 197          if (overload->impl)
 198             nir_index_ssa_defs(overload->impl);
 199       }
 200
 201       fprintf(stderr, "NIR (SSA form) for %s shader:\n",
 202               _mesa_shader_stage_to_string(stage));
 203       nir_print_shader(nir, stderr);
 204    }
 205
 206    nir_convert_from_ssa(nir, is_scalar);
 207    nir_validate_shader(nir);
 208
 209    if (!is_scalar) {
 210       nir_lower_vec_to_movs(nir);
 211       nir_validate_shader(nir);
 212    }
 213
 214    /* This is the last pass we run before we start emitting stuff.  It
 215     * determines when we need to insert boolean resolves on Gen <= 5.  We
 216     * run it last because it stashes data in instr->pass_flags and we don't
 217     * want that to be squashed by other NIR passes.
 218     */
 219    if (devinfo->gen <= 5)
 220       brw_nir_analyze_boolean_resolves(nir);
 221
 222    nir_sweep(nir);
 223
 224    if (unlikely(debug_enabled)) {
 225       fprintf(stderr, "NIR (final form) for %s shader:\n",
 226               _mesa_shader_stage_to_string(stage));
 227       nir_print_shader(nir, stderr);
 228    }
 229 }
 230
 231 enum brw_reg_type
 232 brw_type_for_nir_type(nir_alu_type type)
 233 {
 234    switch (type) {
 235    case nir_type_unsigned:
 236       return BRW_REGISTER_TYPE_UD;
 237    case nir_type_bool:
 238    case nir_type_int:
 239       return BRW_REGISTER_TYPE_D;
 240    case nir_type_float:
 241       return BRW_REGISTER_TYPE_F;
 242    default:
 243       unreachable("unknown type");
 244    }
 245
 246    return BRW_REGISTER_TYPE_F;
 247 }
 248
 249 /* Returns the glsl_base_type corresponding to a nir_alu_type.
 250  * This is used by both brw_vec4_nir and brw_fs_nir.
 251  */
 252 enum glsl_base_type
 253 brw_glsl_base_type_for_nir_type(nir_alu_type type)
 254 {
 255    switch (type) {
 256    case nir_type_float:
 257       return GLSL_TYPE_FLOAT;
 258
 259    case nir_type_int:
 260       return GLSL_TYPE_INT;
 261
 262    case nir_type_unsigned:
 263       return GLSL_TYPE_UINT;
 264
 265    default:
 266       unreachable("bad type");
 267    }
 268 }