i965/vec4: Use nir_move_vec_src_uses_to_dest
[mesa.git] / src / mesa / drivers / dri / i965 / brw_nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_nir.h"
25 #include "brw_shader.h"
26 #include "glsl/glsl_parser_extras.h"
27 #include "glsl/nir/glsl_to_nir.h"
28 #include "program/prog_to_nir.h"
29
30 static void
31 nir_optimize(nir_shader *nir, bool is_scalar)
32 {
33 bool progress;
34 do {
35 progress = false;
36 nir_lower_vars_to_ssa(nir);
37 nir_validate_shader(nir);
38
39 if (is_scalar) {
40 nir_lower_alu_to_scalar(nir);
41 nir_validate_shader(nir);
42 }
43
44 progress |= nir_copy_prop(nir);
45 nir_validate_shader(nir);
46
47 if (is_scalar) {
48 nir_lower_phis_to_scalar(nir);
49 nir_validate_shader(nir);
50 }
51
52 progress |= nir_copy_prop(nir);
53 nir_validate_shader(nir);
54 progress |= nir_opt_dce(nir);
55 nir_validate_shader(nir);
56 progress |= nir_opt_cse(nir);
57 nir_validate_shader(nir);
58 progress |= nir_opt_peephole_select(nir);
59 nir_validate_shader(nir);
60 progress |= nir_opt_algebraic(nir);
61 nir_validate_shader(nir);
62 progress |= nir_opt_constant_folding(nir);
63 nir_validate_shader(nir);
64 progress |= nir_opt_dead_cf(nir);
65 nir_validate_shader(nir);
66 progress |= nir_opt_remove_phis(nir);
67 nir_validate_shader(nir);
68 progress |= nir_opt_undef(nir);
69 nir_validate_shader(nir);
70 } while (progress);
71 }
72
73 nir_shader *
74 brw_create_nir(struct brw_context *brw,
75 const struct gl_shader_program *shader_prog,
76 const struct gl_program *prog,
77 gl_shader_stage stage,
78 bool is_scalar)
79 {
80 struct gl_context *ctx = &brw->ctx;
81 const nir_shader_compiler_options *options =
82 ctx->Const.ShaderCompilerOptions[stage].NirOptions;
83 struct gl_shader *shader = shader_prog ? shader_prog->_LinkedShaders[stage] : NULL;
84 bool debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage);
85 nir_shader *nir;
86
87 /* First, lower the GLSL IR or Mesa IR to NIR */
88 if (shader_prog) {
89 nir = glsl_to_nir(shader, options);
90 } else {
91 nir = prog_to_nir(prog, options);
92 nir_convert_to_ssa(nir); /* turn registers into SSA */
93 }
94 nir_validate_shader(nir);
95
96 nir_lower_global_vars_to_local(nir);
97 nir_validate_shader(nir);
98
99 nir_lower_tex_projector(nir);
100 nir_validate_shader(nir);
101
102 nir_normalize_cubemap_coords(nir);
103 nir_validate_shader(nir);
104
105 nir_split_var_copies(nir);
106 nir_validate_shader(nir);
107
108 nir_optimize(nir, is_scalar);
109
110 /* Lower a bunch of stuff */
111 nir_lower_var_copies(nir);
112 nir_validate_shader(nir);
113
114 /* Get rid of split copies */
115 nir_optimize(nir, is_scalar);
116
117 if (is_scalar) {
118 nir_assign_var_locations(&nir->uniforms,
119 &nir->num_uniforms,
120 type_size_scalar);
121 nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_scalar);
122 nir_assign_var_locations(&nir->outputs, &nir->num_outputs, type_size_scalar);
123 nir_lower_io(nir, type_size_scalar);
124 } else {
125 nir_assign_var_locations(&nir->uniforms,
126 &nir->num_uniforms,
127 type_size_vec4);
128
129 nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_vec4);
130
131 foreach_list_typed(nir_variable, var, node, &nir->outputs)
132 var->data.driver_location = var->data.location;
133
134 nir_lower_io(nir, type_size_vec4);
135 }
136
137 nir_validate_shader(nir);
138
139 nir_remove_dead_variables(nir);
140 nir_validate_shader(nir);
141
142 if (shader_prog) {
143 nir_lower_samplers(nir, shader_prog);
144 nir_validate_shader(nir);
145 }
146
147 nir_lower_system_values(nir);
148 nir_validate_shader(nir);
149
150 nir_lower_atomics(nir);
151 nir_validate_shader(nir);
152
153 nir_optimize(nir, is_scalar);
154
155 if (brw->gen >= 6) {
156 /* Try and fuse multiply-adds */
157 nir_opt_peephole_ffma(nir);
158 nir_validate_shader(nir);
159 }
160
161 nir_opt_algebraic_late(nir);
162 nir_validate_shader(nir);
163
164 nir_lower_locals_to_regs(nir);
165 nir_validate_shader(nir);
166
167 nir_lower_to_source_mods(nir);
168 nir_validate_shader(nir);
169 nir_copy_prop(nir);
170 nir_validate_shader(nir);
171 nir_opt_dce(nir);
172 nir_validate_shader(nir);
173
174 if (unlikely(debug_enabled)) {
175 /* Re-index SSA defs so we print more sensible numbers. */
176 nir_foreach_overload(nir, overload) {
177 if (overload->impl)
178 nir_index_ssa_defs(overload->impl);
179 }
180
181 fprintf(stderr, "NIR (SSA form) for %s shader:\n",
182 _mesa_shader_stage_to_string(stage));
183 nir_print_shader(nir, stderr);
184 }
185
186 nir_convert_from_ssa(nir, true);
187 nir_validate_shader(nir);
188
189 if (!is_scalar) {
190 nir_move_vec_src_uses_to_dest(nir);
191 nir_validate_shader(nir);
192
193 nir_lower_vec_to_movs(nir);
194 nir_validate_shader(nir);
195 }
196
197 /* This is the last pass we run before we start emitting stuff. It
198 * determines when we need to insert boolean resolves on Gen <= 5. We
199 * run it last because it stashes data in instr->pass_flags and we don't
200 * want that to be squashed by other NIR passes.
201 */
202 if (brw->gen <= 5)
203 brw_nir_analyze_boolean_resolves(nir);
204
205 nir_sweep(nir);
206
207 if (unlikely(debug_enabled)) {
208 fprintf(stderr, "NIR (final form) for %s shader:\n",
209 _mesa_shader_stage_to_string(stage));
210 nir_print_shader(nir, stderr);
211 }
212
213 return nir;
214 }
215
216 enum brw_reg_type
217 brw_type_for_nir_type(nir_alu_type type)
218 {
219 switch (type) {
220 case nir_type_unsigned:
221 return BRW_REGISTER_TYPE_UD;
222 case nir_type_bool:
223 case nir_type_int:
224 return BRW_REGISTER_TYPE_D;
225 case nir_type_float:
226 return BRW_REGISTER_TYPE_F;
227 default:
228 unreachable("unknown type");
229 }
230
231 return BRW_REGISTER_TYPE_F;
232 }
233
234 /* Returns the glsl_base_type corresponding to a nir_alu_type.
235 * This is used by both brw_vec4_nir and brw_fs_nir.
236 */
237 enum glsl_base_type
238 brw_glsl_base_type_for_nir_type(nir_alu_type type)
239 {
240 switch (type) {
241 case nir_type_float:
242 return GLSL_TYPE_FLOAT;
243
244 case nir_type_int:
245 return GLSL_TYPE_INT;
246
247 case nir_type_unsigned:
248 return GLSL_TYPE_UINT;
249
250 default:
251 unreachable("bad type");
252 }
253 }