src/mesa/drivers/dri/i965/brw_nir.h

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include "brw_context.h"
  27 #include "brw_reg.h"
  28 #include "compiler/nir/nir.h"
  29
  30 #ifdef __cplusplus
  31 extern "C" {
  32 #endif
  33
  34 /* Flags set in the instr->pass_flags field by i965 analysis passes */
  35 enum {
  36    BRW_NIR_NON_BOOLEAN           = 0x0,
  37
  38    /* Indicates that the given instruction's destination is a boolean
  39     * value but that it needs to be resolved before it can be used.
  40     * On Gen <= 5, CMP instructions return a 32-bit value where the bottom
  41     * bit represents the actual true/false value of the compare and the top
  42     * 31 bits are undefined.  In order to use this value, we have to do a
  43     * "resolve" operation by replacing the value of the CMP with -(x & 1)
  44     * to sign-extend the bottom bit to 0/~0.
  45     */
  46    BRW_NIR_BOOLEAN_NEEDS_RESOLVE = 0x1,
  47
  48    /* Indicates that the given instruction's destination is a boolean
  49     * value that has intentionally been left unresolved.  Not all boolean
  50     * values need to be resolved immediately.  For instance, if we have
  51     *
  52     *    CMP r1 r2 r3
  53     *    CMP r4 r5 r6
  54     *    AND r7 r1 r4
  55     *
  56     * We don't have to resolve the result of the two CMP instructions
  57     * immediately because the AND still does an AND of the bottom bits.
  58     * Instead, we can save ourselves instructions by delaying the resolve
  59     * until after the AND.  The result of the two CMP instructions is left
  60     * as BRW_NIR_BOOLEAN_UNRESOLVED.
  61     */
  62    BRW_NIR_BOOLEAN_UNRESOLVED    = 0x2,
  63
  64    /* Indicates a that the given instruction's destination is a boolean
  65     * value that does not need a resolve.  For instance, if you AND two
  66     * values that are BRW_NIR_BOOLEAN_NEEDS_RESOLVE then we know that both
  67     * values will be 0/~0 before we get them and the result of the AND is
  68     * also guaranteed to be 0/~0 and does not need a resolve.
  69     */
  70    BRW_NIR_BOOLEAN_NO_RESOLVE    = 0x3,
  71
  72    /* A mask to mask the boolean status values off of instr->pass_flags */
  73    BRW_NIR_BOOLEAN_MASK          = 0x3,
  74 };
  75
  76 void brw_nir_analyze_boolean_resolves(nir_shader *nir);
  77
  78 nir_shader *brw_create_nir(struct brw_context *brw,
  79                            const struct gl_shader_program *shader_prog,
  80                            const struct gl_program *prog,
  81                            gl_shader_stage stage,
  82                            bool is_scalar);
  83
  84 nir_shader *brw_preprocess_nir(nir_shader *nir, bool is_scalar);
  85 nir_shader *brw_nir_lower_io(nir_shader *nir,
  86                             const struct brw_device_info *devinfo,
  87                             bool is_scalar,
  88                             bool use_legacy_snorm_formula,
  89                             const uint8_t *vs_attrib_wa_flags);
  90 nir_shader *brw_postprocess_nir(nir_shader *nir,
  91                                 const struct brw_device_info *devinfo,
  92                                 bool is_scalar);
  93
  94 bool brw_nir_apply_attribute_workarounds(nir_shader *nir,
  95                                          bool use_legacy_snorm_formula,
  96                                          const uint8_t *attrib_wa_flags);
  97
  98 nir_shader *brw_nir_apply_sampler_key(nir_shader *nir,
  99                                       const struct brw_device_info *devinfo,
 100                                       const struct brw_sampler_prog_key_data *key,
 101                                       bool is_scalar);
 102
 103 enum brw_reg_type brw_type_for_nir_type(nir_alu_type type);
 104
 105 enum glsl_base_type brw_glsl_base_type_for_nir_type(nir_alu_type type);
 106
 107 void brw_nir_setup_glsl_uniforms(nir_shader *shader,
 108                                  struct gl_shader_program *shader_prog,
 109                                  const struct gl_program *prog,
 110                                  struct brw_stage_prog_data *stage_prog_data,
 111                                  bool is_scalar);
 112
 113 void brw_nir_setup_arb_uniforms(nir_shader *shader, struct gl_program *prog,
 114                                 struct brw_stage_prog_data *stage_prog_data);
 115
 116 bool brw_nir_opt_peephole_ffma(nir_shader *shader);
 117
 118 #ifdef __cplusplus
 119 }
 120 #endif