src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "compiler/brw_nir.h"
  25 #include "compiler/glsl/ir_uniform.h"
  26 #include "brw_program.h"
  27
  28 static void
  29 brw_nir_setup_glsl_builtin_uniform(nir_variable *var,
  30                                    const struct gl_program *prog,
  31                                    struct brw_stage_prog_data *stage_prog_data,
  32                                    bool is_scalar)
  33 {
  34    const nir_state_slot *const slots = var->state_slots;
  35    assert(var->state_slots != NULL);
  36
  37    unsigned uniform_index = var->data.driver_location / 4;
  38    for (unsigned int i = 0; i < var->num_state_slots; i++) {
  39       /* This state reference has already been setup by ir_to_mesa, but we'll
  40        * get the same index back here.
  41        */
  42       int index = _mesa_add_state_reference(prog->Parameters,
  43                                             slots[i].tokens);
  44
  45       /* Add each of the unique swizzles of the element as a parameter.
  46        * This'll end up matching the expected layout of the
  47        * array/matrix/structure we're trying to fill in.
  48        */
  49       int last_swiz = -1;
  50       for (unsigned j = 0; j < 4; j++) {
  51          int swiz = GET_SWZ(slots[i].swizzle, j);
  52
  53          /* If we hit a pair of identical swizzles, this means we've hit the
  54           * end of the builtin variable.  In scalar mode, we should just quit
  55           * and move on to the next one.  In vec4, we need to continue and pad
  56           * it out to 4 components.
  57           */
  58          if (swiz == last_swiz && is_scalar)
  59             break;
  60
  61          last_swiz = swiz;
  62
  63          stage_prog_data->param[uniform_index++] =
  64             BRW_PARAM_PARAMETER(index, swiz);
  65       }
  66    }
  67 }
  68
  69 static void
  70 setup_vec4_image_param(uint32_t *params, uint32_t idx,
  71                        unsigned offset, unsigned n)
  72 {
  73    assert(offset % sizeof(uint32_t) == 0);
  74    for (unsigned i = 0; i < n; ++i)
  75       params[i] = BRW_PARAM_IMAGE(idx, offset / sizeof(uint32_t) + i);
  76
  77    for (unsigned i = n; i < 4; ++i)
  78       params[i] = BRW_PARAM_BUILTIN_ZERO;
  79 }
  80
  81 static void
  82 brw_setup_image_uniform_values(gl_shader_stage stage,
  83                                struct brw_stage_prog_data *stage_prog_data,
  84                                unsigned param_start_index,
  85                                const gl_uniform_storage *storage)
  86 {
  87    uint32_t *param = &stage_prog_data->param[param_start_index];
  88
  89    for (unsigned i = 0; i < MAX2(storage->array_elements, 1); i++) {
  90       const unsigned image_idx = storage->opaque[stage].index + i;
  91
  92       /* Upload the brw_image_param structure.  The order is expected to match
  93        * the BRW_IMAGE_PARAM_*_OFFSET defines.
  94        */
  95       setup_vec4_image_param(param + BRW_IMAGE_PARAM_SURFACE_IDX_OFFSET,
  96                              image_idx,
  97                              offsetof(brw_image_param, surface_idx), 1);
  98       setup_vec4_image_param(param + BRW_IMAGE_PARAM_OFFSET_OFFSET,
  99                              image_idx,
 100                              offsetof(brw_image_param, offset), 2);
 101       setup_vec4_image_param(param + BRW_IMAGE_PARAM_SIZE_OFFSET,
 102                              image_idx,
 103                              offsetof(brw_image_param, size), 3);
 104       setup_vec4_image_param(param + BRW_IMAGE_PARAM_STRIDE_OFFSET,
 105                              image_idx,
 106                              offsetof(brw_image_param, stride), 4);
 107       setup_vec4_image_param(param + BRW_IMAGE_PARAM_TILING_OFFSET,
 108                              image_idx,
 109                              offsetof(brw_image_param, tiling), 3);
 110       setup_vec4_image_param(param + BRW_IMAGE_PARAM_SWIZZLING_OFFSET,
 111                              image_idx,
 112                              offsetof(brw_image_param, swizzling), 2);
 113       param += BRW_IMAGE_PARAM_SIZE;
 114
 115       brw_mark_surface_used(
 116          stage_prog_data,
 117          stage_prog_data->binding_table.image_start + image_idx);
 118    }
 119 }
 120
 121 static unsigned
 122 count_uniform_storage_slots(const struct glsl_type *type)
 123 {
 124    /* gl_uniform_storage can cope with one level of array, so if the
 125     * type is a composite type or an array where each element occupies
 126     * more than one slot than we need to recursively process it.
 127     */
 128    if (glsl_type_is_struct(type)) {
 129       unsigned location_count = 0;
 130
 131       for (unsigned i = 0; i < glsl_get_length(type); i++) {
 132          const struct glsl_type *field_type = glsl_get_struct_field(type, i);
 133
 134          location_count += count_uniform_storage_slots(field_type);
 135       }
 136
 137       return location_count;
 138    }
 139
 140    if (glsl_type_is_array(type)) {
 141       const struct glsl_type *element_type = glsl_get_array_element(type);
 142
 143       if (glsl_type_is_array(element_type) ||
 144           glsl_type_is_struct(element_type)) {
 145          unsigned element_count = count_uniform_storage_slots(element_type);
 146          return element_count * glsl_get_length(type);
 147       }
 148    }
 149
 150    return 1;
 151 }
 152
 153 static void
 154 brw_nir_setup_glsl_uniform(gl_shader_stage stage, nir_variable *var,
 155                            const struct gl_program *prog,
 156                            struct brw_stage_prog_data *stage_prog_data,
 157                            bool is_scalar)
 158 {
 159    /* The data for our (non-builtin) uniforms is stored in a series of
 160     * gl_uniform_storage structs for each subcomponent that
 161     * glGetUniformLocation() could name.  We know it's been set up in the same
 162     * order we'd walk the type, so walk the list of storage that matches the
 163     * range of slots covered by this variable.
 164     */
 165    unsigned uniform_index = var->data.driver_location / 4;
 166    unsigned num_slots = count_uniform_storage_slots(var->type);
 167    for (unsigned u = 0; u < num_slots; u++) {
 168       struct gl_uniform_storage *storage =
 169          &prog->sh.data->UniformStorage[var->data.location + u];
 170
 171       if (storage->builtin || storage->type->is_sampler())
 172          continue;
 173
 174       if (storage->type->is_image()) {
 175          brw_setup_image_uniform_values(stage, stage_prog_data,
 176                                         uniform_index, storage);
 177          uniform_index +=
 178             BRW_IMAGE_PARAM_SIZE * MAX2(storage->array_elements, 1);
 179       } else {
 180          gl_constant_value *components = storage->storage;
 181          unsigned vector_count = (MAX2(storage->array_elements, 1) *
 182                                   storage->type->matrix_columns);
 183          unsigned vector_size = storage->type->vector_elements;
 184          unsigned max_vector_size = 4;
 185          if (storage->type->base_type == GLSL_TYPE_DOUBLE ||
 186              storage->type->base_type == GLSL_TYPE_UINT64 ||
 187              storage->type->base_type == GLSL_TYPE_INT64) {
 188             vector_size *= 2;
 189             if (vector_size > 4)
 190                max_vector_size = 8;
 191          }
 192
 193          for (unsigned s = 0; s < vector_count; s++) {
 194             unsigned i;
 195             for (i = 0; i < vector_size; i++) {
 196                uint32_t idx = components - prog->sh.data->UniformDataSlots;
 197                stage_prog_data->param[uniform_index++] = BRW_PARAM_UNIFORM(idx);
 198                components++;
 199             }
 200
 201             if (!is_scalar) {
 202                /* Pad out with zeros if needed (only needed for vec4) */
 203                for (; i < max_vector_size; i++) {
 204                   stage_prog_data->param[uniform_index++] =
 205                      BRW_PARAM_BUILTIN_ZERO;
 206                }
 207             }
 208          }
 209       }
 210    }
 211 }
 212
 213 void
 214 brw_nir_setup_glsl_uniforms(void *mem_ctx, nir_shader *shader,
 215                             const struct gl_program *prog,
 216                             struct brw_stage_prog_data *stage_prog_data,
 217                             bool is_scalar)
 218 {
 219    unsigned nr_params = shader->num_uniforms / 4;
 220    stage_prog_data->nr_params = nr_params;
 221    stage_prog_data->param = rzalloc_array(mem_ctx, uint32_t, nr_params);
 222
 223    nir_foreach_variable(var, &shader->uniforms) {
 224       /* UBO's, atomics and samplers don't take up space in the
 225          uniform file */
 226       if (var->interface_type != NULL || var->type->contains_atomic())
 227          continue;
 228
 229       if (var->num_state_slots > 0) {
 230          brw_nir_setup_glsl_builtin_uniform(var, prog, stage_prog_data,
 231                                             is_scalar);
 232       } else {
 233          brw_nir_setup_glsl_uniform(shader->info.stage, var, prog,
 234                                     stage_prog_data, is_scalar);
 235       }
 236    }
 237 }
 238
 239 void
 240 brw_nir_setup_arb_uniforms(void *mem_ctx, nir_shader *shader,
 241                            struct gl_program *prog,
 242                            struct brw_stage_prog_data *stage_prog_data)
 243 {
 244    struct gl_program_parameter_list *plist = prog->Parameters;
 245
 246    unsigned nr_params = plist->NumParameters * 4;
 247    stage_prog_data->nr_params = nr_params;
 248    stage_prog_data->param = rzalloc_array(mem_ctx, uint32_t, nr_params);
 249
 250    /* For ARB programs, prog_to_nir generates a single "parameters" variable
 251     * for all uniform data.  nir_lower_wpos_ytransform may also create an
 252     * additional variable.
 253     */
 254    assert(shader->uniforms.length() <= 2);
 255
 256    for (unsigned p = 0; p < plist->NumParameters; p++) {
 257       /* Parameters should be either vec4 uniforms or single component
 258        * constants; matrices and other larger types should have been broken
 259        * down earlier.
 260        */
 261       assert(plist->Parameters[p].Size <= 4);
 262
 263       unsigned i;
 264       for (i = 0; i < plist->Parameters[p].Size; i++)
 265          stage_prog_data->param[4 * p + i] = BRW_PARAM_PARAMETER(p, i);
 266       for (; i < 4; i++)
 267          stage_prog_data->param[4 * p + i] = BRW_PARAM_BUILTIN_ZERO;
 268    }
 269 }
 270
 271 void
 272 brw_nir_lower_patch_vertices_in_to_uniform(nir_shader *nir)
 273 {
 274    nir_foreach_variable_safe(var, &nir->system_values) {
 275       if (var->data.location != SYSTEM_VALUE_VERTICES_IN)
 276          continue;
 277
 278       gl_state_index16 tokens[STATE_LENGTH] = {
 279          STATE_INTERNAL,
 280          nir->info.stage == MESA_SHADER_TESS_CTRL ?
 281             (gl_state_index16)STATE_TCS_PATCH_VERTICES_IN :
 282             (gl_state_index16)STATE_TES_PATCH_VERTICES_IN,
 283       };
 284       var->num_state_slots = 1;
 285       var->state_slots =
 286          ralloc_array(var, nir_state_slot, var->num_state_slots);
 287       memcpy(var->state_slots[0].tokens, tokens, sizeof(tokens));
 288       var->state_slots[0].swizzle = SWIZZLE_XXXX;
 289
 290       var->data.mode = nir_var_uniform;
 291       var->data.location = -1;
 292       exec_node_remove(&var->node);
 293       exec_list_push_tail(&nir->uniforms, &var->node);
 294    }
 295 }