st/mesa/r200/i915/i965: eliminate gl_fragment_program
[mesa.git] / src / mesa / drivers / dri / i965 / brw_program.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32 #include <pthread.h>
33 #include "main/imports.h"
34 #include "program/prog_parameter.h"
35 #include "program/prog_print.h"
36 #include "program/prog_to_nir.h"
37 #include "program/program.h"
38 #include "program/programopt.h"
39 #include "tnl/tnl.h"
40 #include "util/ralloc.h"
41 #include "compiler/glsl/ir.h"
42 #include "compiler/glsl/glsl_to_nir.h"
43
44 #include "brw_program.h"
45 #include "brw_context.h"
46 #include "brw_shader.h"
47 #include "brw_nir.h"
48 #include "intel_batchbuffer.h"
49
50 static void
51 brw_nir_lower_uniforms(nir_shader *nir, bool is_scalar)
52 {
53 if (is_scalar) {
54 nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms, 0,
55 type_size_scalar_bytes);
56 nir_lower_io(nir, nir_var_uniform, type_size_scalar_bytes, 0);
57 } else {
58 nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms, 0,
59 type_size_vec4_bytes);
60 nir_lower_io(nir, nir_var_uniform, type_size_vec4_bytes, 0);
61 }
62 }
63
64 nir_shader *
65 brw_create_nir(struct brw_context *brw,
66 const struct gl_shader_program *shader_prog,
67 const struct gl_program *prog,
68 gl_shader_stage stage,
69 bool is_scalar)
70 {
71 struct gl_context *ctx = &brw->ctx;
72 const nir_shader_compiler_options *options =
73 ctx->Const.ShaderCompilerOptions[stage].NirOptions;
74 bool progress;
75 nir_shader *nir;
76
77 /* First, lower the GLSL IR or Mesa IR to NIR */
78 if (shader_prog) {
79 nir = glsl_to_nir(shader_prog, stage, options);
80 nir_remove_dead_variables(nir, nir_var_shader_in | nir_var_shader_out);
81 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
82 nir_shader_get_entrypoint(nir), true, false);
83 } else {
84 nir = prog_to_nir(prog, options);
85 NIR_PASS_V(nir, nir_convert_to_ssa); /* turn registers into SSA */
86 }
87 nir_validate_shader(nir);
88
89 (void)progress;
90
91 nir = brw_preprocess_nir(brw->screen->compiler, nir);
92
93 if (stage == MESA_SHADER_FRAGMENT) {
94 static const struct nir_lower_wpos_ytransform_options wpos_options = {
95 .state_tokens = {STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 0, 0, 0},
96 .fs_coord_pixel_center_integer = 1,
97 .fs_coord_origin_upper_left = 1,
98 };
99 _mesa_add_state_reference(prog->Parameters,
100 (gl_state_index *) wpos_options.state_tokens);
101
102 NIR_PASS(progress, nir, nir_lower_wpos_ytransform, &wpos_options);
103 }
104
105 NIR_PASS(progress, nir, nir_lower_system_values);
106 NIR_PASS_V(nir, brw_nir_lower_uniforms, is_scalar);
107
108 if (shader_prog) {
109 NIR_PASS_V(nir, nir_lower_samplers, shader_prog);
110 NIR_PASS_V(nir, nir_lower_atomics, shader_prog);
111 }
112
113 return nir;
114 }
115
116 static unsigned
117 get_new_program_id(struct intel_screen *screen)
118 {
119 static pthread_mutex_t m = PTHREAD_MUTEX_INITIALIZER;
120 pthread_mutex_lock(&m);
121 unsigned id = screen->program_id++;
122 pthread_mutex_unlock(&m);
123 return id;
124 }
125
126 static struct gl_program *brwNewProgram( struct gl_context *ctx,
127 GLenum target,
128 GLuint id )
129 {
130 struct brw_context *brw = brw_context(ctx);
131
132 switch (target) {
133 case GL_VERTEX_PROGRAM_ARB: {
134 struct brw_vertex_program *prog = CALLOC_STRUCT(brw_vertex_program);
135 if (prog) {
136 prog->id = get_new_program_id(brw->screen);
137
138 return _mesa_init_gl_program(&prog->program, target, id);
139 }
140 else
141 return NULL;
142 }
143
144 case GL_FRAGMENT_PROGRAM_ARB: {
145 struct brw_fragment_program *prog;
146 if (brw->gen < 6) {
147 struct gen4_fragment_program *g4_prog =
148 CALLOC_STRUCT(gen4_fragment_program);
149 prog = &g4_prog->base;
150 } else {
151 prog = CALLOC_STRUCT(brw_fragment_program);
152 }
153
154 if (prog) {
155 prog->id = get_new_program_id(brw->screen);
156
157 return _mesa_init_gl_program(&prog->program, target, id);
158 }
159 else
160 return NULL;
161 }
162
163 case GL_GEOMETRY_PROGRAM_NV: {
164 struct brw_geometry_program *prog = CALLOC_STRUCT(brw_geometry_program);
165 if (prog) {
166 prog->id = get_new_program_id(brw->screen);
167
168 return _mesa_init_gl_program(&prog->program, target, id);
169 } else {
170 return NULL;
171 }
172 }
173
174 case GL_TESS_CONTROL_PROGRAM_NV: {
175 struct brw_tess_ctrl_program *prog = CALLOC_STRUCT(brw_tess_ctrl_program);
176 if (prog) {
177 prog->id = get_new_program_id(brw->screen);
178
179 return _mesa_init_gl_program(&prog->program, target, id);
180 } else {
181 return NULL;
182 }
183 }
184
185 case GL_TESS_EVALUATION_PROGRAM_NV: {
186 struct brw_tess_eval_program *prog = CALLOC_STRUCT(brw_tess_eval_program);
187 if (prog) {
188 prog->id = get_new_program_id(brw->screen);
189
190 return _mesa_init_gl_program(&prog->program, target, id);
191 } else {
192 return NULL;
193 }
194 }
195
196 case GL_COMPUTE_PROGRAM_NV: {
197 struct brw_compute_program *prog = CALLOC_STRUCT(brw_compute_program);
198 if (prog) {
199 prog->id = get_new_program_id(brw->screen);
200
201 return _mesa_init_gl_program(&prog->program, target, id);
202 } else {
203 return NULL;
204 }
205 }
206
207 default:
208 unreachable("Unsupported target in brwNewProgram()");
209 }
210 }
211
212 static void brwDeleteProgram( struct gl_context *ctx,
213 struct gl_program *prog )
214 {
215 _mesa_delete_program( ctx, prog );
216 }
217
218
219 static GLboolean
220 brwProgramStringNotify(struct gl_context *ctx,
221 GLenum target,
222 struct gl_program *prog)
223 {
224 assert(target == GL_VERTEX_PROGRAM_ARB || !prog->IsPositionInvariant);
225
226 struct brw_context *brw = brw_context(ctx);
227 const struct brw_compiler *compiler = brw->screen->compiler;
228
229 switch (target) {
230 case GL_FRAGMENT_PROGRAM_ARB: {
231 struct brw_fragment_program *newFP = brw_fragment_program(prog);
232 const struct brw_fragment_program *curFP =
233 brw_fragment_program_const(brw->fragment_program);
234
235 if (newFP == curFP)
236 brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM;
237 newFP->id = get_new_program_id(brw->screen);
238
239 brw_add_texrect_params(prog);
240
241 prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_FRAGMENT, true);
242
243 brw_fs_precompile(ctx, NULL, prog);
244 break;
245 }
246 case GL_VERTEX_PROGRAM_ARB: {
247 struct brw_vertex_program *newVP = brw_vertex_program(prog);
248 const struct brw_vertex_program *curVP =
249 brw_vertex_program_const(brw->vertex_program);
250
251 if (newVP == curVP)
252 brw->ctx.NewDriverState |= BRW_NEW_VERTEX_PROGRAM;
253 if (newVP->program.IsPositionInvariant) {
254 _mesa_insert_mvp_code(ctx, &newVP->program);
255 }
256 newVP->id = get_new_program_id(brw->screen);
257
258 /* Also tell tnl about it:
259 */
260 _tnl_program_string(ctx, target, prog);
261
262 brw_add_texrect_params(prog);
263
264 prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_VERTEX,
265 compiler->scalar_stage[MESA_SHADER_VERTEX]);
266
267 brw_vs_precompile(ctx, NULL, prog);
268 break;
269 }
270 default:
271 /*
272 * driver->ProgramStringNotify is only called for ARB programs, fixed
273 * function vertex programs, and ir_to_mesa (which isn't used by the
274 * i965 back-end). Therefore, even after geometry shaders are added,
275 * this function should only ever be called with a target of
276 * GL_VERTEX_PROGRAM_ARB or GL_FRAGMENT_PROGRAM_ARB.
277 */
278 unreachable("Unexpected target in brwProgramStringNotify");
279 }
280
281 return true;
282 }
283
284 static void
285 brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers)
286 {
287 struct brw_context *brw = brw_context(ctx);
288 unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
289 PIPE_CONTROL_NO_WRITE |
290 PIPE_CONTROL_CS_STALL);
291 assert(brw->gen >= 7 && brw->gen <= 9);
292
293 if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
294 GL_ELEMENT_ARRAY_BARRIER_BIT |
295 GL_COMMAND_BARRIER_BIT))
296 bits |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
297
298 if (barriers & GL_UNIFORM_BARRIER_BIT)
299 bits |= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
300 PIPE_CONTROL_CONST_CACHE_INVALIDATE);
301
302 if (barriers & GL_TEXTURE_FETCH_BARRIER_BIT)
303 bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
304
305 if (barriers & GL_TEXTURE_UPDATE_BARRIER_BIT)
306 bits |= PIPE_CONTROL_RENDER_TARGET_FLUSH;
307
308 if (barriers & GL_FRAMEBUFFER_BARRIER_BIT)
309 bits |= (PIPE_CONTROL_DEPTH_CACHE_FLUSH |
310 PIPE_CONTROL_RENDER_TARGET_FLUSH);
311
312 /* Typed surface messages are handled by the render cache on IVB, so we
313 * need to flush it too.
314 */
315 if (brw->gen == 7 && !brw->is_haswell)
316 bits |= PIPE_CONTROL_RENDER_TARGET_FLUSH;
317
318 brw_emit_pipe_control_flush(brw, bits);
319 }
320
321 static void
322 brw_blend_barrier(struct gl_context *ctx)
323 {
324 struct brw_context *brw = brw_context(ctx);
325
326 if (!ctx->Extensions.MESA_shader_framebuffer_fetch) {
327 if (brw->gen >= 6) {
328 brw_emit_pipe_control_flush(brw,
329 PIPE_CONTROL_RENDER_TARGET_FLUSH |
330 PIPE_CONTROL_CS_STALL);
331 brw_emit_pipe_control_flush(brw,
332 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
333 } else {
334 brw_emit_pipe_control_flush(brw,
335 PIPE_CONTROL_RENDER_TARGET_FLUSH);
336 }
337 }
338 }
339
340 void
341 brw_add_texrect_params(struct gl_program *prog)
342 {
343 for (int texunit = 0; texunit < BRW_MAX_TEX_UNIT; texunit++) {
344 if (!(prog->TexturesUsed[texunit] & (1 << TEXTURE_RECT_INDEX)))
345 continue;
346
347 int tokens[STATE_LENGTH] = {
348 STATE_INTERNAL,
349 STATE_TEXRECT_SCALE,
350 texunit,
351 0,
352 0
353 };
354
355 _mesa_add_state_reference(prog->Parameters, (gl_state_index *)tokens);
356 }
357 }
358
359 void
360 brw_get_scratch_bo(struct brw_context *brw,
361 drm_intel_bo **scratch_bo, int size)
362 {
363 drm_intel_bo *old_bo = *scratch_bo;
364
365 if (old_bo && old_bo->size < size) {
366 drm_intel_bo_unreference(old_bo);
367 old_bo = NULL;
368 }
369
370 if (!old_bo) {
371 *scratch_bo = drm_intel_bo_alloc(brw->bufmgr, "scratch bo", size, 4096);
372 }
373 }
374
375 /**
376 * Reserve enough scratch space for the given stage to hold \p per_thread_size
377 * bytes times the given \p thread_count.
378 */
379 void
380 brw_alloc_stage_scratch(struct brw_context *brw,
381 struct brw_stage_state *stage_state,
382 unsigned per_thread_size,
383 unsigned thread_count)
384 {
385 if (stage_state->per_thread_scratch < per_thread_size) {
386 stage_state->per_thread_scratch = per_thread_size;
387
388 if (stage_state->scratch_bo)
389 drm_intel_bo_unreference(stage_state->scratch_bo);
390
391 stage_state->scratch_bo =
392 drm_intel_bo_alloc(brw->bufmgr, "shader scratch space",
393 per_thread_size * thread_count, 4096);
394 }
395 }
396
397 void brwInitFragProgFuncs( struct dd_function_table *functions )
398 {
399 assert(functions->ProgramStringNotify == _tnl_program_string);
400
401 functions->NewProgram = brwNewProgram;
402 functions->DeleteProgram = brwDeleteProgram;
403 functions->ProgramStringNotify = brwProgramStringNotify;
404
405 functions->NewShader = brw_new_shader;
406 functions->LinkShader = brw_link_shader;
407
408 functions->MemoryBarrier = brw_memory_barrier;
409 functions->BlendBarrier = brw_blend_barrier;
410 }
411
412 struct shader_times {
413 uint64_t time;
414 uint64_t written;
415 uint64_t reset;
416 };
417
418 void
419 brw_init_shader_time(struct brw_context *brw)
420 {
421 const int max_entries = 2048;
422 brw->shader_time.bo =
423 drm_intel_bo_alloc(brw->bufmgr, "shader time",
424 max_entries * SHADER_TIME_STRIDE * 3, 4096);
425 brw->shader_time.names = rzalloc_array(brw, const char *, max_entries);
426 brw->shader_time.ids = rzalloc_array(brw, int, max_entries);
427 brw->shader_time.types = rzalloc_array(brw, enum shader_time_shader_type,
428 max_entries);
429 brw->shader_time.cumulative = rzalloc_array(brw, struct shader_times,
430 max_entries);
431 brw->shader_time.max_entries = max_entries;
432 }
433
434 static int
435 compare_time(const void *a, const void *b)
436 {
437 uint64_t * const *a_val = a;
438 uint64_t * const *b_val = b;
439
440 /* We don't just subtract because we're turning the value to an int. */
441 if (**a_val < **b_val)
442 return -1;
443 else if (**a_val == **b_val)
444 return 0;
445 else
446 return 1;
447 }
448
449 static void
450 print_shader_time_line(const char *stage, const char *name,
451 int shader_num, uint64_t time, uint64_t total)
452 {
453 fprintf(stderr, "%-6s%-18s", stage, name);
454
455 if (shader_num != 0)
456 fprintf(stderr, "%4d: ", shader_num);
457 else
458 fprintf(stderr, " : ");
459
460 fprintf(stderr, "%16lld (%7.2f Gcycles) %4.1f%%\n",
461 (long long)time,
462 (double)time / 1000000000.0,
463 (double)time / total * 100.0);
464 }
465
466 static void
467 brw_report_shader_time(struct brw_context *brw)
468 {
469 if (!brw->shader_time.bo || !brw->shader_time.num_entries)
470 return;
471
472 uint64_t scaled[brw->shader_time.num_entries];
473 uint64_t *sorted[brw->shader_time.num_entries];
474 uint64_t total_by_type[ST_CS + 1];
475 memset(total_by_type, 0, sizeof(total_by_type));
476 double total = 0;
477 for (int i = 0; i < brw->shader_time.num_entries; i++) {
478 uint64_t written = 0, reset = 0;
479 enum shader_time_shader_type type = brw->shader_time.types[i];
480
481 sorted[i] = &scaled[i];
482
483 switch (type) {
484 case ST_VS:
485 case ST_TCS:
486 case ST_TES:
487 case ST_GS:
488 case ST_FS8:
489 case ST_FS16:
490 case ST_CS:
491 written = brw->shader_time.cumulative[i].written;
492 reset = brw->shader_time.cumulative[i].reset;
493 break;
494
495 default:
496 /* I sometimes want to print things that aren't the 3 shader times.
497 * Just print the sum in that case.
498 */
499 written = 1;
500 reset = 0;
501 break;
502 }
503
504 uint64_t time = brw->shader_time.cumulative[i].time;
505 if (written) {
506 scaled[i] = time / written * (written + reset);
507 } else {
508 scaled[i] = time;
509 }
510
511 switch (type) {
512 case ST_VS:
513 case ST_TCS:
514 case ST_TES:
515 case ST_GS:
516 case ST_FS8:
517 case ST_FS16:
518 case ST_CS:
519 total_by_type[type] += scaled[i];
520 break;
521 default:
522 break;
523 }
524
525 total += scaled[i];
526 }
527
528 if (total == 0) {
529 fprintf(stderr, "No shader time collected yet\n");
530 return;
531 }
532
533 qsort(sorted, brw->shader_time.num_entries, sizeof(sorted[0]), compare_time);
534
535 fprintf(stderr, "\n");
536 fprintf(stderr, "type ID cycles spent %% of total\n");
537 for (int s = 0; s < brw->shader_time.num_entries; s++) {
538 const char *stage;
539 /* Work back from the sorted pointers times to a time to print. */
540 int i = sorted[s] - scaled;
541
542 if (scaled[i] == 0)
543 continue;
544
545 int shader_num = brw->shader_time.ids[i];
546 const char *shader_name = brw->shader_time.names[i];
547
548 switch (brw->shader_time.types[i]) {
549 case ST_VS:
550 stage = "vs";
551 break;
552 case ST_TCS:
553 stage = "tcs";
554 break;
555 case ST_TES:
556 stage = "tes";
557 break;
558 case ST_GS:
559 stage = "gs";
560 break;
561 case ST_FS8:
562 stage = "fs8";
563 break;
564 case ST_FS16:
565 stage = "fs16";
566 break;
567 case ST_CS:
568 stage = "cs";
569 break;
570 default:
571 stage = "other";
572 break;
573 }
574
575 print_shader_time_line(stage, shader_name, shader_num,
576 scaled[i], total);
577 }
578
579 fprintf(stderr, "\n");
580 print_shader_time_line("total", "vs", 0, total_by_type[ST_VS], total);
581 print_shader_time_line("total", "tcs", 0, total_by_type[ST_TCS], total);
582 print_shader_time_line("total", "tes", 0, total_by_type[ST_TES], total);
583 print_shader_time_line("total", "gs", 0, total_by_type[ST_GS], total);
584 print_shader_time_line("total", "fs8", 0, total_by_type[ST_FS8], total);
585 print_shader_time_line("total", "fs16", 0, total_by_type[ST_FS16], total);
586 print_shader_time_line("total", "cs", 0, total_by_type[ST_CS], total);
587 }
588
589 static void
590 brw_collect_shader_time(struct brw_context *brw)
591 {
592 if (!brw->shader_time.bo)
593 return;
594
595 /* This probably stalls on the last rendering. We could fix that by
596 * delaying reading the reports, but it doesn't look like it's a big
597 * overhead compared to the cost of tracking the time in the first place.
598 */
599 drm_intel_bo_map(brw->shader_time.bo, true);
600 void *bo_map = brw->shader_time.bo->virtual;
601
602 for (int i = 0; i < brw->shader_time.num_entries; i++) {
603 uint32_t *times = bo_map + i * 3 * SHADER_TIME_STRIDE;
604
605 brw->shader_time.cumulative[i].time += times[SHADER_TIME_STRIDE * 0 / 4];
606 brw->shader_time.cumulative[i].written += times[SHADER_TIME_STRIDE * 1 / 4];
607 brw->shader_time.cumulative[i].reset += times[SHADER_TIME_STRIDE * 2 / 4];
608 }
609
610 /* Zero the BO out to clear it out for our next collection.
611 */
612 memset(bo_map, 0, brw->shader_time.bo->size);
613 drm_intel_bo_unmap(brw->shader_time.bo);
614 }
615
616 void
617 brw_collect_and_report_shader_time(struct brw_context *brw)
618 {
619 brw_collect_shader_time(brw);
620
621 if (brw->shader_time.report_time == 0 ||
622 get_time() - brw->shader_time.report_time >= 1.0) {
623 brw_report_shader_time(brw);
624 brw->shader_time.report_time = get_time();
625 }
626 }
627
628 /**
629 * Chooses an index in the shader_time buffer and sets up tracking information
630 * for our printouts.
631 *
632 * Note that this holds on to references to the underlying programs, which may
633 * change their lifetimes compared to normal operation.
634 */
635 int
636 brw_get_shader_time_index(struct brw_context *brw,
637 struct gl_shader_program *shader_prog,
638 struct gl_program *prog,
639 enum shader_time_shader_type type)
640 {
641 int shader_time_index = brw->shader_time.num_entries++;
642 assert(shader_time_index < brw->shader_time.max_entries);
643 brw->shader_time.types[shader_time_index] = type;
644
645 int id = shader_prog ? shader_prog->Name : prog->Id;
646 const char *name;
647 if (id == 0) {
648 name = "ff";
649 } else if (!shader_prog) {
650 name = "prog";
651 } else if (shader_prog->Label) {
652 name = ralloc_strdup(brw->shader_time.names, shader_prog->Label);
653 } else {
654 name = "glsl";
655 }
656
657 brw->shader_time.names[shader_time_index] = name;
658 brw->shader_time.ids[shader_time_index] = id;
659
660 return shader_time_index;
661 }
662
663 void
664 brw_destroy_shader_time(struct brw_context *brw)
665 {
666 drm_intel_bo_unreference(brw->shader_time.bo);
667 brw->shader_time.bo = NULL;
668 }
669
670 void
671 brw_stage_prog_data_free(const void *p)
672 {
673 struct brw_stage_prog_data *prog_data = (struct brw_stage_prog_data *)p;
674
675 ralloc_free(prog_data->param);
676 ralloc_free(prog_data->pull_param);
677 ralloc_free(prog_data->image_param);
678 }
679
680 void
681 brw_dump_ir(const char *stage, struct gl_shader_program *shader_prog,
682 struct gl_linked_shader *shader, struct gl_program *prog)
683 {
684 if (shader_prog) {
685 if (shader->ir) {
686 fprintf(stderr,
687 "GLSL IR for native %s shader %d:\n",
688 stage, shader_prog->Name);
689 _mesa_print_ir(stderr, shader->ir, NULL);
690 fprintf(stderr, "\n\n");
691 }
692 } else {
693 fprintf(stderr, "ARB_%s_program %d ir for native %s shader\n",
694 stage, prog->Id, stage);
695 _mesa_print_program(prog);
696 }
697 }
698
699 void
700 brw_setup_tex_for_precompile(struct brw_context *brw,
701 struct brw_sampler_prog_key_data *tex,
702 struct gl_program *prog)
703 {
704 const bool has_shader_channel_select = brw->is_haswell || brw->gen >= 8;
705 unsigned sampler_count = util_last_bit(prog->SamplersUsed);
706 for (unsigned i = 0; i < sampler_count; i++) {
707 if (!has_shader_channel_select && (prog->ShadowSamplers & (1 << i))) {
708 /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
709 tex->swizzles[i] =
710 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);
711 } else {
712 /* Color sampler: assume no swizzling. */
713 tex->swizzles[i] = SWIZZLE_XYZW;
714 }
715 }
716 }