2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
33 #include "main/imports.h"
34 #include "program/prog_parameter.h"
35 #include "program/prog_print.h"
36 #include "program/prog_to_nir.h"
37 #include "program/program.h"
38 #include "program/programopt.h"
40 #include "util/ralloc.h"
41 #include "compiler/glsl/ir.h"
42 #include "compiler/glsl/glsl_to_nir.h"
44 #include "brw_program.h"
45 #include "brw_context.h"
46 #include "brw_shader.h"
48 #include "intel_batchbuffer.h"
51 brw_nir_lower_uniforms(nir_shader
*nir
, bool is_scalar
)
54 nir_assign_var_locations(&nir
->uniforms
, &nir
->num_uniforms
, 0,
55 type_size_scalar_bytes
);
56 nir_lower_io(nir
, nir_var_uniform
, type_size_scalar_bytes
, 0);
58 nir_assign_var_locations(&nir
->uniforms
, &nir
->num_uniforms
, 0,
59 type_size_vec4_bytes
);
60 nir_lower_io(nir
, nir_var_uniform
, type_size_vec4_bytes
, 0);
65 brw_create_nir(struct brw_context
*brw
,
66 const struct gl_shader_program
*shader_prog
,
67 const struct gl_program
*prog
,
68 gl_shader_stage stage
,
71 struct gl_context
*ctx
= &brw
->ctx
;
72 const nir_shader_compiler_options
*options
=
73 ctx
->Const
.ShaderCompilerOptions
[stage
].NirOptions
;
77 /* First, lower the GLSL IR or Mesa IR to NIR */
79 nir
= glsl_to_nir(shader_prog
, stage
, options
);
80 nir_remove_dead_variables(nir
, nir_var_shader_in
| nir_var_shader_out
);
81 NIR_PASS_V(nir
, nir_lower_io_to_temporaries
,
82 nir_shader_get_entrypoint(nir
), true, false);
84 nir
= prog_to_nir(prog
, options
);
85 NIR_PASS_V(nir
, nir_convert_to_ssa
); /* turn registers into SSA */
87 nir_validate_shader(nir
);
91 nir
= brw_preprocess_nir(brw
->screen
->compiler
, nir
);
93 if (stage
== MESA_SHADER_FRAGMENT
) {
94 static const struct nir_lower_wpos_ytransform_options wpos_options
= {
95 .state_tokens
= {STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
, 0, 0, 0},
96 .fs_coord_pixel_center_integer
= 1,
97 .fs_coord_origin_upper_left
= 1,
99 _mesa_add_state_reference(prog
->Parameters
,
100 (gl_state_index
*) wpos_options
.state_tokens
);
102 NIR_PASS(progress
, nir
, nir_lower_wpos_ytransform
, &wpos_options
);
105 NIR_PASS(progress
, nir
, nir_lower_system_values
);
106 NIR_PASS_V(nir
, brw_nir_lower_uniforms
, is_scalar
);
109 NIR_PASS_V(nir
, nir_lower_samplers
, shader_prog
);
110 NIR_PASS_V(nir
, nir_lower_atomics
, shader_prog
);
117 get_new_program_id(struct intel_screen
*screen
)
119 static pthread_mutex_t m
= PTHREAD_MUTEX_INITIALIZER
;
120 pthread_mutex_lock(&m
);
121 unsigned id
= screen
->program_id
++;
122 pthread_mutex_unlock(&m
);
126 static struct gl_program
*brwNewProgram( struct gl_context
*ctx
,
130 struct brw_context
*brw
= brw_context(ctx
);
133 case GL_VERTEX_PROGRAM_ARB
:
134 case GL_TESS_CONTROL_PROGRAM_NV
:
135 case GL_TESS_EVALUATION_PROGRAM_NV
:
136 case GL_GEOMETRY_PROGRAM_NV
: {
137 struct brw_program
*prog
= CALLOC_STRUCT(brw_program
);
139 prog
->id
= get_new_program_id(brw
->screen
);
141 return _mesa_init_gl_program(&prog
->program
, target
, id
);
147 case GL_FRAGMENT_PROGRAM_ARB
: {
148 struct brw_fragment_program
*prog
;
150 struct gen4_fragment_program
*g4_prog
=
151 CALLOC_STRUCT(gen4_fragment_program
);
152 prog
= &g4_prog
->base
;
154 prog
= CALLOC_STRUCT(brw_fragment_program
);
158 prog
->id
= get_new_program_id(brw
->screen
);
160 return _mesa_init_gl_program(&prog
->program
, target
, id
);
166 case GL_COMPUTE_PROGRAM_NV
: {
167 struct brw_compute_program
*prog
= CALLOC_STRUCT(brw_compute_program
);
169 prog
->id
= get_new_program_id(brw
->screen
);
171 return _mesa_init_gl_program(&prog
->program
, target
, id
);
178 unreachable("Unsupported target in brwNewProgram()");
182 static void brwDeleteProgram( struct gl_context
*ctx
,
183 struct gl_program
*prog
)
185 _mesa_delete_program( ctx
, prog
);
190 brwProgramStringNotify(struct gl_context
*ctx
,
192 struct gl_program
*prog
)
194 assert(target
== GL_VERTEX_PROGRAM_ARB
|| !prog
->IsPositionInvariant
);
196 struct brw_context
*brw
= brw_context(ctx
);
197 const struct brw_compiler
*compiler
= brw
->screen
->compiler
;
200 case GL_FRAGMENT_PROGRAM_ARB
: {
201 struct brw_fragment_program
*newFP
= brw_fragment_program(prog
);
202 const struct brw_fragment_program
*curFP
=
203 brw_fragment_program_const(brw
->fragment_program
);
206 brw
->ctx
.NewDriverState
|= BRW_NEW_FRAGMENT_PROGRAM
;
207 newFP
->id
= get_new_program_id(brw
->screen
);
209 brw_add_texrect_params(prog
);
211 prog
->nir
= brw_create_nir(brw
, NULL
, prog
, MESA_SHADER_FRAGMENT
, true);
213 brw_fs_precompile(ctx
, NULL
, prog
);
216 case GL_VERTEX_PROGRAM_ARB
: {
217 struct brw_program
*newVP
= brw_program(prog
);
218 const struct brw_program
*curVP
=
219 brw_program_const(brw
->vertex_program
);
222 brw
->ctx
.NewDriverState
|= BRW_NEW_VERTEX_PROGRAM
;
223 if (newVP
->program
.IsPositionInvariant
) {
224 _mesa_insert_mvp_code(ctx
, &newVP
->program
);
226 newVP
->id
= get_new_program_id(brw
->screen
);
228 /* Also tell tnl about it:
230 _tnl_program_string(ctx
, target
, prog
);
232 brw_add_texrect_params(prog
);
234 prog
->nir
= brw_create_nir(brw
, NULL
, prog
, MESA_SHADER_VERTEX
,
235 compiler
->scalar_stage
[MESA_SHADER_VERTEX
]);
237 brw_vs_precompile(ctx
, NULL
, prog
);
242 * driver->ProgramStringNotify is only called for ARB programs, fixed
243 * function vertex programs, and ir_to_mesa (which isn't used by the
244 * i965 back-end). Therefore, even after geometry shaders are added,
245 * this function should only ever be called with a target of
246 * GL_VERTEX_PROGRAM_ARB or GL_FRAGMENT_PROGRAM_ARB.
248 unreachable("Unexpected target in brwProgramStringNotify");
255 brw_memory_barrier(struct gl_context
*ctx
, GLbitfield barriers
)
257 struct brw_context
*brw
= brw_context(ctx
);
258 unsigned bits
= (PIPE_CONTROL_DATA_CACHE_FLUSH
|
259 PIPE_CONTROL_NO_WRITE
|
260 PIPE_CONTROL_CS_STALL
);
261 assert(brw
->gen
>= 7 && brw
->gen
<= 9);
263 if (barriers
& (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT
|
264 GL_ELEMENT_ARRAY_BARRIER_BIT
|
265 GL_COMMAND_BARRIER_BIT
))
266 bits
|= PIPE_CONTROL_VF_CACHE_INVALIDATE
;
268 if (barriers
& GL_UNIFORM_BARRIER_BIT
)
269 bits
|= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
|
270 PIPE_CONTROL_CONST_CACHE_INVALIDATE
);
272 if (barriers
& GL_TEXTURE_FETCH_BARRIER_BIT
)
273 bits
|= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
;
275 if (barriers
& GL_TEXTURE_UPDATE_BARRIER_BIT
)
276 bits
|= PIPE_CONTROL_RENDER_TARGET_FLUSH
;
278 if (barriers
& GL_FRAMEBUFFER_BARRIER_BIT
)
279 bits
|= (PIPE_CONTROL_DEPTH_CACHE_FLUSH
|
280 PIPE_CONTROL_RENDER_TARGET_FLUSH
);
282 /* Typed surface messages are handled by the render cache on IVB, so we
283 * need to flush it too.
285 if (brw
->gen
== 7 && !brw
->is_haswell
)
286 bits
|= PIPE_CONTROL_RENDER_TARGET_FLUSH
;
288 brw_emit_pipe_control_flush(brw
, bits
);
292 brw_blend_barrier(struct gl_context
*ctx
)
294 struct brw_context
*brw
= brw_context(ctx
);
296 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
) {
298 brw_emit_pipe_control_flush(brw
,
299 PIPE_CONTROL_RENDER_TARGET_FLUSH
|
300 PIPE_CONTROL_CS_STALL
);
301 brw_emit_pipe_control_flush(brw
,
302 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
);
304 brw_emit_pipe_control_flush(brw
,
305 PIPE_CONTROL_RENDER_TARGET_FLUSH
);
311 brw_add_texrect_params(struct gl_program
*prog
)
313 for (int texunit
= 0; texunit
< BRW_MAX_TEX_UNIT
; texunit
++) {
314 if (!(prog
->TexturesUsed
[texunit
] & (1 << TEXTURE_RECT_INDEX
)))
317 int tokens
[STATE_LENGTH
] = {
325 _mesa_add_state_reference(prog
->Parameters
, (gl_state_index
*)tokens
);
330 brw_get_scratch_bo(struct brw_context
*brw
,
331 drm_intel_bo
**scratch_bo
, int size
)
333 drm_intel_bo
*old_bo
= *scratch_bo
;
335 if (old_bo
&& old_bo
->size
< size
) {
336 drm_intel_bo_unreference(old_bo
);
341 *scratch_bo
= drm_intel_bo_alloc(brw
->bufmgr
, "scratch bo", size
, 4096);
346 * Reserve enough scratch space for the given stage to hold \p per_thread_size
347 * bytes times the given \p thread_count.
350 brw_alloc_stage_scratch(struct brw_context
*brw
,
351 struct brw_stage_state
*stage_state
,
352 unsigned per_thread_size
,
353 unsigned thread_count
)
355 if (stage_state
->per_thread_scratch
< per_thread_size
) {
356 stage_state
->per_thread_scratch
= per_thread_size
;
358 if (stage_state
->scratch_bo
)
359 drm_intel_bo_unreference(stage_state
->scratch_bo
);
361 stage_state
->scratch_bo
=
362 drm_intel_bo_alloc(brw
->bufmgr
, "shader scratch space",
363 per_thread_size
* thread_count
, 4096);
367 void brwInitFragProgFuncs( struct dd_function_table
*functions
)
369 assert(functions
->ProgramStringNotify
== _tnl_program_string
);
371 functions
->NewProgram
= brwNewProgram
;
372 functions
->DeleteProgram
= brwDeleteProgram
;
373 functions
->ProgramStringNotify
= brwProgramStringNotify
;
375 functions
->NewShader
= brw_new_shader
;
376 functions
->LinkShader
= brw_link_shader
;
378 functions
->MemoryBarrier
= brw_memory_barrier
;
379 functions
->BlendBarrier
= brw_blend_barrier
;
382 struct shader_times
{
389 brw_init_shader_time(struct brw_context
*brw
)
391 const int max_entries
= 2048;
392 brw
->shader_time
.bo
=
393 drm_intel_bo_alloc(brw
->bufmgr
, "shader time",
394 max_entries
* SHADER_TIME_STRIDE
* 3, 4096);
395 brw
->shader_time
.names
= rzalloc_array(brw
, const char *, max_entries
);
396 brw
->shader_time
.ids
= rzalloc_array(brw
, int, max_entries
);
397 brw
->shader_time
.types
= rzalloc_array(brw
, enum shader_time_shader_type
,
399 brw
->shader_time
.cumulative
= rzalloc_array(brw
, struct shader_times
,
401 brw
->shader_time
.max_entries
= max_entries
;
405 compare_time(const void *a
, const void *b
)
407 uint64_t * const *a_val
= a
;
408 uint64_t * const *b_val
= b
;
410 /* We don't just subtract because we're turning the value to an int. */
411 if (**a_val
< **b_val
)
413 else if (**a_val
== **b_val
)
420 print_shader_time_line(const char *stage
, const char *name
,
421 int shader_num
, uint64_t time
, uint64_t total
)
423 fprintf(stderr
, "%-6s%-18s", stage
, name
);
426 fprintf(stderr
, "%4d: ", shader_num
);
428 fprintf(stderr
, " : ");
430 fprintf(stderr
, "%16lld (%7.2f Gcycles) %4.1f%%\n",
432 (double)time
/ 1000000000.0,
433 (double)time
/ total
* 100.0);
437 brw_report_shader_time(struct brw_context
*brw
)
439 if (!brw
->shader_time
.bo
|| !brw
->shader_time
.num_entries
)
442 uint64_t scaled
[brw
->shader_time
.num_entries
];
443 uint64_t *sorted
[brw
->shader_time
.num_entries
];
444 uint64_t total_by_type
[ST_CS
+ 1];
445 memset(total_by_type
, 0, sizeof(total_by_type
));
447 for (int i
= 0; i
< brw
->shader_time
.num_entries
; i
++) {
448 uint64_t written
= 0, reset
= 0;
449 enum shader_time_shader_type type
= brw
->shader_time
.types
[i
];
451 sorted
[i
] = &scaled
[i
];
461 written
= brw
->shader_time
.cumulative
[i
].written
;
462 reset
= brw
->shader_time
.cumulative
[i
].reset
;
466 /* I sometimes want to print things that aren't the 3 shader times.
467 * Just print the sum in that case.
474 uint64_t time
= brw
->shader_time
.cumulative
[i
].time
;
476 scaled
[i
] = time
/ written
* (written
+ reset
);
489 total_by_type
[type
] += scaled
[i
];
499 fprintf(stderr
, "No shader time collected yet\n");
503 qsort(sorted
, brw
->shader_time
.num_entries
, sizeof(sorted
[0]), compare_time
);
505 fprintf(stderr
, "\n");
506 fprintf(stderr
, "type ID cycles spent %% of total\n");
507 for (int s
= 0; s
< brw
->shader_time
.num_entries
; s
++) {
509 /* Work back from the sorted pointers times to a time to print. */
510 int i
= sorted
[s
] - scaled
;
515 int shader_num
= brw
->shader_time
.ids
[i
];
516 const char *shader_name
= brw
->shader_time
.names
[i
];
518 switch (brw
->shader_time
.types
[i
]) {
545 print_shader_time_line(stage
, shader_name
, shader_num
,
549 fprintf(stderr
, "\n");
550 print_shader_time_line("total", "vs", 0, total_by_type
[ST_VS
], total
);
551 print_shader_time_line("total", "tcs", 0, total_by_type
[ST_TCS
], total
);
552 print_shader_time_line("total", "tes", 0, total_by_type
[ST_TES
], total
);
553 print_shader_time_line("total", "gs", 0, total_by_type
[ST_GS
], total
);
554 print_shader_time_line("total", "fs8", 0, total_by_type
[ST_FS8
], total
);
555 print_shader_time_line("total", "fs16", 0, total_by_type
[ST_FS16
], total
);
556 print_shader_time_line("total", "cs", 0, total_by_type
[ST_CS
], total
);
560 brw_collect_shader_time(struct brw_context
*brw
)
562 if (!brw
->shader_time
.bo
)
565 /* This probably stalls on the last rendering. We could fix that by
566 * delaying reading the reports, but it doesn't look like it's a big
567 * overhead compared to the cost of tracking the time in the first place.
569 drm_intel_bo_map(brw
->shader_time
.bo
, true);
570 void *bo_map
= brw
->shader_time
.bo
->virtual;
572 for (int i
= 0; i
< brw
->shader_time
.num_entries
; i
++) {
573 uint32_t *times
= bo_map
+ i
* 3 * SHADER_TIME_STRIDE
;
575 brw
->shader_time
.cumulative
[i
].time
+= times
[SHADER_TIME_STRIDE
* 0 / 4];
576 brw
->shader_time
.cumulative
[i
].written
+= times
[SHADER_TIME_STRIDE
* 1 / 4];
577 brw
->shader_time
.cumulative
[i
].reset
+= times
[SHADER_TIME_STRIDE
* 2 / 4];
580 /* Zero the BO out to clear it out for our next collection.
582 memset(bo_map
, 0, brw
->shader_time
.bo
->size
);
583 drm_intel_bo_unmap(brw
->shader_time
.bo
);
587 brw_collect_and_report_shader_time(struct brw_context
*brw
)
589 brw_collect_shader_time(brw
);
591 if (brw
->shader_time
.report_time
== 0 ||
592 get_time() - brw
->shader_time
.report_time
>= 1.0) {
593 brw_report_shader_time(brw
);
594 brw
->shader_time
.report_time
= get_time();
599 * Chooses an index in the shader_time buffer and sets up tracking information
602 * Note that this holds on to references to the underlying programs, which may
603 * change their lifetimes compared to normal operation.
606 brw_get_shader_time_index(struct brw_context
*brw
,
607 struct gl_shader_program
*shader_prog
,
608 struct gl_program
*prog
,
609 enum shader_time_shader_type type
)
611 int shader_time_index
= brw
->shader_time
.num_entries
++;
612 assert(shader_time_index
< brw
->shader_time
.max_entries
);
613 brw
->shader_time
.types
[shader_time_index
] = type
;
615 int id
= shader_prog
? shader_prog
->Name
: prog
->Id
;
619 } else if (!shader_prog
) {
621 } else if (shader_prog
->Label
) {
622 name
= ralloc_strdup(brw
->shader_time
.names
, shader_prog
->Label
);
627 brw
->shader_time
.names
[shader_time_index
] = name
;
628 brw
->shader_time
.ids
[shader_time_index
] = id
;
630 return shader_time_index
;
634 brw_destroy_shader_time(struct brw_context
*brw
)
636 drm_intel_bo_unreference(brw
->shader_time
.bo
);
637 brw
->shader_time
.bo
= NULL
;
641 brw_stage_prog_data_free(const void *p
)
643 struct brw_stage_prog_data
*prog_data
= (struct brw_stage_prog_data
*)p
;
645 ralloc_free(prog_data
->param
);
646 ralloc_free(prog_data
->pull_param
);
647 ralloc_free(prog_data
->image_param
);
651 brw_dump_ir(const char *stage
, struct gl_shader_program
*shader_prog
,
652 struct gl_linked_shader
*shader
, struct gl_program
*prog
)
657 "GLSL IR for native %s shader %d:\n",
658 stage
, shader_prog
->Name
);
659 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
660 fprintf(stderr
, "\n\n");
663 fprintf(stderr
, "ARB_%s_program %d ir for native %s shader\n",
664 stage
, prog
->Id
, stage
);
665 _mesa_print_program(prog
);
670 brw_setup_tex_for_precompile(struct brw_context
*brw
,
671 struct brw_sampler_prog_key_data
*tex
,
672 struct gl_program
*prog
)
674 const bool has_shader_channel_select
= brw
->is_haswell
|| brw
->gen
>= 8;
675 unsigned sampler_count
= util_last_bit(prog
->SamplersUsed
);
676 for (unsigned i
= 0; i
< sampler_count
; i
++) {
677 if (!has_shader_channel_select
&& (prog
->ShadowSamplers
& (1 << i
))) {
678 /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
680 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_ONE
);
682 /* Color sampler: assume no swizzling. */
683 tex
->swizzles
[i
] = SWIZZLE_XYZW
;