2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
33 #include "main/imports.h"
34 #include "program/prog_parameter.h"
35 #include "program/prog_print.h"
36 #include "program/prog_to_nir.h"
37 #include "program/program.h"
38 #include "program/programopt.h"
40 #include "util/ralloc.h"
41 #include "compiler/glsl/ir.h"
42 #include "compiler/glsl/glsl_to_nir.h"
44 #include "brw_program.h"
45 #include "brw_context.h"
46 #include "compiler/brw_nir.h"
47 #include "brw_defines.h"
48 #include "intel_batchbuffer.h"
51 brw_nir_lower_uniforms(nir_shader
*nir
, bool is_scalar
)
54 nir_assign_var_locations(&nir
->uniforms
, &nir
->num_uniforms
,
55 type_size_scalar_bytes
);
56 return nir_lower_io(nir
, nir_var_uniform
, type_size_scalar_bytes
, 0);
58 nir_assign_var_locations(&nir
->uniforms
, &nir
->num_uniforms
,
59 type_size_vec4_bytes
);
60 return nir_lower_io(nir
, nir_var_uniform
, type_size_vec4_bytes
, 0);
65 brw_create_nir(struct brw_context
*brw
,
66 const struct gl_shader_program
*shader_prog
,
67 struct gl_program
*prog
,
68 gl_shader_stage stage
,
71 struct gl_context
*ctx
= &brw
->ctx
;
72 const nir_shader_compiler_options
*options
=
73 ctx
->Const
.ShaderCompilerOptions
[stage
].NirOptions
;
76 /* First, lower the GLSL IR or Mesa IR to NIR */
78 nir
= glsl_to_nir(shader_prog
, stage
, options
);
79 nir_remove_dead_variables(nir
, nir_var_shader_in
| nir_var_shader_out
);
80 nir_lower_returns(nir
);
81 nir_validate_shader(nir
);
82 NIR_PASS_V(nir
, nir_lower_io_to_temporaries
,
83 nir_shader_get_entrypoint(nir
), true, false);
85 nir
= prog_to_nir(prog
, options
);
86 NIR_PASS_V(nir
, nir_lower_regs_to_ssa
); /* turn registers into SSA */
88 nir_validate_shader(nir
);
90 nir
= brw_preprocess_nir(brw
->screen
->compiler
, nir
);
92 NIR_PASS_V(nir
, nir_lower_system_values
);
94 if (stage
== MESA_SHADER_FRAGMENT
) {
95 static const struct nir_lower_wpos_ytransform_options wpos_options
= {
96 .state_tokens
= {STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
, 0, 0, 0},
97 .fs_coord_pixel_center_integer
= 1,
98 .fs_coord_origin_upper_left
= 1,
101 bool progress
= false;
102 NIR_PASS(progress
, nir
, nir_lower_wpos_ytransform
, &wpos_options
);
104 _mesa_add_state_reference(prog
->Parameters
,
105 (gl_state_index
*) wpos_options
.state_tokens
);
109 NIR_PASS_V(nir
, brw_nir_lower_uniforms
, is_scalar
);
115 brw_shader_gather_info(nir_shader
*nir
, struct gl_program
*prog
)
117 nir_shader_gather_info(nir
, nir_shader_get_entrypoint(nir
));
119 /* Copy the info we just generated back into the gl_program */
120 const char *prog_name
= prog
->info
.name
;
121 const char *prog_label
= prog
->info
.label
;
122 prog
->info
= nir
->info
;
123 prog
->info
.name
= prog_name
;
124 prog
->info
.label
= prog_label
;
128 get_new_program_id(struct intel_screen
*screen
)
130 return p_atomic_inc_return(&screen
->program_id
);
133 static struct gl_program
*brwNewProgram(struct gl_context
*ctx
, GLenum target
,
134 GLuint id
, bool is_arb_asm
)
136 struct brw_context
*brw
= brw_context(ctx
);
137 struct brw_program
*prog
= rzalloc(NULL
, struct brw_program
);
140 prog
->id
= get_new_program_id(brw
->screen
);
142 return _mesa_init_gl_program(&prog
->program
, target
, id
, is_arb_asm
);
148 static void brwDeleteProgram( struct gl_context
*ctx
,
149 struct gl_program
*prog
)
151 struct brw_context
*brw
= brw_context(ctx
);
153 /* Beware! prog's refcount has reached zero, and it's about to be freed.
155 * In brw_upload_pipeline_state(), we compare brw->programs[i] to
156 * ctx->FooProgram._Current, and flag BRW_NEW_FOO_PROGRAM if the
157 * pointer has changed.
159 * We cannot leave brw->programs[i] as a dangling pointer to the dead
160 * program. malloc() may allocate the same memory for a new gl_program,
161 * causing us to see matching pointers...but totally different programs.
163 * We cannot set brw->programs[i] to NULL, either. If we've deleted the
164 * active program, Mesa may set ctx->FooProgram._Current to NULL. That
165 * would cause us to see matching pointers (NULL == NULL), and fail to
166 * detect that a program has changed since our last draw.
168 * So, set it to a bogus gl_program pointer that will never match,
169 * causing us to properly reevaluate the state on our next draw.
171 * Getting this wrong causes heisenbugs which are very hard to catch,
172 * as you need a very specific allocation pattern to hit the problem.
174 static const struct gl_program deleted_program
;
176 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
177 if (brw
->programs
[i
] == prog
)
178 brw
->programs
[i
] = (struct gl_program
*) &deleted_program
;
181 _mesa_delete_program( ctx
, prog
);
186 brwProgramStringNotify(struct gl_context
*ctx
,
188 struct gl_program
*prog
)
190 assert(target
== GL_VERTEX_PROGRAM_ARB
|| !prog
->arb
.IsPositionInvariant
);
192 struct brw_context
*brw
= brw_context(ctx
);
193 const struct brw_compiler
*compiler
= brw
->screen
->compiler
;
196 case GL_FRAGMENT_PROGRAM_ARB
: {
197 struct brw_program
*newFP
= brw_program(prog
);
198 const struct brw_program
*curFP
=
199 brw_program_const(brw
->programs
[MESA_SHADER_FRAGMENT
]);
202 brw
->ctx
.NewDriverState
|= BRW_NEW_FRAGMENT_PROGRAM
;
203 newFP
->id
= get_new_program_id(brw
->screen
);
205 prog
->nir
= brw_create_nir(brw
, NULL
, prog
, MESA_SHADER_FRAGMENT
, true);
207 brw_shader_gather_info(prog
->nir
, prog
);
209 brw_fs_precompile(ctx
, prog
);
212 case GL_VERTEX_PROGRAM_ARB
: {
213 struct brw_program
*newVP
= brw_program(prog
);
214 const struct brw_program
*curVP
=
215 brw_program_const(brw
->programs
[MESA_SHADER_VERTEX
]);
218 brw
->ctx
.NewDriverState
|= BRW_NEW_VERTEX_PROGRAM
;
219 if (newVP
->program
.arb
.IsPositionInvariant
) {
220 _mesa_insert_mvp_code(ctx
, &newVP
->program
);
222 newVP
->id
= get_new_program_id(brw
->screen
);
224 /* Also tell tnl about it:
226 _tnl_program_string(ctx
, target
, prog
);
228 prog
->nir
= brw_create_nir(brw
, NULL
, prog
, MESA_SHADER_VERTEX
,
229 compiler
->scalar_stage
[MESA_SHADER_VERTEX
]);
231 brw_shader_gather_info(prog
->nir
, prog
);
233 brw_vs_precompile(ctx
, prog
);
238 * driver->ProgramStringNotify is only called for ARB programs, fixed
239 * function vertex programs, and ir_to_mesa (which isn't used by the
240 * i965 back-end). Therefore, even after geometry shaders are added,
241 * this function should only ever be called with a target of
242 * GL_VERTEX_PROGRAM_ARB or GL_FRAGMENT_PROGRAM_ARB.
244 unreachable("Unexpected target in brwProgramStringNotify");
251 brw_memory_barrier(struct gl_context
*ctx
, GLbitfield barriers
)
253 struct brw_context
*brw
= brw_context(ctx
);
254 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
255 unsigned bits
= (PIPE_CONTROL_DATA_CACHE_FLUSH
|
256 PIPE_CONTROL_NO_WRITE
|
257 PIPE_CONTROL_CS_STALL
);
258 assert(devinfo
->gen
>= 7 && devinfo
->gen
<= 10);
260 if (barriers
& (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT
|
261 GL_ELEMENT_ARRAY_BARRIER_BIT
|
262 GL_COMMAND_BARRIER_BIT
))
263 bits
|= PIPE_CONTROL_VF_CACHE_INVALIDATE
;
265 if (barriers
& GL_UNIFORM_BARRIER_BIT
)
266 bits
|= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
|
267 PIPE_CONTROL_CONST_CACHE_INVALIDATE
);
269 if (barriers
& GL_TEXTURE_FETCH_BARRIER_BIT
)
270 bits
|= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
;
272 if (barriers
& (GL_TEXTURE_UPDATE_BARRIER_BIT
|
273 GL_PIXEL_BUFFER_BARRIER_BIT
))
274 bits
|= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
|
275 PIPE_CONTROL_RENDER_TARGET_FLUSH
);
277 if (barriers
& GL_FRAMEBUFFER_BARRIER_BIT
)
278 bits
|= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
|
279 PIPE_CONTROL_RENDER_TARGET_FLUSH
);
281 /* Typed surface messages are handled by the render cache on IVB, so we
282 * need to flush it too.
284 if (devinfo
->gen
== 7 && !devinfo
->is_haswell
)
285 bits
|= PIPE_CONTROL_RENDER_TARGET_FLUSH
;
287 brw_emit_pipe_control_flush(brw
, bits
);
291 brw_blend_barrier(struct gl_context
*ctx
)
293 struct brw_context
*brw
= brw_context(ctx
);
294 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
296 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
) {
297 if (devinfo
->gen
>= 6) {
298 brw_emit_pipe_control_flush(brw
,
299 PIPE_CONTROL_RENDER_TARGET_FLUSH
|
300 PIPE_CONTROL_CS_STALL
);
301 brw_emit_pipe_control_flush(brw
,
302 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
);
304 brw_emit_pipe_control_flush(brw
,
305 PIPE_CONTROL_RENDER_TARGET_FLUSH
);
311 brw_get_scratch_bo(struct brw_context
*brw
,
312 struct brw_bo
**scratch_bo
, int size
)
314 struct brw_bo
*old_bo
= *scratch_bo
;
316 if (old_bo
&& old_bo
->size
< size
) {
317 brw_bo_unreference(old_bo
);
322 *scratch_bo
= brw_bo_alloc(brw
->bufmgr
, "scratch bo", size
, 4096);
327 * Reserve enough scratch space for the given stage to hold \p per_thread_size
328 * bytes times the given \p thread_count.
331 brw_alloc_stage_scratch(struct brw_context
*brw
,
332 struct brw_stage_state
*stage_state
,
333 unsigned per_thread_size
,
334 unsigned thread_count
)
336 if (stage_state
->per_thread_scratch
< per_thread_size
) {
337 stage_state
->per_thread_scratch
= per_thread_size
;
339 if (stage_state
->scratch_bo
)
340 brw_bo_unreference(stage_state
->scratch_bo
);
342 stage_state
->scratch_bo
=
343 brw_bo_alloc(brw
->bufmgr
, "shader scratch space",
344 per_thread_size
* thread_count
, 4096);
348 void brwInitFragProgFuncs( struct dd_function_table
*functions
)
350 assert(functions
->ProgramStringNotify
== _tnl_program_string
);
352 functions
->NewProgram
= brwNewProgram
;
353 functions
->DeleteProgram
= brwDeleteProgram
;
354 functions
->ProgramStringNotify
= brwProgramStringNotify
;
356 functions
->LinkShader
= brw_link_shader
;
358 functions
->MemoryBarrier
= brw_memory_barrier
;
359 functions
->BlendBarrier
= brw_blend_barrier
;
362 struct shader_times
{
369 brw_init_shader_time(struct brw_context
*brw
)
371 const int max_entries
= 2048;
372 brw
->shader_time
.bo
=
373 brw_bo_alloc(brw
->bufmgr
, "shader time",
374 max_entries
* BRW_SHADER_TIME_STRIDE
* 3, 4096);
375 brw
->shader_time
.names
= rzalloc_array(brw
, const char *, max_entries
);
376 brw
->shader_time
.ids
= rzalloc_array(brw
, int, max_entries
);
377 brw
->shader_time
.types
= rzalloc_array(brw
, enum shader_time_shader_type
,
379 brw
->shader_time
.cumulative
= rzalloc_array(brw
, struct shader_times
,
381 brw
->shader_time
.max_entries
= max_entries
;
385 compare_time(const void *a
, const void *b
)
387 uint64_t * const *a_val
= a
;
388 uint64_t * const *b_val
= b
;
390 /* We don't just subtract because we're turning the value to an int. */
391 if (**a_val
< **b_val
)
393 else if (**a_val
== **b_val
)
400 print_shader_time_line(const char *stage
, const char *name
,
401 int shader_num
, uint64_t time
, uint64_t total
)
403 fprintf(stderr
, "%-6s%-18s", stage
, name
);
406 fprintf(stderr
, "%4d: ", shader_num
);
408 fprintf(stderr
, " : ");
410 fprintf(stderr
, "%16lld (%7.2f Gcycles) %4.1f%%\n",
412 (double)time
/ 1000000000.0,
413 (double)time
/ total
* 100.0);
417 brw_report_shader_time(struct brw_context
*brw
)
419 if (!brw
->shader_time
.bo
|| !brw
->shader_time
.num_entries
)
422 uint64_t scaled
[brw
->shader_time
.num_entries
];
423 uint64_t *sorted
[brw
->shader_time
.num_entries
];
424 uint64_t total_by_type
[ST_CS
+ 1];
425 memset(total_by_type
, 0, sizeof(total_by_type
));
427 for (int i
= 0; i
< brw
->shader_time
.num_entries
; i
++) {
428 uint64_t written
= 0, reset
= 0;
429 enum shader_time_shader_type type
= brw
->shader_time
.types
[i
];
431 sorted
[i
] = &scaled
[i
];
441 written
= brw
->shader_time
.cumulative
[i
].written
;
442 reset
= brw
->shader_time
.cumulative
[i
].reset
;
446 /* I sometimes want to print things that aren't the 3 shader times.
447 * Just print the sum in that case.
454 uint64_t time
= brw
->shader_time
.cumulative
[i
].time
;
456 scaled
[i
] = time
/ written
* (written
+ reset
);
469 total_by_type
[type
] += scaled
[i
];
479 fprintf(stderr
, "No shader time collected yet\n");
483 qsort(sorted
, brw
->shader_time
.num_entries
, sizeof(sorted
[0]), compare_time
);
485 fprintf(stderr
, "\n");
486 fprintf(stderr
, "type ID cycles spent %% of total\n");
487 for (int s
= 0; s
< brw
->shader_time
.num_entries
; s
++) {
489 /* Work back from the sorted pointers times to a time to print. */
490 int i
= sorted
[s
] - scaled
;
495 int shader_num
= brw
->shader_time
.ids
[i
];
496 const char *shader_name
= brw
->shader_time
.names
[i
];
498 switch (brw
->shader_time
.types
[i
]) {
525 print_shader_time_line(stage
, shader_name
, shader_num
,
529 fprintf(stderr
, "\n");
530 print_shader_time_line("total", "vs", 0, total_by_type
[ST_VS
], total
);
531 print_shader_time_line("total", "tcs", 0, total_by_type
[ST_TCS
], total
);
532 print_shader_time_line("total", "tes", 0, total_by_type
[ST_TES
], total
);
533 print_shader_time_line("total", "gs", 0, total_by_type
[ST_GS
], total
);
534 print_shader_time_line("total", "fs8", 0, total_by_type
[ST_FS8
], total
);
535 print_shader_time_line("total", "fs16", 0, total_by_type
[ST_FS16
], total
);
536 print_shader_time_line("total", "cs", 0, total_by_type
[ST_CS
], total
);
540 brw_collect_shader_time(struct brw_context
*brw
)
542 if (!brw
->shader_time
.bo
)
545 /* This probably stalls on the last rendering. We could fix that by
546 * delaying reading the reports, but it doesn't look like it's a big
547 * overhead compared to the cost of tracking the time in the first place.
549 void *bo_map
= brw_bo_map(brw
, brw
->shader_time
.bo
, MAP_READ
| MAP_WRITE
);
551 for (int i
= 0; i
< brw
->shader_time
.num_entries
; i
++) {
552 uint32_t *times
= bo_map
+ i
* 3 * BRW_SHADER_TIME_STRIDE
;
554 brw
->shader_time
.cumulative
[i
].time
+= times
[BRW_SHADER_TIME_STRIDE
* 0 / 4];
555 brw
->shader_time
.cumulative
[i
].written
+= times
[BRW_SHADER_TIME_STRIDE
* 1 / 4];
556 brw
->shader_time
.cumulative
[i
].reset
+= times
[BRW_SHADER_TIME_STRIDE
* 2 / 4];
559 /* Zero the BO out to clear it out for our next collection.
561 memset(bo_map
, 0, brw
->shader_time
.bo
->size
);
562 brw_bo_unmap(brw
->shader_time
.bo
);
566 brw_collect_and_report_shader_time(struct brw_context
*brw
)
568 brw_collect_shader_time(brw
);
570 if (brw
->shader_time
.report_time
== 0 ||
571 get_time() - brw
->shader_time
.report_time
>= 1.0) {
572 brw_report_shader_time(brw
);
573 brw
->shader_time
.report_time
= get_time();
578 * Chooses an index in the shader_time buffer and sets up tracking information
581 * Note that this holds on to references to the underlying programs, which may
582 * change their lifetimes compared to normal operation.
585 brw_get_shader_time_index(struct brw_context
*brw
, struct gl_program
*prog
,
586 enum shader_time_shader_type type
, bool is_glsl_sh
)
588 int shader_time_index
= brw
->shader_time
.num_entries
++;
589 assert(shader_time_index
< brw
->shader_time
.max_entries
);
590 brw
->shader_time
.types
[shader_time_index
] = type
;
595 } else if (is_glsl_sh
) {
596 name
= prog
->info
.label
?
597 ralloc_strdup(brw
->shader_time
.names
, prog
->info
.label
) : "glsl";
602 brw
->shader_time
.names
[shader_time_index
] = name
;
603 brw
->shader_time
.ids
[shader_time_index
] = prog
->Id
;
605 return shader_time_index
;
609 brw_destroy_shader_time(struct brw_context
*brw
)
611 brw_bo_unreference(brw
->shader_time
.bo
);
612 brw
->shader_time
.bo
= NULL
;
616 brw_stage_prog_data_free(const void *p
)
618 struct brw_stage_prog_data
*prog_data
= (struct brw_stage_prog_data
*)p
;
620 ralloc_free(prog_data
->param
);
621 ralloc_free(prog_data
->pull_param
);
625 brw_dump_arb_asm(const char *stage
, struct gl_program
*prog
)
627 fprintf(stderr
, "ARB_%s_program %d ir for native %s shader\n",
628 stage
, prog
->Id
, stage
);
629 _mesa_print_program(prog
);
633 brw_setup_tex_for_precompile(struct brw_context
*brw
,
634 struct brw_sampler_prog_key_data
*tex
,
635 struct gl_program
*prog
)
637 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
638 const bool has_shader_channel_select
= devinfo
->is_haswell
|| devinfo
->gen
>= 8;
639 unsigned sampler_count
= util_last_bit(prog
->SamplersUsed
);
640 for (unsigned i
= 0; i
< sampler_count
; i
++) {
641 if (!has_shader_channel_select
&& (prog
->ShadowSamplers
& (1 << i
))) {
642 /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
644 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_ONE
);
646 /* Color sampler: assume no swizzling. */
647 tex
->swizzles
[i
] = SWIZZLE_XYZW
;
653 * Sets up the starting offsets for the groups of binding table entries
654 * common to all pipeline stages.
656 * Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
657 * unused but also make sure that addition of small offsets to them will
658 * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
661 brw_assign_common_binding_table_offsets(const struct gen_device_info
*devinfo
,
662 const struct gl_program
*prog
,
663 struct brw_stage_prog_data
*stage_prog_data
,
664 uint32_t next_binding_table_offset
)
666 int num_textures
= util_last_bit(prog
->SamplersUsed
);
668 stage_prog_data
->binding_table
.texture_start
= next_binding_table_offset
;
669 next_binding_table_offset
+= num_textures
;
671 if (prog
->info
.num_ubos
) {
672 assert(prog
->info
.num_ubos
<= BRW_MAX_UBO
);
673 stage_prog_data
->binding_table
.ubo_start
= next_binding_table_offset
;
674 next_binding_table_offset
+= prog
->info
.num_ubos
;
676 stage_prog_data
->binding_table
.ubo_start
= 0xd0d0d0d0;
679 if (prog
->info
.num_ssbos
) {
680 assert(prog
->info
.num_ssbos
<= BRW_MAX_SSBO
);
681 stage_prog_data
->binding_table
.ssbo_start
= next_binding_table_offset
;
682 next_binding_table_offset
+= prog
->info
.num_ssbos
;
684 stage_prog_data
->binding_table
.ssbo_start
= 0xd0d0d0d0;
687 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
688 stage_prog_data
->binding_table
.shader_time_start
= next_binding_table_offset
;
689 next_binding_table_offset
++;
691 stage_prog_data
->binding_table
.shader_time_start
= 0xd0d0d0d0;
694 if (prog
->nir
->info
.uses_texture_gather
) {
695 if (devinfo
->gen
>= 8) {
696 stage_prog_data
->binding_table
.gather_texture_start
=
697 stage_prog_data
->binding_table
.texture_start
;
699 stage_prog_data
->binding_table
.gather_texture_start
= next_binding_table_offset
;
700 next_binding_table_offset
+= num_textures
;
703 stage_prog_data
->binding_table
.gather_texture_start
= 0xd0d0d0d0;
706 if (prog
->info
.num_abos
) {
707 stage_prog_data
->binding_table
.abo_start
= next_binding_table_offset
;
708 next_binding_table_offset
+= prog
->info
.num_abos
;
710 stage_prog_data
->binding_table
.abo_start
= 0xd0d0d0d0;
713 if (prog
->info
.num_images
) {
714 stage_prog_data
->binding_table
.image_start
= next_binding_table_offset
;
715 next_binding_table_offset
+= prog
->info
.num_images
;
717 stage_prog_data
->binding_table
.image_start
= 0xd0d0d0d0;
720 /* This may or may not be used depending on how the compile goes. */
721 stage_prog_data
->binding_table
.pull_constants_start
= next_binding_table_offset
;
722 next_binding_table_offset
++;
724 /* Plane 0 is just the regular texture section */
725 stage_prog_data
->binding_table
.plane_start
[0] = stage_prog_data
->binding_table
.texture_start
;
727 stage_prog_data
->binding_table
.plane_start
[1] = next_binding_table_offset
;
728 next_binding_table_offset
+= num_textures
;
730 stage_prog_data
->binding_table
.plane_start
[2] = next_binding_table_offset
;
731 next_binding_table_offset
+= num_textures
;
733 /* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */
735 assert(next_binding_table_offset
<= BRW_MAX_SURFACES
);
736 return next_binding_table_offset
;