src/mesa/drivers/dri/i965/brw_sampler_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32 /**
  33  * @file brw_sampler_state.c
  34  *
  35  * This file contains code for emitting SAMPLER_STATE structures, which
  36  * specifies filter modes, wrap modes, border color, and so on.
  37  */
  38
  39 #include "brw_context.h"
  40 #include "brw_state.h"
  41 #include "brw_defines.h"
  42 #include "intel_batchbuffer.h"
  43 #include "intel_mipmap_tree.h"
  44
  45 #include "main/macros.h"
  46 #include "main/samplerobj.h"
  47 #include "util/half_float.h"
  48
  49 /**
  50  * Emit a 3DSTATE_SAMPLER_STATE_POINTERS_{VS,HS,GS,DS,PS} packet.
  51  */
  52 static void
  53 gen7_emit_sampler_state_pointers_xs(struct brw_context *brw,
  54                                     struct brw_stage_state *stage_state)
  55 {
  56    static const uint16_t packet_headers[] = {
  57       [MESA_SHADER_VERTEX] = _3DSTATE_SAMPLER_STATE_POINTERS_VS,
  58       [MESA_SHADER_TESS_CTRL] = _3DSTATE_SAMPLER_STATE_POINTERS_HS,
  59       [MESA_SHADER_TESS_EVAL] = _3DSTATE_SAMPLER_STATE_POINTERS_DS,
  60       [MESA_SHADER_GEOMETRY] = _3DSTATE_SAMPLER_STATE_POINTERS_GS,
  61       [MESA_SHADER_FRAGMENT] = _3DSTATE_SAMPLER_STATE_POINTERS_PS,
  62    };
  63
  64    /* Ivybridge requires a workaround flush before VS packets. */
  65    if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail &&
  66        stage_state->stage == MESA_SHADER_VERTEX) {
  67       gen7_emit_vs_workaround_flush(brw);
  68    }
  69
  70    BEGIN_BATCH(2);
  71    OUT_BATCH(packet_headers[stage_state->stage] << 16 | (2 - 2));
  72    OUT_BATCH(stage_state->sampler_offset);
  73    ADVANCE_BATCH();
  74 }
  75
  76 /**
  77  * Emit a SAMPLER_STATE structure, given all the fields.
  78  */
  79 void
  80 brw_emit_sampler_state(struct brw_context *brw,
  81                        uint32_t *ss,
  82                        uint32_t batch_offset_for_sampler_state,
  83                        unsigned min_filter,
  84                        unsigned mag_filter,
  85                        unsigned mip_filter,
  86                        unsigned max_anisotropy,
  87                        unsigned address_rounding,
  88                        unsigned wrap_s,
  89                        unsigned wrap_t,
  90                        unsigned wrap_r,
  91                        unsigned min_lod,
  92                        unsigned max_lod,
  93                        int lod_bias,
  94                        unsigned shadow_function,
  95                        bool non_normalized_coordinates,
  96                        uint32_t border_color_offset)
  97 {
  98    ss[0] = BRW_SAMPLER_LOD_PRECLAMP_ENABLE |
  99            SET_FIELD(mip_filter, BRW_SAMPLER_MIP_FILTER) |
 100            SET_FIELD(mag_filter, BRW_SAMPLER_MAG_FILTER) |
 101            SET_FIELD(min_filter, BRW_SAMPLER_MIN_FILTER);
 102
 103    ss[2] = border_color_offset;
 104    if (brw->gen < 6) {
 105       ss[2] += brw->batch.bo->offset64; /* reloc */
 106       drm_intel_bo_emit_reloc(brw->batch.bo,
 107                               batch_offset_for_sampler_state + 8,
 108                               brw->batch.bo, border_color_offset,
 109                               I915_GEM_DOMAIN_SAMPLER, 0);
 110    }
 111
 112    ss[3] = SET_FIELD(max_anisotropy, BRW_SAMPLER_MAX_ANISOTROPY) |
 113            SET_FIELD(address_rounding, BRW_SAMPLER_ADDRESS_ROUNDING);
 114
 115    if (brw->gen >= 7) {
 116       ss[0] |= SET_FIELD(lod_bias & 0x1fff, GEN7_SAMPLER_LOD_BIAS);
 117
 118       if (min_filter == BRW_MAPFILTER_ANISOTROPIC)
 119          ss[0] |= GEN7_SAMPLER_EWA_ANISOTROPIC_ALGORITHM;
 120
 121       ss[1] = SET_FIELD(min_lod, GEN7_SAMPLER_MIN_LOD) |
 122               SET_FIELD(max_lod, GEN7_SAMPLER_MAX_LOD) |
 123               SET_FIELD(shadow_function, GEN7_SAMPLER_SHADOW_FUNCTION);
 124
 125       ss[3] |= SET_FIELD(wrap_s, BRW_SAMPLER_TCX_WRAP_MODE) |
 126                SET_FIELD(wrap_t, BRW_SAMPLER_TCY_WRAP_MODE) |
 127                SET_FIELD(wrap_r, BRW_SAMPLER_TCZ_WRAP_MODE);
 128
 129       if (non_normalized_coordinates)
 130          ss[3] |= GEN7_SAMPLER_NON_NORMALIZED_COORDINATES;
 131    } else {
 132       ss[0] |= SET_FIELD(lod_bias & 0x7ff, GEN4_SAMPLER_LOD_BIAS) |
 133                SET_FIELD(shadow_function, GEN4_SAMPLER_SHADOW_FUNCTION);
 134
 135       if (brw->gen == 6 && min_filter != mag_filter)
 136          ss[0] |= GEN6_SAMPLER_MIN_MAG_NOT_EQUAL;
 137
 138       ss[1] = SET_FIELD(min_lod, GEN4_SAMPLER_MIN_LOD) |
 139               SET_FIELD(max_lod, GEN4_SAMPLER_MAX_LOD) |
 140               SET_FIELD(wrap_s, BRW_SAMPLER_TCX_WRAP_MODE) |
 141               SET_FIELD(wrap_t, BRW_SAMPLER_TCY_WRAP_MODE) |
 142               SET_FIELD(wrap_r, BRW_SAMPLER_TCZ_WRAP_MODE);
 143
 144       if (brw->gen >= 6 && non_normalized_coordinates)
 145          ss[3] |= GEN6_SAMPLER_NON_NORMALIZED_COORDINATES;
 146    }
 147 }
 148
 149 static uint32_t
 150 translate_wrap_mode(struct brw_context *brw, GLenum wrap, bool using_nearest)
 151 {
 152    switch( wrap ) {
 153    case GL_REPEAT:
 154       return BRW_TEXCOORDMODE_WRAP;
 155    case GL_CLAMP:
 156       /* GL_CLAMP is the weird mode where coordinates are clamped to
 157        * [0.0, 1.0], so linear filtering of coordinates outside of
 158        * [0.0, 1.0] give you half edge texel value and half border
 159        * color.
 160        *
 161        * Gen8+ supports this natively.
 162        */
 163       if (brw->gen >= 8)
 164          return GEN8_TEXCOORDMODE_HALF_BORDER;
 165
 166       /* On Gen4-7.5, we clamp the coordinates in the fragment shader
 167        * and set clamp_border here, which gets the result desired.
 168        * We just use clamp(_to_edge) for nearest, because for nearest
 169        * clamping to 1.0 gives border color instead of the desired
 170        * edge texels.
 171        */
 172       if (using_nearest)
 173          return BRW_TEXCOORDMODE_CLAMP;
 174       else
 175          return BRW_TEXCOORDMODE_CLAMP_BORDER;
 176    case GL_CLAMP_TO_EDGE:
 177       return BRW_TEXCOORDMODE_CLAMP;
 178    case GL_CLAMP_TO_BORDER:
 179       return BRW_TEXCOORDMODE_CLAMP_BORDER;
 180    case GL_MIRRORED_REPEAT:
 181       return BRW_TEXCOORDMODE_MIRROR;
 182    case GL_MIRROR_CLAMP_TO_EDGE:
 183       return BRW_TEXCOORDMODE_MIRROR_ONCE;
 184    default:
 185       return BRW_TEXCOORDMODE_WRAP;
 186    }
 187 }
 188
 189 /**
 190  * Return true if the given wrap mode requires the border color to exist.
 191  */
 192 static bool
 193 wrap_mode_needs_border_color(unsigned wrap_mode)
 194 {
 195    return wrap_mode == BRW_TEXCOORDMODE_CLAMP_BORDER ||
 196           wrap_mode == GEN8_TEXCOORDMODE_HALF_BORDER;
 197 }
 198
 199 static bool
 200 has_component(mesa_format format, int i)
 201 {
 202    if (_mesa_is_format_color_format(format))
 203       return _mesa_format_has_color_component(format, i);
 204
 205    /* depth and stencil have only one component */
 206    return i == 0;
 207 }
 208
 209 /**
 210  * Upload SAMPLER_BORDER_COLOR_STATE.
 211  */
 212 static void
 213 upload_default_color(struct brw_context *brw,
 214                      const struct gl_sampler_object *sampler,
 215                      mesa_format format, GLenum base_format,
 216                      bool is_integer_format,
 217                      uint32_t *sdc_offset)
 218 {
 219    union gl_color_union color;
 220
 221    switch (base_format) {
 222    case GL_DEPTH_COMPONENT:
 223       /* GL specs that border color for depth textures is taken from the
 224        * R channel, while the hardware uses A.  Spam R into all the
 225        * channels for safety.
 226        */
 227       color.ui[0] = sampler->BorderColor.ui[0];
 228       color.ui[1] = sampler->BorderColor.ui[0];
 229       color.ui[2] = sampler->BorderColor.ui[0];
 230       color.ui[3] = sampler->BorderColor.ui[0];
 231       break;
 232    case GL_ALPHA:
 233       color.ui[0] = 0u;
 234       color.ui[1] = 0u;
 235       color.ui[2] = 0u;
 236       color.ui[3] = sampler->BorderColor.ui[3];
 237       break;
 238    case GL_INTENSITY:
 239       color.ui[0] = sampler->BorderColor.ui[0];
 240       color.ui[1] = sampler->BorderColor.ui[0];
 241       color.ui[2] = sampler->BorderColor.ui[0];
 242       color.ui[3] = sampler->BorderColor.ui[0];
 243       break;
 244    case GL_LUMINANCE:
 245       color.ui[0] = sampler->BorderColor.ui[0];
 246       color.ui[1] = sampler->BorderColor.ui[0];
 247       color.ui[2] = sampler->BorderColor.ui[0];
 248       color.ui[3] = float_as_int(1.0);
 249       break;
 250    case GL_LUMINANCE_ALPHA:
 251       color.ui[0] = sampler->BorderColor.ui[0];
 252       color.ui[1] = sampler->BorderColor.ui[0];
 253       color.ui[2] = sampler->BorderColor.ui[0];
 254       color.ui[3] = sampler->BorderColor.ui[3];
 255       break;
 256    default:
 257       color.ui[0] = sampler->BorderColor.ui[0];
 258       color.ui[1] = sampler->BorderColor.ui[1];
 259       color.ui[2] = sampler->BorderColor.ui[2];
 260       color.ui[3] = sampler->BorderColor.ui[3];
 261       break;
 262    }
 263
 264    /* In some cases we use an RGBA surface format for GL RGB textures,
 265     * where we've initialized the A channel to 1.0.  We also have to set
 266     * the border color alpha to 1.0 in that case.
 267     */
 268    if (base_format == GL_RGB)
 269       color.ui[3] = float_as_int(1.0);
 270
 271    if (brw->gen >= 8) {
 272       /* On Broadwell, the border color is represented as four 32-bit floats,
 273        * integers, or unsigned values, interpreted according to the surface
 274        * format.  This matches the sampler->BorderColor union exactly; just
 275        * memcpy the values.
 276        */
 277       uint32_t *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
 278                                       4 * 4, 64, sdc_offset);
 279       memcpy(sdc, color.ui, 4 * 4);
 280    } else if (brw->is_haswell && is_integer_format) {
 281       /* Haswell's integer border color support is completely insane:
 282        * SAMPLER_BORDER_COLOR_STATE is 20 DWords.  The first four are
 283        * for float colors.  The next 12 DWords are MBZ and only exist to
 284        * pad it out to a 64 byte cacheline boundary.  DWords 16-19 then
 285        * contain integer colors; these are only used if SURFACE_STATE
 286        * has the "Integer Surface Format" bit set.  Even then, the
 287        * arrangement of the RGBA data devolves into madness.
 288        */
 289       uint32_t *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
 290                                       20 * 4, 512, sdc_offset);
 291       memset(sdc, 0, 20 * 4);
 292       sdc = &sdc[16];
 293
 294       const int bits_per_channel =
 295          _mesa_get_format_bits(format,
 296                                format == MESA_FORMAT_S_UINT8 ?
 297                                GL_STENCIL_BITS : GL_RED_BITS);
 298
 299       /* From the Haswell PRM, "Command Reference: Structures", Page 36:
 300        * "If any color channel is missing from the surface format,
 301        *  corresponding border color should be programmed as zero and if
 302        *  alpha channel is missing, corresponding Alpha border color should
 303        *  be programmed as 1."
 304        */
 305       unsigned c[4] = { 0, 0, 0, 1 };
 306       for (int i = 0; i < 4; i++) {
 307          if (has_component(format, i))
 308             c[i] = color.ui[i];
 309       }
 310
 311       switch (bits_per_channel) {
 312       case 8:
 313          /* Copy RGBA in order. */
 314          for (int i = 0; i < 4; i++)
 315             ((uint8_t *) sdc)[i] = c[i];
 316          break;
 317       case 10:
 318          /* R10G10B10A2_UINT is treated like a 16-bit format. */
 319       case 16:
 320          ((uint16_t *) sdc)[0] = c[0]; /* R -> DWord 0, bits 15:0  */
 321          ((uint16_t *) sdc)[1] = c[1]; /* G -> DWord 0, bits 31:16 */
 322          /* DWord 1 is Reserved/MBZ! */
 323          ((uint16_t *) sdc)[4] = c[2]; /* B -> DWord 2, bits 15:0  */
 324          ((uint16_t *) sdc)[5] = c[3]; /* A -> DWord 3, bits 31:16 */
 325          break;
 326       case 32:
 327          if (base_format == GL_RG) {
 328             /* Careful inspection of the tables reveals that for RG32 formats,
 329              * the green channel needs to go where blue normally belongs.
 330              */
 331             sdc[0] = c[0];
 332             sdc[2] = c[1];
 333             sdc[3] = 1;
 334          } else {
 335             /* Copy RGBA in order. */
 336             for (int i = 0; i < 4; i++)
 337                sdc[i] = c[i];
 338          }
 339          break;
 340       default:
 341          assert(!"Invalid number of bits per channel in integer format.");
 342          break;
 343       }
 344    } else if (brw->gen == 5 || brw->gen == 6) {
 345       struct gen5_sampler_default_color *sdc;
 346
 347       sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
 348                             sizeof(*sdc), 32, sdc_offset);
 349
 350       memset(sdc, 0, sizeof(*sdc));
 351
 352       UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[0], color.f[0]);
 353       UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[1], color.f[1]);
 354       UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[2], color.f[2]);
 355       UNCLAMPED_FLOAT_TO_UBYTE(sdc->ub[3], color.f[3]);
 356
 357       UNCLAMPED_FLOAT_TO_USHORT(sdc->us[0], color.f[0]);
 358       UNCLAMPED_FLOAT_TO_USHORT(sdc->us[1], color.f[1]);
 359       UNCLAMPED_FLOAT_TO_USHORT(sdc->us[2], color.f[2]);
 360       UNCLAMPED_FLOAT_TO_USHORT(sdc->us[3], color.f[3]);
 361
 362       UNCLAMPED_FLOAT_TO_SHORT(sdc->s[0], color.f[0]);
 363       UNCLAMPED_FLOAT_TO_SHORT(sdc->s[1], color.f[1]);
 364       UNCLAMPED_FLOAT_TO_SHORT(sdc->s[2], color.f[2]);
 365       UNCLAMPED_FLOAT_TO_SHORT(sdc->s[3], color.f[3]);
 366
 367       sdc->hf[0] = _mesa_float_to_half(color.f[0]);
 368       sdc->hf[1] = _mesa_float_to_half(color.f[1]);
 369       sdc->hf[2] = _mesa_float_to_half(color.f[2]);
 370       sdc->hf[3] = _mesa_float_to_half(color.f[3]);
 371
 372       sdc->b[0] = sdc->s[0] >> 8;
 373       sdc->b[1] = sdc->s[1] >> 8;
 374       sdc->b[2] = sdc->s[2] >> 8;
 375       sdc->b[3] = sdc->s[3] >> 8;
 376
 377       sdc->f[0] = color.f[0];
 378       sdc->f[1] = color.f[1];
 379       sdc->f[2] = color.f[2];
 380       sdc->f[3] = color.f[3];
 381    } else {
 382       float *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR,
 383                                    4 * 4, 32, sdc_offset);
 384       memcpy(sdc, color.f, 4 * 4);
 385    }
 386 }
 387
 388 /**
 389  * Sets the sampler state for a single unit based off of the sampler key
 390  * entry.
 391  */
 392 void
 393 brw_update_sampler_state(struct brw_context *brw,
 394                          GLenum target, bool tex_cube_map_seamless,
 395                          GLfloat tex_unit_lod_bias,
 396                          mesa_format format, GLenum base_format,
 397                          bool is_integer_format,
 398                          const struct gl_sampler_object *sampler,
 399                          uint32_t *sampler_state,
 400                          uint32_t batch_offset_for_sampler_state)
 401 {
 402    unsigned min_filter, mag_filter, mip_filter;
 403
 404    /* Select min and mip filters. */
 405    switch (sampler->MinFilter) {
 406    case GL_NEAREST:
 407       min_filter = BRW_MAPFILTER_NEAREST;
 408       mip_filter = BRW_MIPFILTER_NONE;
 409       break;
 410    case GL_LINEAR:
 411       min_filter = BRW_MAPFILTER_LINEAR;
 412       mip_filter = BRW_MIPFILTER_NONE;
 413       break;
 414    case GL_NEAREST_MIPMAP_NEAREST:
 415       min_filter = BRW_MAPFILTER_NEAREST;
 416       mip_filter = BRW_MIPFILTER_NEAREST;
 417       break;
 418    case GL_LINEAR_MIPMAP_NEAREST:
 419       min_filter = BRW_MAPFILTER_LINEAR;
 420       mip_filter = BRW_MIPFILTER_NEAREST;
 421       break;
 422    case GL_NEAREST_MIPMAP_LINEAR:
 423       min_filter = BRW_MAPFILTER_NEAREST;
 424       mip_filter = BRW_MIPFILTER_LINEAR;
 425       break;
 426    case GL_LINEAR_MIPMAP_LINEAR:
 427       min_filter = BRW_MAPFILTER_LINEAR;
 428       mip_filter = BRW_MIPFILTER_LINEAR;
 429       break;
 430    default:
 431       unreachable("not reached");
 432    }
 433
 434    /* Select mag filter. */
 435    if (sampler->MagFilter == GL_LINEAR)
 436       mag_filter = BRW_MAPFILTER_LINEAR;
 437    else
 438       mag_filter = BRW_MAPFILTER_NEAREST;
 439
 440    /* Enable anisotropic filtering if desired. */
 441    unsigned max_anisotropy = BRW_ANISORATIO_2;
 442    if (sampler->MaxAnisotropy > 1.0f) {
 443       min_filter = BRW_MAPFILTER_ANISOTROPIC;
 444       mag_filter = BRW_MAPFILTER_ANISOTROPIC;
 445
 446       if (sampler->MaxAnisotropy > 2.0f) {
 447          max_anisotropy =
 448             MIN2((sampler->MaxAnisotropy - 2) / 2, BRW_ANISORATIO_16);
 449       }
 450    }
 451
 452    /* Set address rounding bits if not using nearest filtering. */
 453    unsigned address_rounding = 0;
 454    if (min_filter != BRW_MAPFILTER_NEAREST) {
 455       address_rounding |= BRW_ADDRESS_ROUNDING_ENABLE_U_MIN |
 456                           BRW_ADDRESS_ROUNDING_ENABLE_V_MIN |
 457                           BRW_ADDRESS_ROUNDING_ENABLE_R_MIN;
 458    }
 459    if (mag_filter != BRW_MAPFILTER_NEAREST) {
 460       address_rounding |= BRW_ADDRESS_ROUNDING_ENABLE_U_MAG |
 461                           BRW_ADDRESS_ROUNDING_ENABLE_V_MAG |
 462                           BRW_ADDRESS_ROUNDING_ENABLE_R_MAG;
 463    }
 464
 465    bool either_nearest =
 466       sampler->MinFilter == GL_NEAREST || sampler->MagFilter == GL_NEAREST;
 467    unsigned wrap_s = translate_wrap_mode(brw, sampler->WrapS, either_nearest);
 468    unsigned wrap_t = translate_wrap_mode(brw, sampler->WrapT, either_nearest);
 469    unsigned wrap_r = translate_wrap_mode(brw, sampler->WrapR, either_nearest);
 470
 471    if (target == GL_TEXTURE_CUBE_MAP ||
 472        target == GL_TEXTURE_CUBE_MAP_ARRAY) {
 473       /* Cube maps must use the same wrap mode for all three coordinate
 474        * dimensions.  Prior to Haswell, only CUBE and CLAMP are valid.
 475        *
 476        * Ivybridge and Baytrail seem to have problems with CUBE mode and
 477        * integer formats.  Fall back to CLAMP for now.
 478        */
 479       if ((tex_cube_map_seamless || sampler->CubeMapSeamless) &&
 480           !(brw->gen == 7 && !brw->is_haswell && is_integer_format)) {
 481          wrap_s = BRW_TEXCOORDMODE_CUBE;
 482          wrap_t = BRW_TEXCOORDMODE_CUBE;
 483          wrap_r = BRW_TEXCOORDMODE_CUBE;
 484       } else {
 485          wrap_s = BRW_TEXCOORDMODE_CLAMP;
 486          wrap_t = BRW_TEXCOORDMODE_CLAMP;
 487          wrap_r = BRW_TEXCOORDMODE_CLAMP;
 488       }
 489    } else if (target == GL_TEXTURE_1D) {
 490       /* There's a bug in 1D texture sampling - it actually pays
 491        * attention to the wrap_t value, though it should not.
 492        * Override the wrap_t value here to GL_REPEAT to keep
 493        * any nonexistent border pixels from floating in.
 494        */
 495       wrap_t = BRW_TEXCOORDMODE_WRAP;
 496    }
 497
 498    /* Set shadow function. */
 499    unsigned shadow_function = 0;
 500    if (sampler->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB) {
 501       shadow_function =
 502          intel_translate_shadow_compare_func(sampler->CompareFunc);
 503    }
 504
 505    const int lod_bits = brw->gen >= 7 ? 8 : 6;
 506    const unsigned min_lod = U_FIXED(CLAMP(sampler->MinLod, 0, 13), lod_bits);
 507    const unsigned max_lod = U_FIXED(CLAMP(sampler->MaxLod, 0, 13), lod_bits);
 508    const int lod_bias =
 509       S_FIXED(CLAMP(tex_unit_lod_bias + sampler->LodBias, -16, 15), lod_bits);
 510
 511    /* Upload the border color if necessary.  If not, just point it at
 512     * offset 0 (the start of the batch) - the color should be ignored,
 513     * but that address won't fault in case something reads it anyway.
 514     */
 515    uint32_t border_color_offset = 0;
 516    if (wrap_mode_needs_border_color(wrap_s) ||
 517        wrap_mode_needs_border_color(wrap_t) ||
 518        wrap_mode_needs_border_color(wrap_r)) {
 519       upload_default_color(brw, sampler,
 520                            format, base_format, is_integer_format,
 521                            &border_color_offset);
 522    }
 523
 524    const bool non_normalized_coords = target == GL_TEXTURE_RECTANGLE;
 525
 526    brw_emit_sampler_state(brw,
 527                           sampler_state,
 528                           batch_offset_for_sampler_state,
 529                           min_filter, mag_filter, mip_filter,
 530                           max_anisotropy,
 531                           address_rounding,
 532                           wrap_s, wrap_t, wrap_r,
 533                           min_lod, max_lod, lod_bias,
 534                           shadow_function,
 535                           non_normalized_coords,
 536                           border_color_offset);
 537 }
 538
 539 static void
 540 update_sampler_state(struct brw_context *brw,
 541                      int unit,
 542                      uint32_t *sampler_state,
 543                      uint32_t batch_offset_for_sampler_state)
 544 {
 545    struct gl_context *ctx = &brw->ctx;
 546    const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
 547    const struct gl_texture_object *texObj = texUnit->_Current;
 548    const struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
 549
 550    /* These don't use samplers at all. */
 551    if (texObj->Target == GL_TEXTURE_BUFFER)
 552       return;
 553
 554    struct gl_texture_image *firstImage = texObj->Image[0][texObj->BaseLevel];
 555    brw_update_sampler_state(brw, texObj->Target, ctx->Texture.CubeMapSeamless,
 556                             texUnit->LodBias,
 557                             firstImage->TexFormat, firstImage->_BaseFormat,
 558                             texObj->_IsIntegerFormat,
 559                             sampler,
 560                             sampler_state, batch_offset_for_sampler_state);
 561 }
 562
 563 static void
 564 brw_upload_sampler_state_table(struct brw_context *brw,
 565                                struct gl_program *prog,
 566                                struct brw_stage_state *stage_state)
 567 {
 568    struct gl_context *ctx = &brw->ctx;
 569    uint32_t sampler_count = stage_state->sampler_count;
 570
 571    GLbitfield SamplersUsed = prog->SamplersUsed;
 572
 573    if (sampler_count == 0)
 574       return;
 575
 576    /* SAMPLER_STATE is 4 DWords on all platforms. */
 577    const int dwords = 4;
 578    const int size_in_bytes = dwords * sizeof(uint32_t);
 579
 580    uint32_t *sampler_state = brw_state_batch(brw, AUB_TRACE_SAMPLER_STATE,
 581                                              sampler_count * size_in_bytes,
 582                                              32, &stage_state->sampler_offset);
 583    memset(sampler_state, 0, sampler_count * size_in_bytes);
 584
 585    uint32_t batch_offset_for_sampler_state = stage_state->sampler_offset;
 586
 587    for (unsigned s = 0; s < sampler_count; s++) {
 588       if (SamplersUsed & (1 << s)) {
 589          const unsigned unit = prog->SamplerUnits[s];
 590          if (ctx->Texture.Unit[unit]._Current) {
 591             update_sampler_state(brw, unit, sampler_state,
 592                                      batch_offset_for_sampler_state);
 593          }
 594       }
 595
 596       sampler_state += dwords;
 597       batch_offset_for_sampler_state += size_in_bytes;
 598    }
 599
 600    if (brw->gen >= 7 && stage_state->stage != MESA_SHADER_COMPUTE) {
 601       /* Emit a 3DSTATE_SAMPLER_STATE_POINTERS_XS packet. */
 602       gen7_emit_sampler_state_pointers_xs(brw, stage_state);
 603    } else {
 604       /* Flag that the sampler state table pointer has changed; later atoms
 605        * will handle it.
 606        */
 607       brw->ctx.NewDriverState |= BRW_NEW_SAMPLER_STATE_TABLE;
 608    }
 609 }
 610
 611 static void
 612 brw_upload_fs_samplers(struct brw_context *brw)
 613 {
 614    /* BRW_NEW_FRAGMENT_PROGRAM */
 615    struct gl_program *fs = (struct gl_program *) brw->fragment_program;
 616    brw_upload_sampler_state_table(brw, fs, &brw->wm.base);
 617 }
 618
 619 const struct brw_tracked_state brw_fs_samplers = {
 620    .dirty = {
 621       .mesa = _NEW_TEXTURE,
 622       .brw = BRW_NEW_BATCH |
 623              BRW_NEW_BLORP |
 624              BRW_NEW_FRAGMENT_PROGRAM,
 625    },
 626    .emit = brw_upload_fs_samplers,
 627 };
 628
 629 static void
 630 brw_upload_vs_samplers(struct brw_context *brw)
 631 {
 632    /* BRW_NEW_VERTEX_PROGRAM */
 633    struct gl_program *vs = (struct gl_program *) brw->vertex_program;
 634    brw_upload_sampler_state_table(brw, vs, &brw->vs.base);
 635 }
 636
 637
 638 const struct brw_tracked_state brw_vs_samplers = {
 639    .dirty = {
 640       .mesa = _NEW_TEXTURE,
 641       .brw = BRW_NEW_BATCH |
 642              BRW_NEW_BLORP |
 643              BRW_NEW_VERTEX_PROGRAM,
 644    },
 645    .emit = brw_upload_vs_samplers,
 646 };
 647
 648
 649 static void
 650 brw_upload_gs_samplers(struct brw_context *brw)
 651 {
 652    /* BRW_NEW_GEOMETRY_PROGRAM */
 653    struct gl_program *gs = (struct gl_program *) brw->geometry_program;
 654    if (!gs)
 655       return;
 656
 657    brw_upload_sampler_state_table(brw, gs, &brw->gs.base);
 658 }
 659
 660
 661 const struct brw_tracked_state brw_gs_samplers = {
 662    .dirty = {
 663       .mesa = _NEW_TEXTURE,
 664       .brw = BRW_NEW_BATCH |
 665              BRW_NEW_BLORP |
 666              BRW_NEW_GEOMETRY_PROGRAM,
 667    },
 668    .emit = brw_upload_gs_samplers,
 669 };
 670
 671
 672 static void
 673 brw_upload_tcs_samplers(struct brw_context *brw)
 674 {
 675    /* BRW_NEW_TESS_PROGRAMS */
 676    struct gl_program *tcs = (struct gl_program *) brw->tess_ctrl_program;
 677    if (!tcs)
 678       return;
 679
 680    brw_upload_sampler_state_table(brw, tcs, &brw->tcs.base);
 681 }
 682
 683
 684 const struct brw_tracked_state brw_tcs_samplers = {
 685    .dirty = {
 686       .mesa = _NEW_TEXTURE,
 687       .brw = BRW_NEW_BATCH |
 688              BRW_NEW_BLORP |
 689              BRW_NEW_TESS_PROGRAMS,
 690    },
 691    .emit = brw_upload_tcs_samplers,
 692 };
 693
 694
 695 static void
 696 brw_upload_tes_samplers(struct brw_context *brw)
 697 {
 698    /* BRW_NEW_TESS_PROGRAMS */
 699    struct gl_program *tes = (struct gl_program *) brw->tess_eval_program;
 700    if (!tes)
 701       return;
 702
 703    brw_upload_sampler_state_table(brw, tes, &brw->tes.base);
 704 }
 705
 706
 707 const struct brw_tracked_state brw_tes_samplers = {
 708    .dirty = {
 709       .mesa = _NEW_TEXTURE,
 710       .brw = BRW_NEW_BATCH |
 711              BRW_NEW_BLORP |
 712              BRW_NEW_TESS_PROGRAMS,
 713    },
 714    .emit = brw_upload_tes_samplers,
 715 };
 716
 717 static void
 718 brw_upload_cs_samplers(struct brw_context *brw)
 719 {
 720    /* BRW_NEW_COMPUTE_PROGRAM */
 721    struct gl_program *cs = (struct gl_program *) brw->compute_program;
 722    if (!cs)
 723       return;
 724
 725    brw_upload_sampler_state_table(brw, cs, &brw->cs.base);
 726 }
 727
 728 const struct brw_tracked_state brw_cs_samplers = {
 729    .dirty = {
 730       .mesa = _NEW_TEXTURE,
 731       .brw = BRW_NEW_BATCH |
 732              BRW_NEW_BLORP |
 733              BRW_NEW_COMPUTE_PROGRAM,
 734    },
 735    .emit = brw_upload_cs_samplers,
 736 };