src/mesa/drivers/dri/i965/brw_sf_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33
  34 #include "main/mtypes.h"
  35 #include "main/macros.h"
  36 #include "main/fbobject.h"
  37 #include "main/viewport.h"
  38 #include "intel_batchbuffer.h"
  39 #include "brw_context.h"
  40 #include "brw_state.h"
  41 #include "brw_defines.h"
  42 #include "brw_util.h"
  43
  44 static void upload_sf_unit( struct brw_context *brw )
  45 {
  46    struct gl_context *ctx = &brw->ctx;
  47    struct brw_sf_unit_state *sf;
  48    int chipset_max_threads;
  49    bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
  50
  51    sf = brw_state_batch(brw, sizeof(*sf), 64, &brw->sf.state_offset);
  52
  53    memset(sf, 0, sizeof(*sf));
  54
  55    /* BRW_NEW_PROGRAM_CACHE | BRW_NEW_SF_PROG_DATA */
  56    sf->thread0.grf_reg_count = ALIGN(brw->sf.prog_data->total_grf, 16) / 16 - 1;
  57    sf->thread0.kernel_start_pointer =
  58       brw_program_reloc(brw,
  59                         brw->sf.state_offset +
  60                         offsetof(struct brw_sf_unit_state, thread0),
  61                         brw->sf.prog_offset +
  62                         (sf->thread0.grf_reg_count << 1)) >> 6;
  63
  64    sf->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
  65
  66    sf->thread3.dispatch_grf_start_reg = 3;
  67    sf->thread3.urb_entry_read_offset = BRW_SF_URB_ENTRY_READ_OFFSET;
  68
  69    /* BRW_NEW_SF_PROG_DATA */
  70    sf->thread3.urb_entry_read_length = brw->sf.prog_data->urb_read_length;
  71
  72    /* BRW_NEW_URB_FENCE */
  73    sf->thread4.nr_urb_entries = brw->urb.nr_sf_entries;
  74    sf->thread4.urb_entry_allocation_size = brw->urb.sfsize - 1;
  75
  76    /* Each SF thread produces 1 PUE, and there can be up to 24 (Pre-Ironlake) or
  77     * 48 (Ironlake) threads.
  78     */
  79    if (brw->gen == 5)
  80       chipset_max_threads = 48;
  81    else
  82       chipset_max_threads = 24;
  83
  84    /* BRW_NEW_URB_FENCE */
  85    sf->thread4.max_threads = MIN2(chipset_max_threads,
  86                                   brw->urb.nr_sf_entries) - 1;
  87
  88    /* BRW_NEW_SF_VP */
  89    sf->sf5.sf_viewport_state_offset = (brw->batch.bo->offset64 +
  90                                        brw->sf.vp_offset) >> 5; /* reloc */
  91
  92    sf->sf5.viewport_transform = 1;
  93
  94    sf->sf6.scissor = 1;
  95
  96    /* _NEW_POLYGON */
  97    if (brw->polygon_front_bit)
  98       sf->sf5.front_winding = BRW_FRONTWINDING_CW;
  99    else
 100       sf->sf5.front_winding = BRW_FRONTWINDING_CCW;
 101
 102    /* _NEW_BUFFERS
 103     * The viewport is inverted for rendering to a FBO, and that inverts
 104     * polygon front/back orientation.
 105     */
 106    sf->sf5.front_winding ^= render_to_fbo;
 107
 108    /* _NEW_POLYGON */
 109    switch (ctx->Polygon.CullFlag ? ctx->Polygon.CullFaceMode : GL_NONE) {
 110    case GL_FRONT:
 111       sf->sf6.cull_mode = BRW_CULLMODE_FRONT;
 112       break;
 113    case GL_BACK:
 114       sf->sf6.cull_mode = BRW_CULLMODE_BACK;
 115       break;
 116    case GL_FRONT_AND_BACK:
 117       sf->sf6.cull_mode = BRW_CULLMODE_BOTH;
 118       break;
 119    case GL_NONE:
 120       sf->sf6.cull_mode = BRW_CULLMODE_NONE;
 121       break;
 122    default:
 123       unreachable("not reached");
 124    }
 125
 126    /* _NEW_LINE */
 127    sf->sf6.line_width = U_FIXED(brw_get_line_width(brw), 1);
 128
 129    if (ctx->Line.SmoothFlag) {
 130       sf->sf6.aa_enable = 1;
 131       sf->sf6.line_endcap_aa_region_width = 1;
 132    }
 133
 134    sf->sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT;
 135
 136    /* _NEW_POINT */
 137    sf->sf7.sprite_point = ctx->Point.PointSprite;
 138
 139    float point_sz;
 140    point_sz = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
 141    point_sz = CLAMP(point_sz, 0.125f, 255.875f);
 142    sf->sf7.point_size = U_FIXED(point_sz, 3);
 143
 144    /* _NEW_PROGRAM | _NEW_POINT, BRW_NEW_VUE_MAP_GEOM_OUT */
 145    sf->sf7.use_point_size_state = use_state_point_size(brw);
 146    sf->sf7.aa_line_distance_mode = brw->is_g4x || brw->gen == 5;
 147
 148    /* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons:
 149     * _NEW_LIGHT
 150     */
 151    if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
 152       sf->sf7.trifan_pv = 2;
 153       sf->sf7.linestrip_pv = 1;
 154       sf->sf7.tristrip_pv = 2;
 155    } else {
 156       sf->sf7.trifan_pv = 1;
 157       sf->sf7.linestrip_pv = 0;
 158       sf->sf7.tristrip_pv = 0;
 159    }
 160    sf->sf7.line_last_pixel_enable = 0;
 161
 162    /* Set bias for OpenGL rasterization rules:
 163     */
 164    sf->sf6.dest_org_vbias = 0x8;
 165    sf->sf6.dest_org_hbias = 0x8;
 166
 167    /* STATE_PREFETCH command description describes this state as being
 168     * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain.
 169     */
 170
 171    /* Emit SF viewport relocation */
 172    brw_emit_reloc(&brw->batch,
 173                   brw->sf.state_offset +
 174                   offsetof(struct brw_sf_unit_state, sf5),
 175                   brw->batch.bo,
 176                   brw->sf.vp_offset | sf->sf5.front_winding |
 177                   (sf->sf5.viewport_transform << 1),
 178                   I915_GEM_DOMAIN_INSTRUCTION, 0);
 179
 180    brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE;
 181 }
 182
 183 const struct brw_tracked_state brw_sf_unit = {
 184    .dirty = {
 185       .mesa  = _NEW_BUFFERS |
 186                _NEW_LIGHT |
 187                _NEW_LINE |
 188                _NEW_POINT |
 189                _NEW_POLYGON |
 190                _NEW_PROGRAM,
 191       .brw   = BRW_NEW_BATCH |
 192                BRW_NEW_BLORP |
 193                BRW_NEW_PROGRAM_CACHE |
 194                BRW_NEW_SF_PROG_DATA |
 195                BRW_NEW_SF_VP |
 196                BRW_NEW_VUE_MAP_GEOM_OUT |
 197                BRW_NEW_URB_FENCE,
 198    },
 199    .emit = upload_sf_unit,
 200 };