src/mesa/drivers/dri/i965/brw_sf_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33
  34 #include "main/mtypes.h"
  35 #include "main/macros.h"
  36 #include "main/fbobject.h"
  37 #include "brw_context.h"
  38 #include "brw_state.h"
  39 #include "brw_defines.h"
  40 #include "brw_sf.h"
  41
  42 static void upload_sf_vp(struct brw_context *brw)
  43 {
  44    struct gl_context *ctx = &brw->ctx;
  45    const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
  46    struct brw_sf_viewport *sfv;
  47    GLfloat y_scale, y_bias;
  48    const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
  49    const GLfloat *v = ctx->ViewportArray[0]._WindowMap.m;
  50
  51    sfv = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE,
  52                          sizeof(*sfv), 32, &brw->sf.vp_offset);
  53    memset(sfv, 0, sizeof(*sfv));
  54
  55    if (render_to_fbo) {
  56       y_scale = 1.0;
  57       y_bias = 0;
  58    }
  59    else {
  60       y_scale = -1.0;
  61       y_bias = ctx->DrawBuffer->Height;
  62    }
  63
  64    /* _NEW_VIEWPORT */
  65
  66    sfv->viewport.m00 = v[MAT_SX];
  67    sfv->viewport.m11 = v[MAT_SY] * y_scale;
  68    sfv->viewport.m22 = v[MAT_SZ] * depth_scale;
  69    sfv->viewport.m30 = v[MAT_TX];
  70    sfv->viewport.m31 = v[MAT_TY] * y_scale + y_bias;
  71    sfv->viewport.m32 = v[MAT_TZ] * depth_scale;
  72
  73    /* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT
  74     * for DrawBuffer->_[XY]{min,max}
  75     */
  76
  77    /* The scissor only needs to handle the intersection of drawable
  78     * and scissor rect, since there are no longer cliprects for shared
  79     * buffers with DRI2.
  80     *
  81     * Note that the hardware's coordinates are inclusive, while Mesa's min is
  82     * inclusive but max is exclusive.
  83     */
  84
  85    if (ctx->DrawBuffer->_Xmin == ctx->DrawBuffer->_Xmax ||
  86        ctx->DrawBuffer->_Ymin == ctx->DrawBuffer->_Ymax) {
  87       /* If the scissor was out of bounds and got clamped to 0
  88        * width/height at the bounds, the subtraction of 1 from
  89        * maximums could produce a negative number and thus not clip
  90        * anything.  Instead, just provide a min > max scissor inside
  91        * the bounds, which produces the expected no rendering.
  92        */
  93       sfv->scissor.xmin = 1;
  94       sfv->scissor.xmax = 0;
  95       sfv->scissor.ymin = 1;
  96       sfv->scissor.ymax = 0;
  97    } else if (render_to_fbo) {
  98       /* texmemory: Y=0=bottom */
  99       sfv->scissor.xmin = ctx->DrawBuffer->_Xmin;
 100       sfv->scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
 101       sfv->scissor.ymin = ctx->DrawBuffer->_Ymin;
 102       sfv->scissor.ymax = ctx->DrawBuffer->_Ymax - 1;
 103    }
 104    else {
 105       /* memory: Y=0=top */
 106       sfv->scissor.xmin = ctx->DrawBuffer->_Xmin;
 107       sfv->scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
 108       sfv->scissor.ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax;
 109       sfv->scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1;
 110    }
 111
 112    brw->ctx.NewDriverState |= BRW_NEW_SF_VP;
 113 }
 114
 115 const struct brw_tracked_state brw_sf_vp = {
 116    .dirty = {
 117       .mesa  = _NEW_BUFFERS |
 118                _NEW_SCISSOR |
 119                _NEW_VIEWPORT,
 120       .brw   = BRW_NEW_BATCH,
 121    },
 122    .emit = upload_sf_vp
 123 };
 124
 125 static void upload_sf_unit( struct brw_context *brw )
 126 {
 127    struct gl_context *ctx = &brw->ctx;
 128    struct brw_sf_unit_state *sf;
 129    drm_intel_bo *bo = brw->batch.bo;
 130    int chipset_max_threads;
 131    bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
 132
 133    sf = brw_state_batch(brw, AUB_TRACE_SF_STATE,
 134                         sizeof(*sf), 64, &brw->sf.state_offset);
 135
 136    memset(sf, 0, sizeof(*sf));
 137
 138    /* BRW_NEW_PROGRAM_CACHE | BRW_NEW_SF_PROG_DATA */
 139    sf->thread0.grf_reg_count = ALIGN(brw->sf.prog_data->total_grf, 16) / 16 - 1;
 140    sf->thread0.kernel_start_pointer =
 141       brw_program_reloc(brw,
 142                         brw->sf.state_offset +
 143                         offsetof(struct brw_sf_unit_state, thread0),
 144                         brw->sf.prog_offset +
 145                         (sf->thread0.grf_reg_count << 1)) >> 6;
 146
 147    sf->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
 148
 149    sf->thread3.dispatch_grf_start_reg = 3;
 150    sf->thread3.urb_entry_read_offset = BRW_SF_URB_ENTRY_READ_OFFSET;
 151
 152    /* BRW_NEW_SF_PROG_DATA */
 153    sf->thread3.urb_entry_read_length = brw->sf.prog_data->urb_read_length;
 154
 155    /* BRW_NEW_URB_FENCE */
 156    sf->thread4.nr_urb_entries = brw->urb.nr_sf_entries;
 157    sf->thread4.urb_entry_allocation_size = brw->urb.sfsize - 1;
 158
 159    /* Each SF thread produces 1 PUE, and there can be up to 24 (Pre-Ironlake) or
 160     * 48 (Ironlake) threads.
 161     */
 162    if (brw->gen == 5)
 163       chipset_max_threads = 48;
 164    else
 165       chipset_max_threads = 24;
 166
 167    /* BRW_NEW_URB_FENCE */
 168    sf->thread4.max_threads = MIN2(chipset_max_threads,
 169                                   brw->urb.nr_sf_entries) - 1;
 170
 171    if (unlikely(INTEL_DEBUG & DEBUG_STATS))
 172       sf->thread4.stats_enable = 1;
 173
 174    /* BRW_NEW_SF_VP */
 175    sf->sf5.sf_viewport_state_offset = (brw->batch.bo->offset64 +
 176                                        brw->sf.vp_offset) >> 5; /* reloc */
 177
 178    sf->sf5.viewport_transform = 1;
 179
 180    /* _NEW_SCISSOR */
 181    if (ctx->Scissor.EnableFlags)
 182       sf->sf6.scissor = 1;
 183
 184    /* _NEW_POLYGON */
 185    if (ctx->Polygon.FrontFace == GL_CCW)
 186       sf->sf5.front_winding = BRW_FRONTWINDING_CCW;
 187    else
 188       sf->sf5.front_winding = BRW_FRONTWINDING_CW;
 189
 190    /* _NEW_BUFFERS
 191     * The viewport is inverted for rendering to a FBO, and that inverts
 192     * polygon front/back orientation.
 193     */
 194    sf->sf5.front_winding ^= render_to_fbo;
 195
 196    /* _NEW_POLYGON */
 197    switch (ctx->Polygon.CullFlag ? ctx->Polygon.CullFaceMode : GL_NONE) {
 198    case GL_FRONT:
 199       sf->sf6.cull_mode = BRW_CULLMODE_FRONT;
 200       break;
 201    case GL_BACK:
 202       sf->sf6.cull_mode = BRW_CULLMODE_BACK;
 203       break;
 204    case GL_FRONT_AND_BACK:
 205       sf->sf6.cull_mode = BRW_CULLMODE_BOTH;
 206       break;
 207    case GL_NONE:
 208       sf->sf6.cull_mode = BRW_CULLMODE_NONE;
 209       break;
 210    default:
 211       unreachable("not reached");
 212    }
 213
 214    /* _NEW_LINE */
 215    sf->sf6.line_width =
 216       CLAMP(ctx->Line.Width, 1.0, ctx->Const.MaxLineWidth) * (1<<1);
 217
 218    sf->sf6.line_endcap_aa_region_width = 1;
 219    if (ctx->Line.SmoothFlag)
 220       sf->sf6.aa_enable = 1;
 221    else if (sf->sf6.line_width <= 0x2)
 222        sf->sf6.line_width = 0;
 223
 224    /* _NEW_BUFFERS */
 225    if (!render_to_fbo) {
 226       /* Rendering to an OpenGL window */
 227       sf->sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT;
 228    }
 229    else {
 230       /* If rendering to an FBO, the pixel coordinate system is
 231        * inverted with respect to the normal OpenGL coordinate
 232        * system, so BRW_RASTRULE_LOWER_RIGHT is correct.
 233        * But this value is listed as "Reserved, but not seen as useful"
 234        * in Intel documentation (page 212, "Point Rasterization Rule",
 235        * section 7.4 "SF Pipeline State Summary", of document
 236        * "Intel® 965 Express Chipset Family and Intel® G35 Express
 237        * Chipset Graphics Controller Programmer's Reference Manual,
 238        * Volume 2: 3D/Media", Revision 1.0b as of January 2008,
 239        * available at
 240        *     http://intellinuxgraphics.org/documentation.html
 241        * at the time of this writing).
 242        *
 243        * It does work on at least some devices, if not all;
 244        * if devices that don't support it can be identified,
 245        * the likely failure case is that points are rasterized
 246        * incorrectly, which is no worse than occurs without
 247        * the value, so we're using it here.
 248        */
 249       sf->sf6.point_rast_rule = BRW_RASTRULE_LOWER_RIGHT;
 250    }
 251    /* XXX clamp max depends on AA vs. non-AA */
 252
 253    /* _NEW_POINT */
 254    sf->sf7.sprite_point = ctx->Point.PointSprite;
 255    sf->sf7.point_size = CLAMP(rint(CLAMP(ctx->Point.Size,
 256                                          ctx->Point.MinSize,
 257                                          ctx->Point.MaxSize)), 1, 255) * (1<<3);
 258    /* _NEW_PROGRAM | _NEW_POINT */
 259    sf->sf7.use_point_size_state = !(ctx->VertexProgram.PointSizeEnabled ||
 260                                     ctx->Point._Attenuated);
 261    sf->sf7.aa_line_distance_mode = 0;
 262
 263    /* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons:
 264     * _NEW_LIGHT
 265     */
 266    if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
 267       sf->sf7.trifan_pv = 2;
 268       sf->sf7.linestrip_pv = 1;
 269       sf->sf7.tristrip_pv = 2;
 270    } else {
 271       sf->sf7.trifan_pv = 1;
 272       sf->sf7.linestrip_pv = 0;
 273       sf->sf7.tristrip_pv = 0;
 274    }
 275    sf->sf7.line_last_pixel_enable = 0;
 276
 277    /* Set bias for OpenGL rasterization rules:
 278     */
 279    sf->sf6.dest_org_vbias = 0x8;
 280    sf->sf6.dest_org_hbias = 0x8;
 281
 282    /* STATE_PREFETCH command description describes this state as being
 283     * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain.
 284     */
 285
 286    /* Emit SF viewport relocation */
 287    drm_intel_bo_emit_reloc(bo, (brw->sf.state_offset +
 288                                 offsetof(struct brw_sf_unit_state, sf5)),
 289                            brw->batch.bo, (brw->sf.vp_offset |
 290                                              sf->sf5.front_winding |
 291                                              (sf->sf5.viewport_transform << 1)),
 292                            I915_GEM_DOMAIN_INSTRUCTION, 0);
 293
 294    brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE;
 295 }
 296
 297 const struct brw_tracked_state brw_sf_unit = {
 298    .dirty = {
 299       .mesa  = _NEW_BUFFERS |
 300                _NEW_LIGHT |
 301                _NEW_LINE |
 302                _NEW_POINT |
 303                _NEW_POLYGON |
 304                _NEW_PROGRAM |
 305                _NEW_SCISSOR,
 306       .brw   = BRW_NEW_BATCH |
 307                BRW_NEW_PROGRAM_CACHE |
 308                BRW_NEW_SF_PROG_DATA |
 309                BRW_NEW_SF_VP |
 310                BRW_NEW_URB_FENCE,
 311    },
 312    .emit = upload_sf_unit,
 313 };