src/mesa/drivers/dri/i965/brw_sf_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33
  34 #include "brw_context.h"
  35 #include "brw_state.h"
  36 #include "brw_defines.h"
  37 #include "main/macros.h"
  38
  39 static void upload_sf_vp(struct brw_context *brw)
  40 {
  41    struct gl_context *ctx = &brw->intel.ctx;
  42    const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
  43    struct brw_sf_viewport sfv_stack, *sfv = &sfv_stack;
  44    GLfloat y_scale, y_bias;
  45    const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
  46    const GLfloat *v = ctx->Viewport._WindowMap.m;
  47
  48    memset(sfv, 0, sizeof(*sfv));
  49
  50    if (render_to_fbo) {
  51       y_scale = 1.0;
  52       y_bias = 0;
  53    }
  54    else {
  55       y_scale = -1.0;
  56       y_bias = ctx->DrawBuffer->Height;
  57    }
  58
  59    /* _NEW_VIEWPORT */
  60
  61    sfv->viewport.m00 = v[MAT_SX];
  62    sfv->viewport.m11 = v[MAT_SY] * y_scale;
  63    sfv->viewport.m22 = v[MAT_SZ] * depth_scale;
  64    sfv->viewport.m30 = v[MAT_TX];
  65    sfv->viewport.m31 = v[MAT_TY] * y_scale + y_bias;
  66    sfv->viewport.m32 = v[MAT_TZ] * depth_scale;
  67
  68    /* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT
  69     * for DrawBuffer->_[XY]{min,max}
  70     */
  71
  72    /* The scissor only needs to handle the intersection of drawable
  73     * and scissor rect, since there are no longer cliprects for shared
  74     * buffers with DRI2.
  75     *
  76     * Note that the hardware's coordinates are inclusive, while Mesa's min is
  77     * inclusive but max is exclusive.
  78     */
  79
  80    if (ctx->DrawBuffer->_Xmin == ctx->DrawBuffer->_Xmax ||
  81        ctx->DrawBuffer->_Ymin == ctx->DrawBuffer->_Ymax) {
  82       /* If the scissor was out of bounds and got clamped to 0
  83        * width/height at the bounds, the subtraction of 1 from
  84        * maximums could produce a negative number and thus not clip
  85        * anything.  Instead, just provide a min > max scissor inside
  86        * the bounds, which produces the expected no rendering.
  87        */
  88       sfv->scissor.xmin = 1;
  89       sfv->scissor.xmax = 0;
  90       sfv->scissor.ymin = 1;
  91       sfv->scissor.ymax = 0;
  92    } else if (render_to_fbo) {
  93       /* texmemory: Y=0=bottom */
  94       sfv->scissor.xmin = ctx->DrawBuffer->_Xmin;
  95       sfv->scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
  96       sfv->scissor.ymin = ctx->DrawBuffer->_Ymin;
  97       sfv->scissor.ymax = ctx->DrawBuffer->_Ymax - 1;
  98    }
  99    else {
 100       /* memory: Y=0=top */
 101       sfv->scissor.xmin = ctx->DrawBuffer->_Xmin;
 102       sfv->scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
 103       sfv->scissor.ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax;
 104       sfv->scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1;
 105    }
 106
 107    drm_intel_bo_unreference(brw->sf.vp_bo);
 108    brw->sf.vp_bo = brw_cache_data(&brw->cache, BRW_SF_VP, sfv, sizeof(*sfv));
 109 }
 110
 111 const struct brw_tracked_state brw_sf_vp = {
 112    .dirty = {
 113       .mesa  = (_NEW_VIEWPORT |
 114                 _NEW_SCISSOR |
 115                 _NEW_BUFFERS),
 116       .brw   = 0,
 117       .cache = 0
 118    },
 119    .prepare = upload_sf_vp
 120 };
 121
 122 struct brw_sf_unit_key {
 123    unsigned int total_grf;
 124    unsigned int urb_entry_read_length;
 125
 126    unsigned int nr_urb_entries, urb_size, sfsize;
 127
 128    GLenum front_face, cull_face;
 129    unsigned pv_first:1;
 130    unsigned scissor:1;
 131    unsigned line_smooth:1;
 132    unsigned point_sprite:1;
 133    unsigned use_vs_point_size:1;
 134    unsigned render_to_fbo:1;
 135    float line_width;
 136    float point_size;
 137 };
 138
 139 static void
 140 sf_unit_populate_key(struct brw_context *brw, struct brw_sf_unit_key *key)
 141 {
 142    struct gl_context *ctx = &brw->intel.ctx;
 143    memset(key, 0, sizeof(*key));
 144
 145    /* CACHE_NEW_SF_PROG */
 146    key->total_grf = brw->sf.prog_data->total_grf;
 147    key->urb_entry_read_length = brw->sf.prog_data->urb_read_length;
 148
 149    /* BRW_NEW_URB_FENCE */
 150    key->nr_urb_entries = brw->urb.nr_sf_entries;
 151    key->urb_size = brw->urb.vsize;
 152    key->sfsize = brw->urb.sfsize;
 153
 154    key->scissor = ctx->Scissor.Enabled;
 155    key->front_face = ctx->Polygon.FrontFace;
 156
 157    if (ctx->Polygon.CullFlag)
 158       key->cull_face = ctx->Polygon.CullFaceMode;
 159    else
 160       key->cull_face = GL_NONE;
 161
 162    key->line_width = ctx->Line.Width;
 163    key->line_smooth = ctx->Line.SmoothFlag;
 164
 165    key->point_sprite = ctx->Point.PointSprite;
 166    key->point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
 167    key->use_vs_point_size = (ctx->VertexProgram.PointSizeEnabled ||
 168                              ctx->Point._Attenuated);
 169
 170    /* _NEW_LIGHT */
 171    key->pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION);
 172
 173    key->render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
 174 }
 175
 176 static drm_intel_bo *
 177 sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
 178                         drm_intel_bo **reloc_bufs)
 179 {
 180    struct intel_context *intel = &brw->intel;
 181    struct brw_sf_unit_state sf_stack, *sf = &sf_stack;
 182    drm_intel_bo *bo;
 183    int chipset_max_threads;
 184
 185    memset(sf, 0, sizeof(*sf));
 186
 187    sf->thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
 188    sf->thread0.kernel_start_pointer = brw->sf.prog_bo->offset >> 6; /* reloc */
 189
 190    sf->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
 191
 192    sf->thread3.dispatch_grf_start_reg = 3;
 193
 194    if (intel->gen == 5)
 195        sf->thread3.urb_entry_read_offset = 3;
 196    else
 197        sf->thread3.urb_entry_read_offset = 1;
 198
 199    sf->thread3.urb_entry_read_length = key->urb_entry_read_length;
 200
 201    sf->thread4.nr_urb_entries = key->nr_urb_entries;
 202    sf->thread4.urb_entry_allocation_size = key->sfsize - 1;
 203
 204    /* Each SF thread produces 1 PUE, and there can be up to 24 (Pre-Ironlake) or
 205     * 48 (Ironlake) threads.
 206     */
 207    if (intel->gen == 5)
 208       chipset_max_threads = 48;
 209    else
 210       chipset_max_threads = 24;
 211
 212    sf->thread4.max_threads = MIN2(chipset_max_threads, key->nr_urb_entries) - 1;
 213
 214    if (unlikely(INTEL_DEBUG & DEBUG_SINGLE_THREAD))
 215       sf->thread4.max_threads = 0;
 216
 217    if (unlikely(INTEL_DEBUG & DEBUG_STATS))
 218       sf->thread4.stats_enable = 1;
 219
 220    /* CACHE_NEW_SF_VP */
 221    sf->sf5.sf_viewport_state_offset = brw->sf.vp_bo->offset >> 5; /* reloc */
 222
 223    sf->sf5.viewport_transform = 1;
 224
 225    /* _NEW_SCISSOR */
 226    if (key->scissor)
 227       sf->sf6.scissor = 1;
 228
 229    /* _NEW_POLYGON */
 230    if (key->front_face == GL_CCW)
 231       sf->sf5.front_winding = BRW_FRONTWINDING_CCW;
 232    else
 233       sf->sf5.front_winding = BRW_FRONTWINDING_CW;
 234
 235    /* The viewport is inverted for rendering to a FBO, and that inverts
 236     * polygon front/back orientation.
 237     */
 238    sf->sf5.front_winding ^= key->render_to_fbo;
 239
 240    switch (key->cull_face) {
 241    case GL_FRONT:
 242       sf->sf6.cull_mode = BRW_CULLMODE_FRONT;
 243       break;
 244    case GL_BACK:
 245       sf->sf6.cull_mode = BRW_CULLMODE_BACK;
 246       break;
 247    case GL_FRONT_AND_BACK:
 248       sf->sf6.cull_mode = BRW_CULLMODE_BOTH;
 249       break;
 250    case GL_NONE:
 251       sf->sf6.cull_mode = BRW_CULLMODE_NONE;
 252       break;
 253    default:
 254       assert(0);
 255       break;
 256    }
 257
 258    /* _NEW_LINE */
 259    /* XXX use ctx->Const.Min/MaxLineWidth here */
 260    sf->sf6.line_width = CLAMP(key->line_width, 1.0, 5.0) * (1<<1);
 261
 262    sf->sf6.line_endcap_aa_region_width = 1;
 263    if (key->line_smooth)
 264       sf->sf6.aa_enable = 1;
 265    else if (sf->sf6.line_width <= 0x2)
 266        sf->sf6.line_width = 0;
 267
 268    /* _NEW_BUFFERS */
 269    key->render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
 270    if (!key->render_to_fbo) {
 271       /* Rendering to an OpenGL window */
 272       sf->sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT;
 273    }
 274    else {
 275       /* If rendering to an FBO, the pixel coordinate system is
 276        * inverted with respect to the normal OpenGL coordinate
 277        * system, so BRW_RASTRULE_LOWER_RIGHT is correct.
 278        * But this value is listed as "Reserved, but not seen as useful"
 279        * in Intel documentation (page 212, "Point Rasterization Rule",
 280        * section 7.4 "SF Pipeline State Summary", of document
 281        * "Intel® 965 Express Chipset Family and Intel® G35 Express
 282        * Chipset Graphics Controller Programmer's Reference Manual,
 283        * Volume 2: 3D/Media", Revision 1.0b as of January 2008,
 284        * available at
 285        *     http://intellinuxgraphics.org/documentation.html
 286        * at the time of this writing).
 287        *
 288        * It does work on at least some devices, if not all;
 289        * if devices that don't support it can be identified,
 290        * the likely failure case is that points are rasterized
 291        * incorrectly, which is no worse than occurs without
 292        * the value, so we're using it here.
 293        */
 294       sf->sf6.point_rast_rule = BRW_RASTRULE_LOWER_RIGHT;
 295    }
 296    /* XXX clamp max depends on AA vs. non-AA */
 297
 298    /* _NEW_POINT */
 299    sf->sf7.sprite_point = key->point_sprite;
 300    sf->sf7.point_size = CLAMP(rint(key->point_size), 1, 255) * (1<<3);
 301    sf->sf7.use_point_size_state = !key->use_vs_point_size;
 302    sf->sf7.aa_line_distance_mode = 0;
 303
 304    /* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons:
 305     */
 306    if (!key->pv_first) {
 307       sf->sf7.trifan_pv = 2;
 308       sf->sf7.linestrip_pv = 1;
 309       sf->sf7.tristrip_pv = 2;
 310    } else {
 311       sf->sf7.trifan_pv = 1;
 312       sf->sf7.linestrip_pv = 0;
 313       sf->sf7.tristrip_pv = 0;
 314    }
 315    sf->sf7.line_last_pixel_enable = 0;
 316
 317    /* Set bias for OpenGL rasterization rules:
 318     */
 319    sf->sf6.dest_org_vbias = 0x8;
 320    sf->sf6.dest_org_hbias = 0x8;
 321
 322    bo = brw_upload_cache(&brw->cache, BRW_SF_UNIT,
 323                          key, sizeof(*key),
 324                          reloc_bufs, 2,
 325                          sf, sizeof(*sf));
 326
 327    /* STATE_PREFETCH command description describes this state as being
 328     * something loaded through the GPE (L2 ISC), so it's INSTRUCTION domain.
 329     */
 330    /* Emit SF program relocation */
 331    drm_intel_bo_emit_reloc(bo, offsetof(struct brw_sf_unit_state, thread0),
 332                            brw->sf.prog_bo, sf->thread0.grf_reg_count << 1,
 333                            I915_GEM_DOMAIN_INSTRUCTION, 0);
 334
 335    /* Emit SF viewport relocation */
 336    drm_intel_bo_emit_reloc(bo, offsetof(struct brw_sf_unit_state, sf5),
 337                            brw->sf.vp_bo, (sf->sf5.front_winding |
 338                                            (sf->sf5.viewport_transform << 1)),
 339                            I915_GEM_DOMAIN_INSTRUCTION, 0);
 340
 341    return bo;
 342 }
 343
 344 static void upload_sf_unit( struct brw_context *brw )
 345 {
 346    struct brw_sf_unit_key key;
 347    drm_intel_bo *reloc_bufs[2];
 348
 349    sf_unit_populate_key(brw, &key);
 350
 351    reloc_bufs[0] = brw->sf.prog_bo;
 352    reloc_bufs[1] = brw->sf.vp_bo;
 353
 354    drm_intel_bo_unreference(brw->sf.state_bo);
 355    brw->sf.state_bo = brw_search_cache(&brw->cache, BRW_SF_UNIT,
 356                                        &key, sizeof(key),
 357                                        reloc_bufs, 2,
 358                                        NULL);
 359    if (brw->sf.state_bo == NULL) {
 360       brw->sf.state_bo = sf_unit_create_from_key(brw, &key, reloc_bufs);
 361    }
 362 }
 363
 364 const struct brw_tracked_state brw_sf_unit = {
 365    .dirty = {
 366       .mesa  = (_NEW_POLYGON |
 367                 _NEW_LIGHT |
 368                 _NEW_LINE |
 369                 _NEW_POINT |
 370                 _NEW_SCISSOR |
 371                 _NEW_BUFFERS),
 372       .brw   = BRW_NEW_URB_FENCE,
 373       .cache = (CACHE_NEW_SF_VP |
 374                 CACHE_NEW_SF_PROG)
 375    },
 376    .prepare = upload_sf_unit,
 377 };