1845c3d7618f1440acdd177697654a453dd65406
[mesa.git] / src / mesa / drivers / dri / i965 / brw_shader.cpp
1 /*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 extern "C" {
25 #include "main/macros.h"
26 #include "brw_context.h"
27 #include "brw_vs.h"
28 }
29 #include "brw_fs.h"
30 #include "glsl/ir_optimization.h"
31 #include "glsl/ir_print_visitor.h"
32
33 struct gl_shader *
34 brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
35 {
36 struct brw_shader *shader;
37
38 shader = rzalloc(NULL, struct brw_shader);
39 if (shader) {
40 shader->base.Type = type;
41 shader->base.Name = name;
42 _mesa_init_shader(ctx, &shader->base);
43 }
44
45 return &shader->base;
46 }
47
48 struct gl_shader_program *
49 brw_new_shader_program(struct gl_context *ctx, GLuint name)
50 {
51 struct brw_shader_program *prog;
52 prog = rzalloc(NULL, struct brw_shader_program);
53 if (prog) {
54 prog->base.Name = name;
55 _mesa_init_shader_program(ctx, &prog->base);
56 }
57 return &prog->base;
58 }
59
60 /**
61 * Performs a compile of the shader stages even when we don't know
62 * what non-orthogonal state will be set, in the hope that it reflects
63 * the eventual NOS used, and thus allows us to produce link failures.
64 */
65 bool
66 brw_shader_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
67 {
68 struct brw_context *brw = brw_context(ctx);
69
70 if (brw->precompile && !brw_fs_precompile(ctx, prog))
71 return false;
72
73 if (!brw_vs_precompile(ctx, prog))
74 return false;
75
76 return true;
77 }
78
79 GLboolean
80 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
81 {
82 struct brw_context *brw = brw_context(ctx);
83 struct intel_context *intel = &brw->intel;
84 unsigned int stage;
85
86 if (!_mesa_ir_link_shader(ctx, prog))
87 return false;
88
89 for (stage = 0; stage < ARRAY_SIZE(prog->_LinkedShaders); stage++) {
90 struct brw_shader *shader =
91 (struct brw_shader *)prog->_LinkedShaders[stage];
92
93 if (!shader)
94 continue;
95
96 void *mem_ctx = ralloc_context(NULL);
97 bool progress;
98
99 if (shader->ir)
100 ralloc_free(shader->ir);
101 shader->ir = new(shader) exec_list;
102 clone_ir_list(mem_ctx, shader->ir, shader->base.ir);
103
104 do_mat_op_to_vec(shader->ir);
105 lower_instructions(shader->ir,
106 MOD_TO_FRACT |
107 DIV_TO_MUL_RCP |
108 SUB_TO_ADD_NEG |
109 EXP_TO_EXP2 |
110 LOG_TO_LOG2);
111
112 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
113 * if-statements need to be flattened.
114 */
115 if (intel->gen < 6)
116 lower_if_to_cond_assign(shader->ir, 16);
117
118 do_lower_texture_projection(shader->ir);
119 do_vec_index_to_cond_assign(shader->ir);
120 brw_do_cubemap_normalize(shader->ir);
121 lower_noise(shader->ir);
122 lower_quadop_vector(shader->ir, false);
123
124 bool input = true;
125 bool output = stage == MESA_SHADER_FRAGMENT;
126 bool temp = stage == MESA_SHADER_FRAGMENT;
127 bool uniform = stage == MESA_SHADER_FRAGMENT;
128
129 lower_variable_index_to_cond_assign(shader->ir,
130 input, output, temp, uniform);
131
132 do {
133 progress = false;
134
135 if (stage == MESA_SHADER_FRAGMENT) {
136 brw_do_channel_expressions(shader->ir);
137 brw_do_vector_splitting(shader->ir);
138 }
139
140 progress = do_lower_jumps(shader->ir, true, true,
141 true, /* main return */
142 false, /* continue */
143 false /* loops */
144 ) || progress;
145
146 progress = do_common_optimization(shader->ir, true, true, 32)
147 || progress;
148 } while (progress);
149
150 validate_ir_tree(shader->ir);
151
152 reparent_ir(shader->ir, shader->ir);
153 ralloc_free(mem_ctx);
154 }
155
156 if (!brw_shader_precompile(ctx, prog))
157 return false;
158
159 return true;
160 }
161
162
163 int
164 brw_type_for_base_type(const struct glsl_type *type)
165 {
166 switch (type->base_type) {
167 case GLSL_TYPE_FLOAT:
168 return BRW_REGISTER_TYPE_F;
169 case GLSL_TYPE_INT:
170 case GLSL_TYPE_BOOL:
171 return BRW_REGISTER_TYPE_D;
172 case GLSL_TYPE_UINT:
173 return BRW_REGISTER_TYPE_UD;
174 case GLSL_TYPE_ARRAY:
175 return brw_type_for_base_type(type->fields.array);
176 case GLSL_TYPE_STRUCT:
177 case GLSL_TYPE_SAMPLER:
178 /* These should be overridden with the type of the member when
179 * dereferenced into. BRW_REGISTER_TYPE_UD seems like a likely
180 * way to trip up if we don't.
181 */
182 return BRW_REGISTER_TYPE_UD;
183 default:
184 assert(!"not reached");
185 return BRW_REGISTER_TYPE_F;
186 }
187 }
188
189 uint32_t
190 brw_conditional_for_comparison(unsigned int op)
191 {
192 switch (op) {
193 case ir_binop_less:
194 return BRW_CONDITIONAL_L;
195 case ir_binop_greater:
196 return BRW_CONDITIONAL_G;
197 case ir_binop_lequal:
198 return BRW_CONDITIONAL_LE;
199 case ir_binop_gequal:
200 return BRW_CONDITIONAL_GE;
201 case ir_binop_equal:
202 case ir_binop_all_equal: /* same as equal for scalars */
203 return BRW_CONDITIONAL_Z;
204 case ir_binop_nequal:
205 case ir_binop_any_nequal: /* same as nequal for scalars */
206 return BRW_CONDITIONAL_NZ;
207 default:
208 assert(!"not reached: bad operation for comparison");
209 return BRW_CONDITIONAL_NZ;
210 }
211 }
212
213 uint32_t
214 brw_math_function(enum opcode op)
215 {
216 switch (op) {
217 case SHADER_OPCODE_RCP:
218 return BRW_MATH_FUNCTION_INV;
219 case SHADER_OPCODE_RSQ:
220 return BRW_MATH_FUNCTION_RSQ;
221 case SHADER_OPCODE_SQRT:
222 return BRW_MATH_FUNCTION_SQRT;
223 case SHADER_OPCODE_EXP2:
224 return BRW_MATH_FUNCTION_EXP;
225 case SHADER_OPCODE_LOG2:
226 return BRW_MATH_FUNCTION_LOG;
227 case SHADER_OPCODE_POW:
228 return BRW_MATH_FUNCTION_POW;
229 case SHADER_OPCODE_SIN:
230 return BRW_MATH_FUNCTION_SIN;
231 case SHADER_OPCODE_COS:
232 return BRW_MATH_FUNCTION_COS;
233 case SHADER_OPCODE_INT_QUOTIENT:
234 return BRW_MATH_FUNCTION_INT_DIV_QUOTIENT;
235 case SHADER_OPCODE_INT_REMAINDER:
236 return BRW_MATH_FUNCTION_INT_DIV_REMAINDER;
237 default:
238 assert(!"not reached: unknown math function");
239 return 0;
240 }
241 }
242
243 uint32_t
244 brw_texture_offset(ir_constant *offset)
245 {
246 assert(offset != NULL);
247
248 signed char offsets[3];
249 for (unsigned i = 0; i < offset->type->vector_elements; i++)
250 offsets[i] = (signed char) offset->value.i[i];
251
252 /* Combine all three offsets into a single unsigned dword:
253 *
254 * bits 11:8 - U Offset (X component)
255 * bits 7:4 - V Offset (Y component)
256 * bits 3:0 - R Offset (Z component)
257 */
258 unsigned offset_bits = 0;
259 for (unsigned i = 0; i < offset->type->vector_elements; i++) {
260 const unsigned shift = 4 * (2 - i);
261 offset_bits |= (offsets[i] << shift) & (0xF << shift);
262 }
263 return offset_bits;
264 }