i965: Define vtbl method that initializes an untyped R/W surface.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_shader.cpp
1 /*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 extern "C" {
25 #include "main/macros.h"
26 #include "brw_context.h"
27 }
28 #include "brw_vs.h"
29 #include "brw_vec4_gs.h"
30 #include "brw_fs.h"
31 #include "glsl/ir_optimization.h"
32 #include "glsl/glsl_parser_extras.h"
33 #include "main/shaderapi.h"
34
35 struct gl_shader *
36 brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
37 {
38 struct brw_shader *shader;
39
40 shader = rzalloc(NULL, struct brw_shader);
41 if (shader) {
42 shader->base.Type = type;
43 shader->base.Name = name;
44 _mesa_init_shader(ctx, &shader->base);
45 }
46
47 return &shader->base;
48 }
49
50 struct gl_shader_program *
51 brw_new_shader_program(struct gl_context *ctx, GLuint name)
52 {
53 struct gl_shader_program *prog = rzalloc(NULL, struct gl_shader_program);
54 if (prog) {
55 prog->Name = name;
56 _mesa_init_shader_program(ctx, prog);
57 }
58 return prog;
59 }
60
61 /**
62 * Performs a compile of the shader stages even when we don't know
63 * what non-orthogonal state will be set, in the hope that it reflects
64 * the eventual NOS used, and thus allows us to produce link failures.
65 */
66 static bool
67 brw_shader_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
68 {
69 struct brw_context *brw = brw_context(ctx);
70
71 if (brw->precompile && !brw_fs_precompile(ctx, prog))
72 return false;
73
74 if (brw->precompile && !brw_gs_precompile(ctx, prog))
75 return false;
76
77 if (brw->precompile && !brw_vs_precompile(ctx, prog))
78 return false;
79
80 return true;
81 }
82
83 static void
84 brw_lower_packing_builtins(struct brw_context *brw,
85 gl_shader_type shader_type,
86 exec_list *ir)
87 {
88 int ops = LOWER_PACK_SNORM_2x16
89 | LOWER_UNPACK_SNORM_2x16
90 | LOWER_PACK_UNORM_2x16
91 | LOWER_UNPACK_UNORM_2x16
92 | LOWER_PACK_SNORM_4x8
93 | LOWER_UNPACK_SNORM_4x8
94 | LOWER_PACK_UNORM_4x8
95 | LOWER_UNPACK_UNORM_4x8;
96
97 if (brw->gen >= 7) {
98 /* Gen7 introduced the f32to16 and f16to32 instructions, which can be
99 * used to execute packHalf2x16 and unpackHalf2x16. For AOS code, no
100 * lowering is needed. For SOA code, the Half2x16 ops must be
101 * scalarized.
102 */
103 if (shader_type == MESA_SHADER_FRAGMENT) {
104 ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
105 | LOWER_UNPACK_HALF_2x16_TO_SPLIT;
106 }
107 } else {
108 ops |= LOWER_PACK_HALF_2x16
109 | LOWER_UNPACK_HALF_2x16;
110 }
111
112 lower_packing_builtins(ir, ops);
113 }
114
115 GLboolean
116 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
117 {
118 struct brw_context *brw = brw_context(ctx);
119 unsigned int stage;
120
121 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
122 struct brw_shader *shader =
123 (struct brw_shader *)shProg->_LinkedShaders[stage];
124
125 if (!shader)
126 continue;
127
128 struct gl_program *prog =
129 ctx->Driver.NewProgram(ctx, _mesa_program_index_to_target(stage),
130 shader->base.Name);
131 if (!prog)
132 return false;
133 prog->Parameters = _mesa_new_parameter_list();
134
135 _mesa_copy_linked_program_data((gl_shader_type) stage, shProg, prog);
136
137 void *mem_ctx = ralloc_context(NULL);
138 bool progress;
139
140 if (shader->ir)
141 ralloc_free(shader->ir);
142 shader->ir = new(shader) exec_list;
143 clone_ir_list(mem_ctx, shader->ir, shader->base.ir);
144
145 /* lower_packing_builtins() inserts arithmetic instructions, so it
146 * must precede lower_instructions().
147 */
148 brw_lower_packing_builtins(brw, (gl_shader_type) stage, shader->ir);
149 do_mat_op_to_vec(shader->ir);
150 const int bitfield_insert = brw->gen >= 7
151 ? BITFIELD_INSERT_TO_BFM_BFI
152 : 0;
153 const int lrp_to_arith = brw->gen < 6 ? LRP_TO_ARITH : 0;
154 lower_instructions(shader->ir,
155 MOD_TO_FRACT |
156 DIV_TO_MUL_RCP |
157 SUB_TO_ADD_NEG |
158 EXP_TO_EXP2 |
159 LOG_TO_LOG2 |
160 bitfield_insert |
161 lrp_to_arith |
162 LDEXP_TO_ARITH);
163
164 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
165 * if-statements need to be flattened.
166 */
167 if (brw->gen < 6)
168 lower_if_to_cond_assign(shader->ir, 16);
169
170 do_lower_texture_projection(shader->ir);
171 brw_lower_texture_gradients(brw, shader->ir);
172 do_vec_index_to_cond_assign(shader->ir);
173 lower_vector_insert(shader->ir, true);
174 brw_do_cubemap_normalize(shader->ir);
175 brw_do_lower_offset_arrays(shader->ir);
176 brw_do_lower_unnormalized_offset(shader->ir);
177 lower_noise(shader->ir);
178 lower_quadop_vector(shader->ir, false);
179
180 bool input = true;
181 bool output = stage == MESA_SHADER_FRAGMENT;
182 bool temp = stage == MESA_SHADER_FRAGMENT;
183 bool uniform = false;
184
185 bool lowered_variable_indexing =
186 lower_variable_index_to_cond_assign(shader->ir,
187 input, output, temp, uniform);
188
189 if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
190 perf_debug("Unsupported form of variable indexing in FS; falling "
191 "back to very inefficient code generation\n");
192 }
193
194 /* FINISHME: Do this before the variable index lowering. */
195 lower_ubo_reference(&shader->base, shader->ir);
196
197 do {
198 progress = false;
199
200 if (stage == MESA_SHADER_FRAGMENT) {
201 brw_do_channel_expressions(shader->ir);
202 brw_do_vector_splitting(shader->ir);
203 }
204
205 progress = do_lower_jumps(shader->ir, true, true,
206 true, /* main return */
207 false, /* continue */
208 false /* loops */
209 ) || progress;
210
211 progress = do_common_optimization(shader->ir, true, true, 32,
212 &ctx->ShaderCompilerOptions[stage])
213 || progress;
214 } while (progress);
215
216 /* Make a pass over the IR to add state references for any built-in
217 * uniforms that are used. This has to be done now (during linking).
218 * Code generation doesn't happen until the first time this shader is
219 * used for rendering. Waiting until then to generate the parameters is
220 * too late. At that point, the values for the built-in uniforms won't
221 * get sent to the shader.
222 */
223 foreach_list(node, shader->ir) {
224 ir_variable *var = ((ir_instruction *) node)->as_variable();
225
226 if ((var == NULL) || (var->mode != ir_var_uniform)
227 || (strncmp(var->name, "gl_", 3) != 0))
228 continue;
229
230 const ir_state_slot *const slots = var->state_slots;
231 assert(var->state_slots != NULL);
232
233 for (unsigned int i = 0; i < var->num_state_slots; i++) {
234 _mesa_add_state_reference(prog->Parameters,
235 (gl_state_index *) slots[i].tokens);
236 }
237 }
238
239 validate_ir_tree(shader->ir);
240
241 reparent_ir(shader->ir, shader->ir);
242 ralloc_free(mem_ctx);
243
244 do_set_program_inouts(shader->ir, prog, shader->base.Type);
245
246 prog->SamplersUsed = shader->base.active_samplers;
247 _mesa_update_shader_textures_used(shProg, prog);
248
249 _mesa_reference_program(ctx, &shader->base.Program, prog);
250
251 brw_add_texrect_params(prog);
252
253 /* This has to be done last. Any operation that can cause
254 * prog->ParameterValues to get reallocated (e.g., anything that adds a
255 * program constant) has to happen before creating this linkage.
256 */
257 _mesa_associate_uniform_storage(ctx, shProg, prog->Parameters);
258
259 _mesa_reference_program(ctx, &prog, NULL);
260
261 if (ctx->Shader.Flags & GLSL_DUMP) {
262 printf("\n");
263 printf("GLSL IR for linked %s program %d:\n",
264 _mesa_glsl_shader_target_name(shader->base.Type), shProg->Name);
265 _mesa_print_ir(shader->base.ir, NULL);
266 printf("\n");
267 }
268 }
269
270 if (ctx->Shader.Flags & GLSL_DUMP) {
271 for (unsigned i = 0; i < shProg->NumShaders; i++) {
272 const struct gl_shader *sh = shProg->Shaders[i];
273 if (!sh)
274 continue;
275
276 printf("GLSL %s shader %d source for linked program %d:\n",
277 _mesa_glsl_shader_target_name(sh->Type),
278 i,
279 shProg->Name);
280 printf("%s", sh->Source);
281 printf("\n");
282 }
283 }
284
285 if (!brw_shader_precompile(ctx, shProg))
286 return false;
287
288 return true;
289 }
290
291
292 int
293 brw_type_for_base_type(const struct glsl_type *type)
294 {
295 switch (type->base_type) {
296 case GLSL_TYPE_FLOAT:
297 return BRW_REGISTER_TYPE_F;
298 case GLSL_TYPE_INT:
299 case GLSL_TYPE_BOOL:
300 return BRW_REGISTER_TYPE_D;
301 case GLSL_TYPE_UINT:
302 return BRW_REGISTER_TYPE_UD;
303 case GLSL_TYPE_ARRAY:
304 return brw_type_for_base_type(type->fields.array);
305 case GLSL_TYPE_STRUCT:
306 case GLSL_TYPE_SAMPLER:
307 case GLSL_TYPE_ATOMIC_UINT:
308 /* These should be overridden with the type of the member when
309 * dereferenced into. BRW_REGISTER_TYPE_UD seems like a likely
310 * way to trip up if we don't.
311 */
312 return BRW_REGISTER_TYPE_UD;
313 case GLSL_TYPE_VOID:
314 case GLSL_TYPE_ERROR:
315 case GLSL_TYPE_INTERFACE:
316 assert(!"not reached");
317 break;
318 }
319
320 return BRW_REGISTER_TYPE_F;
321 }
322
323 uint32_t
324 brw_conditional_for_comparison(unsigned int op)
325 {
326 switch (op) {
327 case ir_binop_less:
328 return BRW_CONDITIONAL_L;
329 case ir_binop_greater:
330 return BRW_CONDITIONAL_G;
331 case ir_binop_lequal:
332 return BRW_CONDITIONAL_LE;
333 case ir_binop_gequal:
334 return BRW_CONDITIONAL_GE;
335 case ir_binop_equal:
336 case ir_binop_all_equal: /* same as equal for scalars */
337 return BRW_CONDITIONAL_Z;
338 case ir_binop_nequal:
339 case ir_binop_any_nequal: /* same as nequal for scalars */
340 return BRW_CONDITIONAL_NZ;
341 default:
342 assert(!"not reached: bad operation for comparison");
343 return BRW_CONDITIONAL_NZ;
344 }
345 }
346
347 uint32_t
348 brw_math_function(enum opcode op)
349 {
350 switch (op) {
351 case SHADER_OPCODE_RCP:
352 return BRW_MATH_FUNCTION_INV;
353 case SHADER_OPCODE_RSQ:
354 return BRW_MATH_FUNCTION_RSQ;
355 case SHADER_OPCODE_SQRT:
356 return BRW_MATH_FUNCTION_SQRT;
357 case SHADER_OPCODE_EXP2:
358 return BRW_MATH_FUNCTION_EXP;
359 case SHADER_OPCODE_LOG2:
360 return BRW_MATH_FUNCTION_LOG;
361 case SHADER_OPCODE_POW:
362 return BRW_MATH_FUNCTION_POW;
363 case SHADER_OPCODE_SIN:
364 return BRW_MATH_FUNCTION_SIN;
365 case SHADER_OPCODE_COS:
366 return BRW_MATH_FUNCTION_COS;
367 case SHADER_OPCODE_INT_QUOTIENT:
368 return BRW_MATH_FUNCTION_INT_DIV_QUOTIENT;
369 case SHADER_OPCODE_INT_REMAINDER:
370 return BRW_MATH_FUNCTION_INT_DIV_REMAINDER;
371 default:
372 assert(!"not reached: unknown math function");
373 return 0;
374 }
375 }
376
377 uint32_t
378 brw_texture_offset(struct gl_context *ctx, ir_constant *offset)
379 {
380 /* If the driver does not support GL_ARB_gpu_shader5, the offset
381 * must be constant.
382 */
383 assert(offset != NULL || ctx->Extensions.ARB_gpu_shader5);
384
385 if (!offset) return 0; /* nonconstant offset; caller will handle it. */
386
387 signed char offsets[3];
388 for (unsigned i = 0; i < offset->type->vector_elements; i++)
389 offsets[i] = (signed char) offset->value.i[i];
390
391 /* Combine all three offsets into a single unsigned dword:
392 *
393 * bits 11:8 - U Offset (X component)
394 * bits 7:4 - V Offset (Y component)
395 * bits 3:0 - R Offset (Z component)
396 */
397 unsigned offset_bits = 0;
398 for (unsigned i = 0; i < offset->type->vector_elements; i++) {
399 const unsigned shift = 4 * (2 - i);
400 offset_bits |= (offsets[i] << shift) & (0xF << shift);
401 }
402 return offset_bits;
403 }
404
405 const char *
406 brw_instruction_name(enum opcode op)
407 {
408 char *fallback;
409
410 if (op < ARRAY_SIZE(opcode_descs) && opcode_descs[op].name)
411 return opcode_descs[op].name;
412
413 switch (op) {
414 case FS_OPCODE_FB_WRITE:
415 return "fb_write";
416
417 case SHADER_OPCODE_RCP:
418 return "rcp";
419 case SHADER_OPCODE_RSQ:
420 return "rsq";
421 case SHADER_OPCODE_SQRT:
422 return "sqrt";
423 case SHADER_OPCODE_EXP2:
424 return "exp2";
425 case SHADER_OPCODE_LOG2:
426 return "log2";
427 case SHADER_OPCODE_POW:
428 return "pow";
429 case SHADER_OPCODE_INT_QUOTIENT:
430 return "int_quot";
431 case SHADER_OPCODE_INT_REMAINDER:
432 return "int_rem";
433 case SHADER_OPCODE_SIN:
434 return "sin";
435 case SHADER_OPCODE_COS:
436 return "cos";
437
438 case SHADER_OPCODE_TEX:
439 return "tex";
440 case SHADER_OPCODE_TXD:
441 return "txd";
442 case SHADER_OPCODE_TXF:
443 return "txf";
444 case SHADER_OPCODE_TXL:
445 return "txl";
446 case SHADER_OPCODE_TXS:
447 return "txs";
448 case FS_OPCODE_TXB:
449 return "txb";
450 case SHADER_OPCODE_TXF_MS:
451 return "txf_ms";
452 case SHADER_OPCODE_TG4:
453 return "tg4";
454 case SHADER_OPCODE_TG4_OFFSET:
455 return "tg4_offset";
456
457 case FS_OPCODE_DDX:
458 return "ddx";
459 case FS_OPCODE_DDY:
460 return "ddy";
461
462 case FS_OPCODE_PIXEL_X:
463 return "pixel_x";
464 case FS_OPCODE_PIXEL_Y:
465 return "pixel_y";
466
467 case FS_OPCODE_CINTERP:
468 return "cinterp";
469 case FS_OPCODE_LINTERP:
470 return "linterp";
471
472 case FS_OPCODE_SPILL:
473 return "spill";
474 case FS_OPCODE_UNSPILL:
475 return "unspill";
476
477 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
478 return "uniform_pull_const";
479 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7:
480 return "uniform_pull_const_gen7";
481 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
482 return "varying_pull_const";
483 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
484 return "varying_pull_const_gen7";
485
486 case FS_OPCODE_MOV_DISPATCH_TO_FLAGS:
487 return "mov_dispatch_to_flags";
488 case FS_OPCODE_DISCARD_JUMP:
489 return "discard_jump";
490
491 case FS_OPCODE_SET_SIMD4X2_OFFSET:
492 return "set_simd4x2_offset";
493
494 case FS_OPCODE_PACK_HALF_2x16_SPLIT:
495 return "pack_half_2x16_split";
496 case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X:
497 return "unpack_half_2x16_split_x";
498 case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y:
499 return "unpack_half_2x16_split_y";
500
501 case FS_OPCODE_PLACEHOLDER_HALT:
502 return "placeholder_halt";
503
504 case VS_OPCODE_URB_WRITE:
505 return "vs_urb_write";
506 case VS_OPCODE_SCRATCH_READ:
507 return "scratch_read";
508 case VS_OPCODE_SCRATCH_WRITE:
509 return "scratch_write";
510 case VS_OPCODE_PULL_CONSTANT_LOAD:
511 return "pull_constant_load";
512 case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
513 return "pull_constant_load_gen7";
514 case VS_OPCODE_UNPACK_FLAGS_SIMD4X2:
515 return "unpack_flags_simd4x2";
516
517 case GS_OPCODE_URB_WRITE:
518 return "gs_urb_write";
519 case GS_OPCODE_THREAD_END:
520 return "gs_thread_end";
521 case GS_OPCODE_SET_WRITE_OFFSET:
522 return "set_write_offset";
523 case GS_OPCODE_SET_VERTEX_COUNT:
524 return "set_vertex_count";
525 case GS_OPCODE_SET_DWORD_2_IMMED:
526 return "set_dword_2_immed";
527 case GS_OPCODE_PREPARE_CHANNEL_MASKS:
528 return "prepare_channel_masks";
529 case GS_OPCODE_SET_CHANNEL_MASKS:
530 return "set_channel_masks";
531
532 default:
533 /* Yes, this leaks. It's in debug code, it should never occur, and if
534 * it does, you should just add the case to the list above.
535 */
536 asprintf(&fallback, "op%d", op);
537 return fallback;
538 }
539 }
540
541 bool
542 backend_instruction::is_tex()
543 {
544 return (opcode == SHADER_OPCODE_TEX ||
545 opcode == FS_OPCODE_TXB ||
546 opcode == SHADER_OPCODE_TXD ||
547 opcode == SHADER_OPCODE_TXF ||
548 opcode == SHADER_OPCODE_TXF_MS ||
549 opcode == SHADER_OPCODE_TXL ||
550 opcode == SHADER_OPCODE_TXS ||
551 opcode == SHADER_OPCODE_LOD ||
552 opcode == SHADER_OPCODE_TG4 ||
553 opcode == SHADER_OPCODE_TG4_OFFSET);
554 }
555
556 bool
557 backend_instruction::is_math()
558 {
559 return (opcode == SHADER_OPCODE_RCP ||
560 opcode == SHADER_OPCODE_RSQ ||
561 opcode == SHADER_OPCODE_SQRT ||
562 opcode == SHADER_OPCODE_EXP2 ||
563 opcode == SHADER_OPCODE_LOG2 ||
564 opcode == SHADER_OPCODE_SIN ||
565 opcode == SHADER_OPCODE_COS ||
566 opcode == SHADER_OPCODE_INT_QUOTIENT ||
567 opcode == SHADER_OPCODE_INT_REMAINDER ||
568 opcode == SHADER_OPCODE_POW);
569 }
570
571 bool
572 backend_instruction::is_control_flow()
573 {
574 switch (opcode) {
575 case BRW_OPCODE_DO:
576 case BRW_OPCODE_WHILE:
577 case BRW_OPCODE_IF:
578 case BRW_OPCODE_ELSE:
579 case BRW_OPCODE_ENDIF:
580 case BRW_OPCODE_BREAK:
581 case BRW_OPCODE_CONTINUE:
582 return true;
583 default:
584 return false;
585 }
586 }
587
588 bool
589 backend_instruction::can_do_source_mods()
590 {
591 switch (opcode) {
592 case BRW_OPCODE_ADDC:
593 case BRW_OPCODE_BFE:
594 case BRW_OPCODE_BFI1:
595 case BRW_OPCODE_BFI2:
596 case BRW_OPCODE_BFREV:
597 case BRW_OPCODE_CBIT:
598 case BRW_OPCODE_FBH:
599 case BRW_OPCODE_FBL:
600 case BRW_OPCODE_SUBB:
601 return false;
602 default:
603 return true;
604 }
605 }
606
607 void
608 backend_visitor::dump_instructions()
609 {
610 int ip = 0;
611 foreach_list(node, &this->instructions) {
612 backend_instruction *inst = (backend_instruction *)node;
613 printf("%d: ", ip++);
614 dump_instruction(inst);
615 }
616 }
617
618
619 /**
620 * Sets up the starting offsets for the groups of binding table entries
621 * commong to all pipeline stages.
622 *
623 * Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
624 * unused but also make sure that addition of small offsets to them will
625 * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
626 */
627 void
628 backend_visitor::assign_common_binding_table_offsets(uint32_t next_binding_table_offset)
629 {
630 int num_textures = _mesa_fls(prog->SamplersUsed);
631
632 stage_prog_data->binding_table.texture_start = next_binding_table_offset;
633 next_binding_table_offset += num_textures;
634
635 if (shader) {
636 stage_prog_data->binding_table.ubo_start = next_binding_table_offset;
637 next_binding_table_offset += shader->base.NumUniformBlocks;
638 } else {
639 stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0;
640 }
641
642 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
643 stage_prog_data->binding_table.shader_time_start = next_binding_table_offset;
644 next_binding_table_offset++;
645 } else {
646 stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0;
647 }
648
649 if (prog->UsesGather) {
650 stage_prog_data->binding_table.gather_texture_start = next_binding_table_offset;
651 next_binding_table_offset += num_textures;
652 } else {
653 stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0;
654 }
655
656 /* This may or may not be used depending on how the compile goes. */
657 stage_prog_data->binding_table.pull_constants_start = next_binding_table_offset;
658 next_binding_table_offset++;
659
660 assert(next_binding_table_offset <= BRW_MAX_SURFACES);
661
662 /* prog_data->base.binding_table.size will be set by mark_surface_used. */
663 }