src/mesa/drivers/dri/i965/brw_shader.cpp

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 extern "C" {
  25 #include "main/macros.h"
  26 #include "brw_context.h"
  27 }
  28 #include "brw_vs.h"
  29 #include "brw_vec4_gs.h"
  30 #include "brw_fs.h"
  31 #include "glsl/ir_optimization.h"
  32 #include "glsl/glsl_parser_extras.h"
  33 #include "main/shaderapi.h"
  34
  35 struct gl_shader *
  36 brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
  37 {
  38    struct brw_shader *shader;
  39
  40    shader = rzalloc(NULL, struct brw_shader);
  41    if (shader) {
  42       shader->base.Type = type;
  43       shader->base.Stage = _mesa_shader_enum_to_shader_stage(type);
  44       shader->base.Name = name;
  45       _mesa_init_shader(ctx, &shader->base);
  46    }
  47
  48    return &shader->base;
  49 }
  50
  51 struct gl_shader_program *
  52 brw_new_shader_program(struct gl_context *ctx, GLuint name)
  53 {
  54    struct gl_shader_program *prog = rzalloc(NULL, struct gl_shader_program);
  55    if (prog) {
  56       prog->Name = name;
  57       _mesa_init_shader_program(ctx, prog);
  58    }
  59    return prog;
  60 }
  61
  62 /**
  63  * Performs a compile of the shader stages even when we don't know
  64  * what non-orthogonal state will be set, in the hope that it reflects
  65  * the eventual NOS used, and thus allows us to produce link failures.
  66  */
  67 static bool
  68 brw_shader_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
  69 {
  70    struct brw_context *brw = brw_context(ctx);
  71
  72    if (brw->precompile && !brw_fs_precompile(ctx, prog))
  73       return false;
  74
  75    if (brw->precompile && !brw_gs_precompile(ctx, prog))
  76       return false;
  77
  78    if (brw->precompile && !brw_vs_precompile(ctx, prog))
  79       return false;
  80
  81    return true;
  82 }
  83
  84 static void
  85 brw_lower_packing_builtins(struct brw_context *brw,
  86                            gl_shader_stage shader_type,
  87                            exec_list *ir)
  88 {
  89    int ops = LOWER_PACK_SNORM_2x16
  90            | LOWER_UNPACK_SNORM_2x16
  91            | LOWER_PACK_UNORM_2x16
  92            | LOWER_UNPACK_UNORM_2x16
  93            | LOWER_PACK_SNORM_4x8
  94            | LOWER_UNPACK_SNORM_4x8
  95            | LOWER_PACK_UNORM_4x8
  96            | LOWER_UNPACK_UNORM_4x8;
  97
  98    if (brw->gen >= 7) {
  99       /* Gen7 introduced the f32to16 and f16to32 instructions, which can be
 100        * used to execute packHalf2x16 and unpackHalf2x16. For AOS code, no
 101        * lowering is needed. For SOA code, the Half2x16 ops must be
 102        * scalarized.
 103        */
 104       if (shader_type == MESA_SHADER_FRAGMENT) {
 105          ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
 106              |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
 107       }
 108    } else {
 109       ops |= LOWER_PACK_HALF_2x16
 110           |  LOWER_UNPACK_HALF_2x16;
 111    }
 112
 113    lower_packing_builtins(ir, ops);
 114 }
 115
 116 GLboolean
 117 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 118 {
 119    struct brw_context *brw = brw_context(ctx);
 120    unsigned int stage;
 121
 122    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 123       struct brw_shader *shader =
 124          (struct brw_shader *)shProg->_LinkedShaders[stage];
 125
 126       if (!shader)
 127          continue;
 128
 129       struct gl_program *prog =
 130          ctx->Driver.NewProgram(ctx, _mesa_program_index_to_target(stage),
 131                                 shader->base.Name);
 132       if (!prog)
 133         return false;
 134       prog->Parameters = _mesa_new_parameter_list();
 135
 136       _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
 137
 138       bool progress;
 139
 140       /* lower_packing_builtins() inserts arithmetic instructions, so it
 141        * must precede lower_instructions().
 142        */
 143       brw_lower_packing_builtins(brw, (gl_shader_stage) stage, shader->base.ir);
 144       do_mat_op_to_vec(shader->base.ir);
 145       const int bitfield_insert = brw->gen >= 7
 146                                   ? BITFIELD_INSERT_TO_BFM_BFI
 147                                   : 0;
 148       const int lrp_to_arith = brw->gen < 6 ? LRP_TO_ARITH : 0;
 149       lower_instructions(shader->base.ir,
 150                          MOD_TO_FRACT |
 151                          DIV_TO_MUL_RCP |
 152                          SUB_TO_ADD_NEG |
 153                          EXP_TO_EXP2 |
 154                          LOG_TO_LOG2 |
 155                          bitfield_insert |
 156                          lrp_to_arith |
 157                          LDEXP_TO_ARITH);
 158
 159       /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 160        * if-statements need to be flattened.
 161        */
 162       if (brw->gen < 6)
 163          lower_if_to_cond_assign(shader->base.ir, 16);
 164
 165       do_lower_texture_projection(shader->base.ir);
 166       brw_lower_texture_gradients(brw, shader->base.ir);
 167       do_vec_index_to_cond_assign(shader->base.ir);
 168       lower_vector_insert(shader->base.ir, true);
 169       brw_do_cubemap_normalize(shader->base.ir);
 170       brw_do_lower_offset_arrays(shader->base.ir);
 171       brw_do_lower_unnormalized_offset(shader->base.ir);
 172       lower_noise(shader->base.ir);
 173       lower_quadop_vector(shader->base.ir, false);
 174
 175       bool input = true;
 176       bool output = stage == MESA_SHADER_FRAGMENT;
 177       bool temp = stage == MESA_SHADER_FRAGMENT;
 178       bool uniform = false;
 179
 180       bool lowered_variable_indexing =
 181          lower_variable_index_to_cond_assign(shader->base.ir,
 182                                              input, output, temp, uniform);
 183
 184       if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
 185          perf_debug("Unsupported form of variable indexing in FS; falling "
 186                     "back to very inefficient code generation\n");
 187       }
 188
 189       /* FINISHME: Do this before the variable index lowering. */
 190       lower_ubo_reference(&shader->base, shader->base.ir);
 191
 192       do {
 193          progress = false;
 194
 195          if (stage == MESA_SHADER_FRAGMENT) {
 196             brw_do_channel_expressions(shader->base.ir);
 197             brw_do_vector_splitting(shader->base.ir);
 198          }
 199
 200          progress = do_lower_jumps(shader->base.ir, true, true,
 201                                    true, /* main return */
 202                                    false, /* continue */
 203                                    false /* loops */
 204                                    ) || progress;
 205
 206          progress = do_common_optimization(shader->base.ir, true, true, 32,
 207                                            &ctx->ShaderCompilerOptions[stage])
 208            || progress;
 209       } while (progress);
 210
 211       /* Make a pass over the IR to add state references for any built-in
 212        * uniforms that are used.  This has to be done now (during linking).
 213        * Code generation doesn't happen until the first time this shader is
 214        * used for rendering.  Waiting until then to generate the parameters is
 215        * too late.  At that point, the values for the built-in uniforms won't
 216        * get sent to the shader.
 217        */
 218       foreach_list(node, shader->base.ir) {
 219          ir_variable *var = ((ir_instruction *) node)->as_variable();
 220
 221          if ((var == NULL) || (var->data.mode != ir_var_uniform)
 222              || (strncmp(var->name, "gl_", 3) != 0))
 223             continue;
 224
 225          const ir_state_slot *const slots = var->state_slots;
 226          assert(var->state_slots != NULL);
 227
 228          for (unsigned int i = 0; i < var->num_state_slots; i++) {
 229             _mesa_add_state_reference(prog->Parameters,
 230                                       (gl_state_index *) slots[i].tokens);
 231          }
 232       }
 233
 234       validate_ir_tree(shader->base.ir);
 235
 236       do_set_program_inouts(shader->base.ir, prog, shader->base.Stage);
 237
 238       prog->SamplersUsed = shader->base.active_samplers;
 239       _mesa_update_shader_textures_used(shProg, prog);
 240
 241       _mesa_reference_program(ctx, &shader->base.Program, prog);
 242
 243       brw_add_texrect_params(prog);
 244
 245       /* This has to be done last.  Any operation that can cause
 246        * prog->ParameterValues to get reallocated (e.g., anything that adds a
 247        * program constant) has to happen before creating this linkage.
 248        */
 249       _mesa_associate_uniform_storage(ctx, shProg, prog->Parameters);
 250
 251       _mesa_reference_program(ctx, &prog, NULL);
 252
 253       if (ctx->Shader.Flags & GLSL_DUMP) {
 254          printf("\n");
 255          printf("GLSL IR for linked %s program %d:\n",
 256                 _mesa_shader_stage_to_string(shader->base.Stage),
 257                 shProg->Name);
 258          _mesa_print_ir(shader->base.ir, NULL);
 259          printf("\n");
 260       }
 261    }
 262
 263    if (ctx->Shader.Flags & GLSL_DUMP) {
 264       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 265          const struct gl_shader *sh = shProg->Shaders[i];
 266          if (!sh)
 267             continue;
 268
 269          printf("GLSL %s shader %d source for linked program %d:\n",
 270                 _mesa_shader_stage_to_string(sh->Stage),
 271                 i,
 272                 shProg->Name);
 273          printf("%s", sh->Source);
 274          printf("\n");
 275       }
 276    }
 277
 278    if (!brw_shader_precompile(ctx, shProg))
 279       return false;
 280
 281    return true;
 282 }
 283
 284
 285 int
 286 brw_type_for_base_type(const struct glsl_type *type)
 287 {
 288    switch (type->base_type) {
 289    case GLSL_TYPE_FLOAT:
 290       return BRW_REGISTER_TYPE_F;
 291    case GLSL_TYPE_INT:
 292    case GLSL_TYPE_BOOL:
 293       return BRW_REGISTER_TYPE_D;
 294    case GLSL_TYPE_UINT:
 295       return BRW_REGISTER_TYPE_UD;
 296    case GLSL_TYPE_ARRAY:
 297       return brw_type_for_base_type(type->fields.array);
 298    case GLSL_TYPE_STRUCT:
 299    case GLSL_TYPE_SAMPLER:
 300    case GLSL_TYPE_ATOMIC_UINT:
 301       /* These should be overridden with the type of the member when
 302        * dereferenced into.  BRW_REGISTER_TYPE_UD seems like a likely
 303        * way to trip up if we don't.
 304        */
 305       return BRW_REGISTER_TYPE_UD;
 306    case GLSL_TYPE_VOID:
 307    case GLSL_TYPE_ERROR:
 308    case GLSL_TYPE_INTERFACE:
 309       assert(!"not reached");
 310       break;
 311    }
 312
 313    return BRW_REGISTER_TYPE_F;
 314 }
 315
 316 uint32_t
 317 brw_conditional_for_comparison(unsigned int op)
 318 {
 319    switch (op) {
 320    case ir_binop_less:
 321       return BRW_CONDITIONAL_L;
 322    case ir_binop_greater:
 323       return BRW_CONDITIONAL_G;
 324    case ir_binop_lequal:
 325       return BRW_CONDITIONAL_LE;
 326    case ir_binop_gequal:
 327       return BRW_CONDITIONAL_GE;
 328    case ir_binop_equal:
 329    case ir_binop_all_equal: /* same as equal for scalars */
 330       return BRW_CONDITIONAL_Z;
 331    case ir_binop_nequal:
 332    case ir_binop_any_nequal: /* same as nequal for scalars */
 333       return BRW_CONDITIONAL_NZ;
 334    default:
 335       assert(!"not reached: bad operation for comparison");
 336       return BRW_CONDITIONAL_NZ;
 337    }
 338 }
 339
 340 uint32_t
 341 brw_math_function(enum opcode op)
 342 {
 343    switch (op) {
 344    case SHADER_OPCODE_RCP:
 345       return BRW_MATH_FUNCTION_INV;
 346    case SHADER_OPCODE_RSQ:
 347       return BRW_MATH_FUNCTION_RSQ;
 348    case SHADER_OPCODE_SQRT:
 349       return BRW_MATH_FUNCTION_SQRT;
 350    case SHADER_OPCODE_EXP2:
 351       return BRW_MATH_FUNCTION_EXP;
 352    case SHADER_OPCODE_LOG2:
 353       return BRW_MATH_FUNCTION_LOG;
 354    case SHADER_OPCODE_POW:
 355       return BRW_MATH_FUNCTION_POW;
 356    case SHADER_OPCODE_SIN:
 357       return BRW_MATH_FUNCTION_SIN;
 358    case SHADER_OPCODE_COS:
 359       return BRW_MATH_FUNCTION_COS;
 360    case SHADER_OPCODE_INT_QUOTIENT:
 361       return BRW_MATH_FUNCTION_INT_DIV_QUOTIENT;
 362    case SHADER_OPCODE_INT_REMAINDER:
 363       return BRW_MATH_FUNCTION_INT_DIV_REMAINDER;
 364    default:
 365       assert(!"not reached: unknown math function");
 366       return 0;
 367    }
 368 }
 369
 370 uint32_t
 371 brw_texture_offset(struct gl_context *ctx, ir_constant *offset)
 372 {
 373    /* If the driver does not support GL_ARB_gpu_shader5, the offset
 374     * must be constant.
 375     */
 376    assert(offset != NULL || ctx->Extensions.ARB_gpu_shader5);
 377
 378    if (!offset) return 0;  /* nonconstant offset; caller will handle it. */
 379
 380    signed char offsets[3];
 381    for (unsigned i = 0; i < offset->type->vector_elements; i++)
 382       offsets[i] = (signed char) offset->value.i[i];
 383
 384    /* Combine all three offsets into a single unsigned dword:
 385     *
 386     *    bits 11:8 - U Offset (X component)
 387     *    bits  7:4 - V Offset (Y component)
 388     *    bits  3:0 - R Offset (Z component)
 389     */
 390    unsigned offset_bits = 0;
 391    for (unsigned i = 0; i < offset->type->vector_elements; i++) {
 392       const unsigned shift = 4 * (2 - i);
 393       offset_bits |= (offsets[i] << shift) & (0xF << shift);
 394    }
 395    return offset_bits;
 396 }
 397
 398 const char *
 399 brw_instruction_name(enum opcode op)
 400 {
 401    char *fallback;
 402
 403    if (op < ARRAY_SIZE(opcode_descs) && opcode_descs[op].name)
 404       return opcode_descs[op].name;
 405
 406    switch (op) {
 407    case FS_OPCODE_FB_WRITE:
 408       return "fb_write";
 409
 410    case SHADER_OPCODE_RCP:
 411       return "rcp";
 412    case SHADER_OPCODE_RSQ:
 413       return "rsq";
 414    case SHADER_OPCODE_SQRT:
 415       return "sqrt";
 416    case SHADER_OPCODE_EXP2:
 417       return "exp2";
 418    case SHADER_OPCODE_LOG2:
 419       return "log2";
 420    case SHADER_OPCODE_POW:
 421       return "pow";
 422    case SHADER_OPCODE_INT_QUOTIENT:
 423       return "int_quot";
 424    case SHADER_OPCODE_INT_REMAINDER:
 425       return "int_rem";
 426    case SHADER_OPCODE_SIN:
 427       return "sin";
 428    case SHADER_OPCODE_COS:
 429       return "cos";
 430
 431    case SHADER_OPCODE_TEX:
 432       return "tex";
 433    case SHADER_OPCODE_TXD:
 434       return "txd";
 435    case SHADER_OPCODE_TXF:
 436       return "txf";
 437    case SHADER_OPCODE_TXL:
 438       return "txl";
 439    case SHADER_OPCODE_TXS:
 440       return "txs";
 441    case FS_OPCODE_TXB:
 442       return "txb";
 443    case SHADER_OPCODE_TXF_MS:
 444       return "txf_ms";
 445    case SHADER_OPCODE_TXF_MCS:
 446       return "txf_mcs";
 447    case SHADER_OPCODE_TG4:
 448       return "tg4";
 449    case SHADER_OPCODE_TG4_OFFSET:
 450       return "tg4_offset";
 451
 452    case SHADER_OPCODE_GEN4_SCRATCH_READ:
 453       return "gen4_scratch_read";
 454    case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
 455       return "gen4_scratch_write";
 456    case SHADER_OPCODE_GEN7_SCRATCH_READ:
 457       return "gen7_scratch_read";
 458
 459    case FS_OPCODE_DDX:
 460       return "ddx";
 461    case FS_OPCODE_DDY:
 462       return "ddy";
 463
 464    case FS_OPCODE_PIXEL_X:
 465       return "pixel_x";
 466    case FS_OPCODE_PIXEL_Y:
 467       return "pixel_y";
 468
 469    case FS_OPCODE_CINTERP:
 470       return "cinterp";
 471    case FS_OPCODE_LINTERP:
 472       return "linterp";
 473
 474    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
 475       return "uniform_pull_const";
 476    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7:
 477       return "uniform_pull_const_gen7";
 478    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
 479       return "varying_pull_const";
 480    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
 481       return "varying_pull_const_gen7";
 482
 483    case FS_OPCODE_MOV_DISPATCH_TO_FLAGS:
 484       return "mov_dispatch_to_flags";
 485    case FS_OPCODE_DISCARD_JUMP:
 486       return "discard_jump";
 487
 488    case FS_OPCODE_SET_SIMD4X2_OFFSET:
 489       return "set_simd4x2_offset";
 490
 491    case FS_OPCODE_PACK_HALF_2x16_SPLIT:
 492       return "pack_half_2x16_split";
 493    case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X:
 494       return "unpack_half_2x16_split_x";
 495    case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y:
 496       return "unpack_half_2x16_split_y";
 497
 498    case FS_OPCODE_PLACEHOLDER_HALT:
 499       return "placeholder_halt";
 500
 501    case VS_OPCODE_URB_WRITE:
 502       return "vs_urb_write";
 503    case VS_OPCODE_PULL_CONSTANT_LOAD:
 504       return "pull_constant_load";
 505    case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
 506       return "pull_constant_load_gen7";
 507    case VS_OPCODE_UNPACK_FLAGS_SIMD4X2:
 508       return "unpack_flags_simd4x2";
 509
 510    case GS_OPCODE_URB_WRITE:
 511       return "gs_urb_write";
 512    case GS_OPCODE_THREAD_END:
 513       return "gs_thread_end";
 514    case GS_OPCODE_SET_WRITE_OFFSET:
 515       return "set_write_offset";
 516    case GS_OPCODE_SET_VERTEX_COUNT:
 517       return "set_vertex_count";
 518    case GS_OPCODE_SET_DWORD_2_IMMED:
 519       return "set_dword_2_immed";
 520    case GS_OPCODE_PREPARE_CHANNEL_MASKS:
 521       return "prepare_channel_masks";
 522    case GS_OPCODE_SET_CHANNEL_MASKS:
 523       return "set_channel_masks";
 524
 525    default:
 526       /* Yes, this leaks.  It's in debug code, it should never occur, and if
 527        * it does, you should just add the case to the list above.
 528        */
 529       asprintf(&fallback, "op%d", op);
 530       return fallback;
 531    }
 532 }
 533
 534 bool
 535 backend_instruction::is_tex()
 536 {
 537    return (opcode == SHADER_OPCODE_TEX ||
 538            opcode == FS_OPCODE_TXB ||
 539            opcode == SHADER_OPCODE_TXD ||
 540            opcode == SHADER_OPCODE_TXF ||
 541            opcode == SHADER_OPCODE_TXF_MS ||
 542            opcode == SHADER_OPCODE_TXF_MCS ||
 543            opcode == SHADER_OPCODE_TXL ||
 544            opcode == SHADER_OPCODE_TXS ||
 545            opcode == SHADER_OPCODE_LOD ||
 546            opcode == SHADER_OPCODE_TG4 ||
 547            opcode == SHADER_OPCODE_TG4_OFFSET);
 548 }
 549
 550 bool
 551 backend_instruction::is_math()
 552 {
 553    return (opcode == SHADER_OPCODE_RCP ||
 554            opcode == SHADER_OPCODE_RSQ ||
 555            opcode == SHADER_OPCODE_SQRT ||
 556            opcode == SHADER_OPCODE_EXP2 ||
 557            opcode == SHADER_OPCODE_LOG2 ||
 558            opcode == SHADER_OPCODE_SIN ||
 559            opcode == SHADER_OPCODE_COS ||
 560            opcode == SHADER_OPCODE_INT_QUOTIENT ||
 561            opcode == SHADER_OPCODE_INT_REMAINDER ||
 562            opcode == SHADER_OPCODE_POW);
 563 }
 564
 565 bool
 566 backend_instruction::is_control_flow()
 567 {
 568    switch (opcode) {
 569    case BRW_OPCODE_DO:
 570    case BRW_OPCODE_WHILE:
 571    case BRW_OPCODE_IF:
 572    case BRW_OPCODE_ELSE:
 573    case BRW_OPCODE_ENDIF:
 574    case BRW_OPCODE_BREAK:
 575    case BRW_OPCODE_CONTINUE:
 576       return true;
 577    default:
 578       return false;
 579    }
 580 }
 581
 582 bool
 583 backend_instruction::can_do_source_mods()
 584 {
 585    switch (opcode) {
 586    case BRW_OPCODE_ADDC:
 587    case BRW_OPCODE_BFE:
 588    case BRW_OPCODE_BFI1:
 589    case BRW_OPCODE_BFI2:
 590    case BRW_OPCODE_BFREV:
 591    case BRW_OPCODE_CBIT:
 592    case BRW_OPCODE_FBH:
 593    case BRW_OPCODE_FBL:
 594    case BRW_OPCODE_SUBB:
 595       return false;
 596    default:
 597       return true;
 598    }
 599 }
 600
 601 bool
 602 backend_instruction::has_side_effects() const
 603 {
 604    switch (opcode) {
 605    case SHADER_OPCODE_UNTYPED_ATOMIC:
 606       return true;
 607    default:
 608       return false;
 609    }
 610 }
 611
 612 void
 613 backend_visitor::dump_instructions()
 614 {
 615    int ip = 0;
 616    foreach_list(node, &this->instructions) {
 617       backend_instruction *inst = (backend_instruction *)node;
 618       printf("%d: ", ip++);
 619       dump_instruction(inst);
 620    }
 621 }
 622
 623
 624 /**
 625  * Sets up the starting offsets for the groups of binding table entries
 626  * commong to all pipeline stages.
 627  *
 628  * Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
 629  * unused but also make sure that addition of small offsets to them will
 630  * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
 631  */
 632 void
 633 backend_visitor::assign_common_binding_table_offsets(uint32_t next_binding_table_offset)
 634 {
 635    int num_textures = _mesa_fls(prog->SamplersUsed);
 636
 637    stage_prog_data->binding_table.texture_start = next_binding_table_offset;
 638    next_binding_table_offset += num_textures;
 639
 640    if (shader) {
 641       stage_prog_data->binding_table.ubo_start = next_binding_table_offset;
 642       next_binding_table_offset += shader->base.NumUniformBlocks;
 643    } else {
 644       stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0;
 645    }
 646
 647    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
 648       stage_prog_data->binding_table.shader_time_start = next_binding_table_offset;
 649       next_binding_table_offset++;
 650    } else {
 651       stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0;
 652    }
 653
 654    if (prog->UsesGather) {
 655       stage_prog_data->binding_table.gather_texture_start = next_binding_table_offset;
 656       next_binding_table_offset += num_textures;
 657    } else {
 658       stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0;
 659    }
 660
 661    if (shader_prog && shader_prog->NumAtomicBuffers) {
 662       stage_prog_data->binding_table.abo_start = next_binding_table_offset;
 663       next_binding_table_offset += shader_prog->NumAtomicBuffers;
 664    } else {
 665       stage_prog_data->binding_table.abo_start = 0xd0d0d0d0;
 666    }
 667
 668    /* This may or may not be used depending on how the compile goes. */
 669    stage_prog_data->binding_table.pull_constants_start = next_binding_table_offset;
 670    next_binding_table_offset++;
 671
 672    assert(next_binding_table_offset <= BRW_MAX_SURFACES);
 673
 674    /* prog_data->base.binding_table.size will be set by mark_surface_used. */
 675 }