src/mesa/drivers/dri/i965/brw_shader.cpp

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 extern "C" {
  25 #include "main/macros.h"
  26 #include "brw_context.h"
  27 }
  28 #include "brw_vs.h"
  29 #include "brw_vec4_gs.h"
  30 #include "brw_fs.h"
  31 #include "glsl/ir_optimization.h"
  32 #include "glsl/glsl_parser_extras.h"
  33 #include "main/shaderapi.h"
  34
  35 struct gl_shader *
  36 brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
  37 {
  38    struct brw_shader *shader;
  39
  40    shader = rzalloc(NULL, struct brw_shader);
  41    if (shader) {
  42       shader->base.Type = type;
  43       shader->base.Stage = _mesa_shader_enum_to_shader_stage(type);
  44       shader->base.Name = name;
  45       _mesa_init_shader(ctx, &shader->base);
  46    }
  47
  48    return &shader->base;
  49 }
  50
  51 struct gl_shader_program *
  52 brw_new_shader_program(struct gl_context *ctx, GLuint name)
  53 {
  54    struct gl_shader_program *prog = rzalloc(NULL, struct gl_shader_program);
  55    if (prog) {
  56       prog->Name = name;
  57       _mesa_init_shader_program(ctx, prog);
  58    }
  59    return prog;
  60 }
  61
  62 /**
  63  * Performs a compile of the shader stages even when we don't know
  64  * what non-orthogonal state will be set, in the hope that it reflects
  65  * the eventual NOS used, and thus allows us to produce link failures.
  66  */
  67 static bool
  68 brw_shader_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
  69 {
  70    struct brw_context *brw = brw_context(ctx);
  71
  72    if (brw->precompile && !brw_fs_precompile(ctx, prog))
  73       return false;
  74
  75    if (brw->precompile && !brw_gs_precompile(ctx, prog))
  76       return false;
  77
  78    if (brw->precompile && !brw_vs_precompile(ctx, prog))
  79       return false;
  80
  81    return true;
  82 }
  83
  84 static void
  85 brw_lower_packing_builtins(struct brw_context *brw,
  86                            gl_shader_stage shader_type,
  87                            exec_list *ir)
  88 {
  89    int ops = LOWER_PACK_SNORM_2x16
  90            | LOWER_UNPACK_SNORM_2x16
  91            | LOWER_PACK_UNORM_2x16
  92            | LOWER_UNPACK_UNORM_2x16
  93            | LOWER_PACK_SNORM_4x8
  94            | LOWER_UNPACK_SNORM_4x8
  95            | LOWER_PACK_UNORM_4x8
  96            | LOWER_UNPACK_UNORM_4x8;
  97
  98    if (brw->gen >= 7) {
  99       /* Gen7 introduced the f32to16 and f16to32 instructions, which can be
 100        * used to execute packHalf2x16 and unpackHalf2x16. For AOS code, no
 101        * lowering is needed. For SOA code, the Half2x16 ops must be
 102        * scalarized.
 103        */
 104       if (shader_type == MESA_SHADER_FRAGMENT) {
 105          ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
 106              |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
 107       }
 108    } else {
 109       ops |= LOWER_PACK_HALF_2x16
 110           |  LOWER_UNPACK_HALF_2x16;
 111    }
 112
 113    lower_packing_builtins(ir, ops);
 114 }
 115
 116 GLboolean
 117 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 118 {
 119    struct brw_context *brw = brw_context(ctx);
 120    unsigned int stage;
 121
 122    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 123       struct brw_shader *shader =
 124          (struct brw_shader *)shProg->_LinkedShaders[stage];
 125
 126       if (!shader)
 127          continue;
 128
 129       struct gl_program *prog =
 130          ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
 131                                 shader->base.Name);
 132       if (!prog)
 133         return false;
 134       prog->Parameters = _mesa_new_parameter_list();
 135
 136       _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
 137
 138       bool progress;
 139
 140       /* lower_packing_builtins() inserts arithmetic instructions, so it
 141        * must precede lower_instructions().
 142        */
 143       brw_lower_packing_builtins(brw, (gl_shader_stage) stage, shader->base.ir);
 144       do_mat_op_to_vec(shader->base.ir);
 145       const int bitfield_insert = brw->gen >= 7
 146                                   ? BITFIELD_INSERT_TO_BFM_BFI
 147                                   : 0;
 148       const int lrp_to_arith = brw->gen < 6 ? LRP_TO_ARITH : 0;
 149       lower_instructions(shader->base.ir,
 150                          MOD_TO_FRACT |
 151                          DIV_TO_MUL_RCP |
 152                          SUB_TO_ADD_NEG |
 153                          EXP_TO_EXP2 |
 154                          LOG_TO_LOG2 |
 155                          bitfield_insert |
 156                          lrp_to_arith |
 157                          LDEXP_TO_ARITH);
 158
 159       /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 160        * if-statements need to be flattened.
 161        */
 162       if (brw->gen < 6)
 163          lower_if_to_cond_assign(shader->base.ir, 16);
 164
 165       do_lower_texture_projection(shader->base.ir);
 166       brw_lower_texture_gradients(brw, shader->base.ir);
 167       do_vec_index_to_cond_assign(shader->base.ir);
 168       lower_vector_insert(shader->base.ir, true);
 169       brw_do_cubemap_normalize(shader->base.ir);
 170       lower_offset_arrays(shader->base.ir);
 171       brw_do_lower_unnormalized_offset(shader->base.ir);
 172       lower_noise(shader->base.ir);
 173       lower_quadop_vector(shader->base.ir, false);
 174
 175       bool input = true;
 176       bool output = stage == MESA_SHADER_FRAGMENT;
 177       bool temp = stage == MESA_SHADER_FRAGMENT;
 178       bool uniform = false;
 179
 180       bool lowered_variable_indexing =
 181          lower_variable_index_to_cond_assign(shader->base.ir,
 182                                              input, output, temp, uniform);
 183
 184       if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
 185          perf_debug("Unsupported form of variable indexing in FS; falling "
 186                     "back to very inefficient code generation\n");
 187       }
 188
 189       /* FINISHME: Do this before the variable index lowering. */
 190       lower_ubo_reference(&shader->base, shader->base.ir);
 191
 192       do {
 193          progress = false;
 194
 195          if (stage == MESA_SHADER_FRAGMENT) {
 196             brw_do_channel_expressions(shader->base.ir);
 197             brw_do_vector_splitting(shader->base.ir);
 198          }
 199
 200          progress = do_lower_jumps(shader->base.ir, true, true,
 201                                    true, /* main return */
 202                                    false, /* continue */
 203                                    false /* loops */
 204                                    ) || progress;
 205
 206          progress = do_common_optimization(shader->base.ir, true, true, 32,
 207                                            &ctx->ShaderCompilerOptions[stage])
 208            || progress;
 209       } while (progress);
 210
 211       /* Make a pass over the IR to add state references for any built-in
 212        * uniforms that are used.  This has to be done now (during linking).
 213        * Code generation doesn't happen until the first time this shader is
 214        * used for rendering.  Waiting until then to generate the parameters is
 215        * too late.  At that point, the values for the built-in uniforms won't
 216        * get sent to the shader.
 217        */
 218       foreach_list(node, shader->base.ir) {
 219          ir_variable *var = ((ir_instruction *) node)->as_variable();
 220
 221          if ((var == NULL) || (var->data.mode != ir_var_uniform)
 222              || (strncmp(var->name, "gl_", 3) != 0))
 223             continue;
 224
 225          const ir_state_slot *const slots = var->state_slots;
 226          assert(var->state_slots != NULL);
 227
 228          for (unsigned int i = 0; i < var->num_state_slots; i++) {
 229             _mesa_add_state_reference(prog->Parameters,
 230                                       (gl_state_index *) slots[i].tokens);
 231          }
 232       }
 233
 234       validate_ir_tree(shader->base.ir);
 235
 236       do_set_program_inouts(shader->base.ir, prog, shader->base.Stage);
 237
 238       prog->SamplersUsed = shader->base.active_samplers;
 239       _mesa_update_shader_textures_used(shProg, prog);
 240
 241       _mesa_reference_program(ctx, &shader->base.Program, prog);
 242
 243       brw_add_texrect_params(prog);
 244
 245       /* This has to be done last.  Any operation that can cause
 246        * prog->ParameterValues to get reallocated (e.g., anything that adds a
 247        * program constant) has to happen before creating this linkage.
 248        */
 249       _mesa_associate_uniform_storage(ctx, shProg, prog->Parameters);
 250
 251       _mesa_reference_program(ctx, &prog, NULL);
 252
 253       if (ctx->Shader.Flags & GLSL_DUMP) {
 254          fprintf(stderr, "\n");
 255          fprintf(stderr, "GLSL IR for linked %s program %d:\n",
 256                  _mesa_shader_stage_to_string(shader->base.Stage),
 257                  shProg->Name);
 258          _mesa_print_ir(stderr, shader->base.ir, NULL);
 259          fprintf(stderr, "\n");
 260       }
 261    }
 262
 263    if (ctx->Shader.Flags & GLSL_DUMP) {
 264       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 265          const struct gl_shader *sh = shProg->Shaders[i];
 266          if (!sh)
 267             continue;
 268
 269          fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
 270                  _mesa_shader_stage_to_string(sh->Stage),
 271                  i, shProg->Name);
 272          fprintf(stderr, "%s", sh->Source);
 273          fprintf(stderr, "\n");
 274       }
 275    }
 276
 277    if (!brw_shader_precompile(ctx, shProg))
 278       return false;
 279
 280    return true;
 281 }
 282
 283
 284 int
 285 brw_type_for_base_type(const struct glsl_type *type)
 286 {
 287    switch (type->base_type) {
 288    case GLSL_TYPE_FLOAT:
 289       return BRW_REGISTER_TYPE_F;
 290    case GLSL_TYPE_INT:
 291    case GLSL_TYPE_BOOL:
 292       return BRW_REGISTER_TYPE_D;
 293    case GLSL_TYPE_UINT:
 294       return BRW_REGISTER_TYPE_UD;
 295    case GLSL_TYPE_ARRAY:
 296       return brw_type_for_base_type(type->fields.array);
 297    case GLSL_TYPE_STRUCT:
 298    case GLSL_TYPE_SAMPLER:
 299    case GLSL_TYPE_ATOMIC_UINT:
 300       /* These should be overridden with the type of the member when
 301        * dereferenced into.  BRW_REGISTER_TYPE_UD seems like a likely
 302        * way to trip up if we don't.
 303        */
 304       return BRW_REGISTER_TYPE_UD;
 305    case GLSL_TYPE_IMAGE:
 306       return BRW_REGISTER_TYPE_UD;
 307    case GLSL_TYPE_VOID:
 308    case GLSL_TYPE_ERROR:
 309    case GLSL_TYPE_INTERFACE:
 310       assert(!"not reached");
 311       break;
 312    }
 313
 314    return BRW_REGISTER_TYPE_F;
 315 }
 316
 317 uint32_t
 318 brw_conditional_for_comparison(unsigned int op)
 319 {
 320    switch (op) {
 321    case ir_binop_less:
 322       return BRW_CONDITIONAL_L;
 323    case ir_binop_greater:
 324       return BRW_CONDITIONAL_G;
 325    case ir_binop_lequal:
 326       return BRW_CONDITIONAL_LE;
 327    case ir_binop_gequal:
 328       return BRW_CONDITIONAL_GE;
 329    case ir_binop_equal:
 330    case ir_binop_all_equal: /* same as equal for scalars */
 331       return BRW_CONDITIONAL_Z;
 332    case ir_binop_nequal:
 333    case ir_binop_any_nequal: /* same as nequal for scalars */
 334       return BRW_CONDITIONAL_NZ;
 335    default:
 336       assert(!"not reached: bad operation for comparison");
 337       return BRW_CONDITIONAL_NZ;
 338    }
 339 }
 340
 341 uint32_t
 342 brw_math_function(enum opcode op)
 343 {
 344    switch (op) {
 345    case SHADER_OPCODE_RCP:
 346       return BRW_MATH_FUNCTION_INV;
 347    case SHADER_OPCODE_RSQ:
 348       return BRW_MATH_FUNCTION_RSQ;
 349    case SHADER_OPCODE_SQRT:
 350       return BRW_MATH_FUNCTION_SQRT;
 351    case SHADER_OPCODE_EXP2:
 352       return BRW_MATH_FUNCTION_EXP;
 353    case SHADER_OPCODE_LOG2:
 354       return BRW_MATH_FUNCTION_LOG;
 355    case SHADER_OPCODE_POW:
 356       return BRW_MATH_FUNCTION_POW;
 357    case SHADER_OPCODE_SIN:
 358       return BRW_MATH_FUNCTION_SIN;
 359    case SHADER_OPCODE_COS:
 360       return BRW_MATH_FUNCTION_COS;
 361    case SHADER_OPCODE_INT_QUOTIENT:
 362       return BRW_MATH_FUNCTION_INT_DIV_QUOTIENT;
 363    case SHADER_OPCODE_INT_REMAINDER:
 364       return BRW_MATH_FUNCTION_INT_DIV_REMAINDER;
 365    default:
 366       assert(!"not reached: unknown math function");
 367       return 0;
 368    }
 369 }
 370
 371 uint32_t
 372 brw_texture_offset(struct gl_context *ctx, ir_constant *offset)
 373 {
 374    /* If the driver does not support GL_ARB_gpu_shader5, the offset
 375     * must be constant.
 376     */
 377    assert(offset != NULL || ctx->Extensions.ARB_gpu_shader5);
 378
 379    if (!offset) return 0;  /* nonconstant offset; caller will handle it. */
 380
 381    signed char offsets[3];
 382    for (unsigned i = 0; i < offset->type->vector_elements; i++)
 383       offsets[i] = (signed char) offset->value.i[i];
 384
 385    /* Combine all three offsets into a single unsigned dword:
 386     *
 387     *    bits 11:8 - U Offset (X component)
 388     *    bits  7:4 - V Offset (Y component)
 389     *    bits  3:0 - R Offset (Z component)
 390     */
 391    unsigned offset_bits = 0;
 392    for (unsigned i = 0; i < offset->type->vector_elements; i++) {
 393       const unsigned shift = 4 * (2 - i);
 394       offset_bits |= (offsets[i] << shift) & (0xF << shift);
 395    }
 396    return offset_bits;
 397 }
 398
 399 const char *
 400 brw_instruction_name(enum opcode op)
 401 {
 402    char *fallback;
 403
 404    if (op < ARRAY_SIZE(opcode_descs) && opcode_descs[op].name)
 405       return opcode_descs[op].name;
 406
 407    switch (op) {
 408    case FS_OPCODE_FB_WRITE:
 409       return "fb_write";
 410    case FS_OPCODE_BLORP_FB_WRITE:
 411       return "blorp_fb_write";
 412
 413    case SHADER_OPCODE_RCP:
 414       return "rcp";
 415    case SHADER_OPCODE_RSQ:
 416       return "rsq";
 417    case SHADER_OPCODE_SQRT:
 418       return "sqrt";
 419    case SHADER_OPCODE_EXP2:
 420       return "exp2";
 421    case SHADER_OPCODE_LOG2:
 422       return "log2";
 423    case SHADER_OPCODE_POW:
 424       return "pow";
 425    case SHADER_OPCODE_INT_QUOTIENT:
 426       return "int_quot";
 427    case SHADER_OPCODE_INT_REMAINDER:
 428       return "int_rem";
 429    case SHADER_OPCODE_SIN:
 430       return "sin";
 431    case SHADER_OPCODE_COS:
 432       return "cos";
 433
 434    case SHADER_OPCODE_TEX:
 435       return "tex";
 436    case SHADER_OPCODE_TXD:
 437       return "txd";
 438    case SHADER_OPCODE_TXF:
 439       return "txf";
 440    case SHADER_OPCODE_TXL:
 441       return "txl";
 442    case SHADER_OPCODE_TXS:
 443       return "txs";
 444    case FS_OPCODE_TXB:
 445       return "txb";
 446    case SHADER_OPCODE_TXF_CMS:
 447       return "txf_cms";
 448    case SHADER_OPCODE_TXF_UMS:
 449       return "txf_ums";
 450    case SHADER_OPCODE_TXF_MCS:
 451       return "txf_mcs";
 452    case SHADER_OPCODE_TG4:
 453       return "tg4";
 454    case SHADER_OPCODE_TG4_OFFSET:
 455       return "tg4_offset";
 456
 457    case SHADER_OPCODE_GEN4_SCRATCH_READ:
 458       return "gen4_scratch_read";
 459    case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
 460       return "gen4_scratch_write";
 461    case SHADER_OPCODE_GEN7_SCRATCH_READ:
 462       return "gen7_scratch_read";
 463
 464    case FS_OPCODE_DDX:
 465       return "ddx";
 466    case FS_OPCODE_DDY:
 467       return "ddy";
 468
 469    case FS_OPCODE_PIXEL_X:
 470       return "pixel_x";
 471    case FS_OPCODE_PIXEL_Y:
 472       return "pixel_y";
 473
 474    case FS_OPCODE_CINTERP:
 475       return "cinterp";
 476    case FS_OPCODE_LINTERP:
 477       return "linterp";
 478
 479    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
 480       return "uniform_pull_const";
 481    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7:
 482       return "uniform_pull_const_gen7";
 483    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
 484       return "varying_pull_const";
 485    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
 486       return "varying_pull_const_gen7";
 487
 488    case FS_OPCODE_MOV_DISPATCH_TO_FLAGS:
 489       return "mov_dispatch_to_flags";
 490    case FS_OPCODE_DISCARD_JUMP:
 491       return "discard_jump";
 492
 493    case FS_OPCODE_SET_SIMD4X2_OFFSET:
 494       return "set_simd4x2_offset";
 495
 496    case FS_OPCODE_PACK_HALF_2x16_SPLIT:
 497       return "pack_half_2x16_split";
 498    case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X:
 499       return "unpack_half_2x16_split_x";
 500    case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y:
 501       return "unpack_half_2x16_split_y";
 502
 503    case FS_OPCODE_PLACEHOLDER_HALT:
 504       return "placeholder_halt";
 505
 506    case VS_OPCODE_URB_WRITE:
 507       return "vs_urb_write";
 508    case VS_OPCODE_PULL_CONSTANT_LOAD:
 509       return "pull_constant_load";
 510    case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
 511       return "pull_constant_load_gen7";
 512    case VS_OPCODE_UNPACK_FLAGS_SIMD4X2:
 513       return "unpack_flags_simd4x2";
 514
 515    case GS_OPCODE_URB_WRITE:
 516       return "gs_urb_write";
 517    case GS_OPCODE_THREAD_END:
 518       return "gs_thread_end";
 519    case GS_OPCODE_SET_WRITE_OFFSET:
 520       return "set_write_offset";
 521    case GS_OPCODE_SET_VERTEX_COUNT:
 522       return "set_vertex_count";
 523    case GS_OPCODE_SET_DWORD_2_IMMED:
 524       return "set_dword_2_immed";
 525    case GS_OPCODE_PREPARE_CHANNEL_MASKS:
 526       return "prepare_channel_masks";
 527    case GS_OPCODE_SET_CHANNEL_MASKS:
 528       return "set_channel_masks";
 529    case GS_OPCODE_GET_INSTANCE_ID:
 530       return "get_instance_id";
 531
 532    default:
 533       /* Yes, this leaks.  It's in debug code, it should never occur, and if
 534        * it does, you should just add the case to the list above.
 535        */
 536       asprintf(&fallback, "op%d", op);
 537       return fallback;
 538    }
 539 }
 540
 541 bool
 542 backend_instruction::is_tex()
 543 {
 544    return (opcode == SHADER_OPCODE_TEX ||
 545            opcode == FS_OPCODE_TXB ||
 546            opcode == SHADER_OPCODE_TXD ||
 547            opcode == SHADER_OPCODE_TXF ||
 548            opcode == SHADER_OPCODE_TXF_CMS ||
 549            opcode == SHADER_OPCODE_TXF_UMS ||
 550            opcode == SHADER_OPCODE_TXF_MCS ||
 551            opcode == SHADER_OPCODE_TXL ||
 552            opcode == SHADER_OPCODE_TXS ||
 553            opcode == SHADER_OPCODE_LOD ||
 554            opcode == SHADER_OPCODE_TG4 ||
 555            opcode == SHADER_OPCODE_TG4_OFFSET);
 556 }
 557
 558 bool
 559 backend_instruction::is_math()
 560 {
 561    return (opcode == SHADER_OPCODE_RCP ||
 562            opcode == SHADER_OPCODE_RSQ ||
 563            opcode == SHADER_OPCODE_SQRT ||
 564            opcode == SHADER_OPCODE_EXP2 ||
 565            opcode == SHADER_OPCODE_LOG2 ||
 566            opcode == SHADER_OPCODE_SIN ||
 567            opcode == SHADER_OPCODE_COS ||
 568            opcode == SHADER_OPCODE_INT_QUOTIENT ||
 569            opcode == SHADER_OPCODE_INT_REMAINDER ||
 570            opcode == SHADER_OPCODE_POW);
 571 }
 572
 573 bool
 574 backend_instruction::is_control_flow()
 575 {
 576    switch (opcode) {
 577    case BRW_OPCODE_DO:
 578    case BRW_OPCODE_WHILE:
 579    case BRW_OPCODE_IF:
 580    case BRW_OPCODE_ELSE:
 581    case BRW_OPCODE_ENDIF:
 582    case BRW_OPCODE_BREAK:
 583    case BRW_OPCODE_CONTINUE:
 584       return true;
 585    default:
 586       return false;
 587    }
 588 }
 589
 590 bool
 591 backend_instruction::can_do_source_mods()
 592 {
 593    switch (opcode) {
 594    case BRW_OPCODE_ADDC:
 595    case BRW_OPCODE_BFE:
 596    case BRW_OPCODE_BFI1:
 597    case BRW_OPCODE_BFI2:
 598    case BRW_OPCODE_BFREV:
 599    case BRW_OPCODE_CBIT:
 600    case BRW_OPCODE_FBH:
 601    case BRW_OPCODE_FBL:
 602    case BRW_OPCODE_SUBB:
 603       return false;
 604    default:
 605       return true;
 606    }
 607 }
 608
 609 bool
 610 backend_instruction::can_do_saturate()
 611 {
 612    switch (opcode) {
 613    case BRW_OPCODE_ADD:
 614    case BRW_OPCODE_ASR:
 615    case BRW_OPCODE_AVG:
 616    case BRW_OPCODE_DP2:
 617    case BRW_OPCODE_DP3:
 618    case BRW_OPCODE_DP4:
 619    case BRW_OPCODE_DPH:
 620    case BRW_OPCODE_F16TO32:
 621    case BRW_OPCODE_F32TO16:
 622    case BRW_OPCODE_LINE:
 623    case BRW_OPCODE_LRP:
 624    case BRW_OPCODE_MAC:
 625    case BRW_OPCODE_MACH:
 626    case BRW_OPCODE_MAD:
 627    case BRW_OPCODE_MATH:
 628    case BRW_OPCODE_MOV:
 629    case BRW_OPCODE_MUL:
 630    case BRW_OPCODE_PLN:
 631    case BRW_OPCODE_RNDD:
 632    case BRW_OPCODE_RNDE:
 633    case BRW_OPCODE_RNDU:
 634    case BRW_OPCODE_RNDZ:
 635    case BRW_OPCODE_SEL:
 636    case BRW_OPCODE_SHL:
 637    case BRW_OPCODE_SHR:
 638    case FS_OPCODE_LINTERP:
 639    case SHADER_OPCODE_COS:
 640    case SHADER_OPCODE_EXP2:
 641    case SHADER_OPCODE_LOG2:
 642    case SHADER_OPCODE_POW:
 643    case SHADER_OPCODE_RCP:
 644    case SHADER_OPCODE_RSQ:
 645    case SHADER_OPCODE_SIN:
 646    case SHADER_OPCODE_SQRT:
 647       return true;
 648    default:
 649       return false;
 650    }
 651 }
 652
 653 bool
 654 backend_instruction::has_side_effects() const
 655 {
 656    switch (opcode) {
 657    case SHADER_OPCODE_UNTYPED_ATOMIC:
 658       return true;
 659    default:
 660       return false;
 661    }
 662 }
 663
 664 void
 665 backend_visitor::dump_instructions()
 666 {
 667    int ip = 0;
 668    foreach_list(node, &this->instructions) {
 669       backend_instruction *inst = (backend_instruction *)node;
 670       fprintf(stderr, "%d: ", ip++);
 671       dump_instruction(inst);
 672    }
 673 }
 674
 675
 676 /**
 677  * Sets up the starting offsets for the groups of binding table entries
 678  * commong to all pipeline stages.
 679  *
 680  * Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
 681  * unused but also make sure that addition of small offsets to them will
 682  * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
 683  */
 684 void
 685 backend_visitor::assign_common_binding_table_offsets(uint32_t next_binding_table_offset)
 686 {
 687    int num_textures = _mesa_fls(prog->SamplersUsed);
 688
 689    stage_prog_data->binding_table.texture_start = next_binding_table_offset;
 690    next_binding_table_offset += num_textures;
 691
 692    if (shader) {
 693       stage_prog_data->binding_table.ubo_start = next_binding_table_offset;
 694       next_binding_table_offset += shader->base.NumUniformBlocks;
 695    } else {
 696       stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0;
 697    }
 698
 699    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
 700       stage_prog_data->binding_table.shader_time_start = next_binding_table_offset;
 701       next_binding_table_offset++;
 702    } else {
 703       stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0;
 704    }
 705
 706    if (prog->UsesGather) {
 707       stage_prog_data->binding_table.gather_texture_start = next_binding_table_offset;
 708       next_binding_table_offset += num_textures;
 709    } else {
 710       stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0;
 711    }
 712
 713    if (shader_prog && shader_prog->NumAtomicBuffers) {
 714       stage_prog_data->binding_table.abo_start = next_binding_table_offset;
 715       next_binding_table_offset += shader_prog->NumAtomicBuffers;
 716    } else {
 717       stage_prog_data->binding_table.abo_start = 0xd0d0d0d0;
 718    }
 719
 720    /* This may or may not be used depending on how the compile goes. */
 721    stage_prog_data->binding_table.pull_constants_start = next_binding_table_offset;
 722    next_binding_table_offset++;
 723
 724    assert(next_binding_table_offset <= BRW_MAX_SURFACES);
 725
 726    /* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */
 727 }