2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "main/macros.h"
26 #include "brw_context.h"
30 #include "glsl/ir_optimization.h"
31 #include "glsl/glsl_parser_extras.h"
32 #include "main/shaderapi.h"
35 brw_new_shader(struct gl_context
*ctx
, GLuint name
, GLuint type
)
37 struct brw_shader
*shader
;
39 shader
= rzalloc(NULL
, struct brw_shader
);
41 shader
->base
.Type
= type
;
42 shader
->base
.Name
= name
;
43 _mesa_init_shader(ctx
, &shader
->base
);
49 struct gl_shader_program
*
50 brw_new_shader_program(struct gl_context
*ctx
, GLuint name
)
52 struct gl_shader_program
*prog
= rzalloc(NULL
, struct gl_shader_program
);
55 _mesa_init_shader_program(ctx
, prog
);
61 * Performs a compile of the shader stages even when we don't know
62 * what non-orthogonal state will be set, in the hope that it reflects
63 * the eventual NOS used, and thus allows us to produce link failures.
66 brw_shader_precompile(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
68 struct brw_context
*brw
= brw_context(ctx
);
70 if (brw
->precompile
&& !brw_fs_precompile(ctx
, prog
))
73 if (brw
->precompile
&& !brw_vs_precompile(ctx
, prog
))
80 brw_lower_packing_builtins(struct brw_context
*brw
,
81 gl_shader_type shader_type
,
84 int ops
= LOWER_PACK_SNORM_2x16
85 | LOWER_UNPACK_SNORM_2x16
86 | LOWER_PACK_UNORM_2x16
87 | LOWER_UNPACK_UNORM_2x16
88 | LOWER_PACK_SNORM_4x8
89 | LOWER_UNPACK_SNORM_4x8
90 | LOWER_PACK_UNORM_4x8
91 | LOWER_UNPACK_UNORM_4x8
;
94 /* Gen7 introduced the f32to16 and f16to32 instructions, which can be
95 * used to execute packHalf2x16 and unpackHalf2x16. For AOS code, no
96 * lowering is needed. For SOA code, the Half2x16 ops must be
99 if (shader_type
== MESA_SHADER_FRAGMENT
) {
100 ops
|= LOWER_PACK_HALF_2x16_TO_SPLIT
101 | LOWER_UNPACK_HALF_2x16_TO_SPLIT
;
104 ops
|= LOWER_PACK_HALF_2x16
105 | LOWER_UNPACK_HALF_2x16
;
108 lower_packing_builtins(ir
, ops
);
112 brw_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*shProg
)
114 struct brw_context
*brw
= brw_context(ctx
);
117 for (stage
= 0; stage
< ARRAY_SIZE(shProg
->_LinkedShaders
); stage
++) {
118 struct brw_shader
*shader
=
119 (struct brw_shader
*)shProg
->_LinkedShaders
[stage
];
124 struct gl_program
*prog
=
125 ctx
->Driver
.NewProgram(ctx
, _mesa_program_index_to_target(stage
),
129 prog
->Parameters
= _mesa_new_parameter_list();
131 _mesa_copy_linked_program_data((gl_shader_type
) stage
, shProg
, prog
);
133 void *mem_ctx
= ralloc_context(NULL
);
137 ralloc_free(shader
->ir
);
138 shader
->ir
= new(shader
) exec_list
;
139 clone_ir_list(mem_ctx
, shader
->ir
, shader
->base
.ir
);
141 /* lower_packing_builtins() inserts arithmetic instructions, so it
142 * must precede lower_instructions().
144 brw_lower_packing_builtins(brw
, (gl_shader_type
) stage
, shader
->ir
);
145 do_mat_op_to_vec(shader
->ir
);
146 const int bitfield_insert
= brw
->gen
>= 7
147 ? BITFIELD_INSERT_TO_BFM_BFI
149 const int lrp_to_arith
= brw
->gen
< 6 ? LRP_TO_ARITH
: 0;
150 lower_instructions(shader
->ir
,
159 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
160 * if-statements need to be flattened.
163 lower_if_to_cond_assign(shader
->ir
, 16);
165 do_lower_texture_projection(shader
->ir
);
166 brw_lower_texture_gradients(brw
, shader
->ir
);
167 do_vec_index_to_cond_assign(shader
->ir
);
168 lower_vector_insert(shader
->ir
, true);
169 brw_do_cubemap_normalize(shader
->ir
);
170 lower_noise(shader
->ir
);
171 lower_quadop_vector(shader
->ir
, false);
174 bool output
= stage
== MESA_SHADER_FRAGMENT
;
175 bool temp
= stage
== MESA_SHADER_FRAGMENT
;
176 bool uniform
= false;
178 bool lowered_variable_indexing
=
179 lower_variable_index_to_cond_assign(shader
->ir
,
180 input
, output
, temp
, uniform
);
182 if (unlikely(brw
->perf_debug
&& lowered_variable_indexing
)) {
183 perf_debug("Unsupported form of variable indexing in FS; falling "
184 "back to very inefficient code generation\n");
187 /* FINISHME: Do this before the variable index lowering. */
188 lower_ubo_reference(&shader
->base
, shader
->ir
);
193 if (stage
== MESA_SHADER_FRAGMENT
) {
194 brw_do_channel_expressions(shader
->ir
);
195 brw_do_vector_splitting(shader
->ir
);
198 progress
= do_lower_jumps(shader
->ir
, true, true,
199 true, /* main return */
200 false, /* continue */
204 progress
= do_common_optimization(shader
->ir
, true, true, 32,
205 &ctx
->ShaderCompilerOptions
[stage
])
209 /* Make a pass over the IR to add state references for any built-in
210 * uniforms that are used. This has to be done now (during linking).
211 * Code generation doesn't happen until the first time this shader is
212 * used for rendering. Waiting until then to generate the parameters is
213 * too late. At that point, the values for the built-in uniforms won't
214 * get sent to the shader.
216 foreach_list(node
, shader
->ir
) {
217 ir_variable
*var
= ((ir_instruction
*) node
)->as_variable();
219 if ((var
== NULL
) || (var
->mode
!= ir_var_uniform
)
220 || (strncmp(var
->name
, "gl_", 3) != 0))
223 const ir_state_slot
*const slots
= var
->state_slots
;
224 assert(var
->state_slots
!= NULL
);
226 for (unsigned int i
= 0; i
< var
->num_state_slots
; i
++) {
227 _mesa_add_state_reference(prog
->Parameters
,
228 (gl_state_index
*) slots
[i
].tokens
);
232 validate_ir_tree(shader
->ir
);
234 reparent_ir(shader
->ir
, shader
->ir
);
235 ralloc_free(mem_ctx
);
237 do_set_program_inouts(shader
->ir
, prog
, shader
->base
.Type
);
239 prog
->SamplersUsed
= shader
->base
.active_samplers
;
240 _mesa_update_shader_textures_used(shProg
, prog
);
242 _mesa_reference_program(ctx
, &shader
->base
.Program
, prog
);
244 brw_add_texrect_params(prog
);
246 /* This has to be done last. Any operation that can cause
247 * prog->ParameterValues to get reallocated (e.g., anything that adds a
248 * program constant) has to happen before creating this linkage.
250 _mesa_associate_uniform_storage(ctx
, shProg
, prog
->Parameters
);
252 _mesa_reference_program(ctx
, &prog
, NULL
);
254 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
256 printf("GLSL IR for linked %s program %d:\n",
257 _mesa_glsl_shader_target_name(shader
->base
.Type
), shProg
->Name
);
258 _mesa_print_ir(shader
->base
.ir
, NULL
);
263 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
264 for (unsigned i
= 0; i
< shProg
->NumShaders
; i
++) {
265 const struct gl_shader
*sh
= shProg
->Shaders
[i
];
269 printf("GLSL %s shader %d source for linked program %d:\n",
270 _mesa_glsl_shader_target_name(sh
->Type
),
273 printf("%s", sh
->Source
);
278 if (!brw_shader_precompile(ctx
, shProg
))
286 brw_type_for_base_type(const struct glsl_type
*type
)
288 switch (type
->base_type
) {
289 case GLSL_TYPE_FLOAT
:
290 return BRW_REGISTER_TYPE_F
;
293 return BRW_REGISTER_TYPE_D
;
295 return BRW_REGISTER_TYPE_UD
;
296 case GLSL_TYPE_ARRAY
:
297 return brw_type_for_base_type(type
->fields
.array
);
298 case GLSL_TYPE_STRUCT
:
299 case GLSL_TYPE_SAMPLER
:
300 /* These should be overridden with the type of the member when
301 * dereferenced into. BRW_REGISTER_TYPE_UD seems like a likely
302 * way to trip up if we don't.
304 return BRW_REGISTER_TYPE_UD
;
306 case GLSL_TYPE_ERROR
:
307 case GLSL_TYPE_INTERFACE
:
308 assert(!"not reached");
312 return BRW_REGISTER_TYPE_F
;
316 brw_conditional_for_comparison(unsigned int op
)
320 return BRW_CONDITIONAL_L
;
321 case ir_binop_greater
:
322 return BRW_CONDITIONAL_G
;
323 case ir_binop_lequal
:
324 return BRW_CONDITIONAL_LE
;
325 case ir_binop_gequal
:
326 return BRW_CONDITIONAL_GE
;
328 case ir_binop_all_equal
: /* same as equal for scalars */
329 return BRW_CONDITIONAL_Z
;
330 case ir_binop_nequal
:
331 case ir_binop_any_nequal
: /* same as nequal for scalars */
332 return BRW_CONDITIONAL_NZ
;
334 assert(!"not reached: bad operation for comparison");
335 return BRW_CONDITIONAL_NZ
;
340 brw_math_function(enum opcode op
)
343 case SHADER_OPCODE_RCP
:
344 return BRW_MATH_FUNCTION_INV
;
345 case SHADER_OPCODE_RSQ
:
346 return BRW_MATH_FUNCTION_RSQ
;
347 case SHADER_OPCODE_SQRT
:
348 return BRW_MATH_FUNCTION_SQRT
;
349 case SHADER_OPCODE_EXP2
:
350 return BRW_MATH_FUNCTION_EXP
;
351 case SHADER_OPCODE_LOG2
:
352 return BRW_MATH_FUNCTION_LOG
;
353 case SHADER_OPCODE_POW
:
354 return BRW_MATH_FUNCTION_POW
;
355 case SHADER_OPCODE_SIN
:
356 return BRW_MATH_FUNCTION_SIN
;
357 case SHADER_OPCODE_COS
:
358 return BRW_MATH_FUNCTION_COS
;
359 case SHADER_OPCODE_INT_QUOTIENT
:
360 return BRW_MATH_FUNCTION_INT_DIV_QUOTIENT
;
361 case SHADER_OPCODE_INT_REMAINDER
:
362 return BRW_MATH_FUNCTION_INT_DIV_REMAINDER
;
364 assert(!"not reached: unknown math function");
370 brw_texture_offset(ir_constant
*offset
)
372 assert(offset
!= NULL
);
374 signed char offsets
[3];
375 for (unsigned i
= 0; i
< offset
->type
->vector_elements
; i
++)
376 offsets
[i
] = (signed char) offset
->value
.i
[i
];
378 /* Combine all three offsets into a single unsigned dword:
380 * bits 11:8 - U Offset (X component)
381 * bits 7:4 - V Offset (Y component)
382 * bits 3:0 - R Offset (Z component)
384 unsigned offset_bits
= 0;
385 for (unsigned i
= 0; i
< offset
->type
->vector_elements
; i
++) {
386 const unsigned shift
= 4 * (2 - i
);
387 offset_bits
|= (offsets
[i
] << shift
) & (0xF << shift
);
393 brw_instruction_name(enum opcode op
)
397 if (op
< ARRAY_SIZE(opcode_descs
) && opcode_descs
[op
].name
)
398 return opcode_descs
[op
].name
;
401 case FS_OPCODE_FB_WRITE
:
404 case SHADER_OPCODE_RCP
:
406 case SHADER_OPCODE_RSQ
:
408 case SHADER_OPCODE_SQRT
:
410 case SHADER_OPCODE_EXP2
:
412 case SHADER_OPCODE_LOG2
:
414 case SHADER_OPCODE_POW
:
416 case SHADER_OPCODE_INT_QUOTIENT
:
418 case SHADER_OPCODE_INT_REMAINDER
:
420 case SHADER_OPCODE_SIN
:
422 case SHADER_OPCODE_COS
:
425 case SHADER_OPCODE_TEX
:
427 case SHADER_OPCODE_TXD
:
429 case SHADER_OPCODE_TXF
:
431 case SHADER_OPCODE_TXL
:
433 case SHADER_OPCODE_TXS
:
437 case SHADER_OPCODE_TXF_MS
:
445 case FS_OPCODE_PIXEL_X
:
447 case FS_OPCODE_PIXEL_Y
:
450 case FS_OPCODE_CINTERP
:
452 case FS_OPCODE_LINTERP
:
455 case FS_OPCODE_SPILL
:
457 case FS_OPCODE_UNSPILL
:
460 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD
:
461 return "uniform_pull_const";
462 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7
:
463 return "uniform_pull_const_gen7";
464 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD
:
465 return "varying_pull_const";
466 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7
:
467 return "varying_pull_const_gen7";
469 case FS_OPCODE_MOV_DISPATCH_TO_FLAGS
:
470 return "mov_dispatch_to_flags";
471 case FS_OPCODE_DISCARD_JUMP
:
472 return "discard_jump";
474 case FS_OPCODE_SET_SIMD4X2_OFFSET
:
475 return "set_simd4x2_offset";
477 case FS_OPCODE_PACK_HALF_2x16_SPLIT
:
478 return "pack_half_2x16_split";
479 case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X
:
480 return "unpack_half_2x16_split_x";
481 case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y
:
482 return "unpack_half_2x16_split_y";
484 case FS_OPCODE_PLACEHOLDER_HALT
:
485 return "placeholder_halt";
487 case VS_OPCODE_URB_WRITE
:
488 return "vs_urb_write";
489 case VS_OPCODE_SCRATCH_READ
:
490 return "scratch_read";
491 case VS_OPCODE_SCRATCH_WRITE
:
492 return "scratch_write";
493 case VS_OPCODE_PULL_CONSTANT_LOAD
:
494 return "pull_constant_load";
495 case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7
:
496 return "pull_constant_load_gen7";
497 case VS_OPCODE_UNPACK_FLAGS_SIMD4X2
:
498 return "unpack_flags_simd4x2";
500 case GS_OPCODE_URB_WRITE
:
501 return "gs_urb_write";
502 case GS_OPCODE_THREAD_END
:
503 return "gs_thread_end";
506 /* Yes, this leaks. It's in debug code, it should never occur, and if
507 * it does, you should just add the case to the list above.
509 asprintf(&fallback
, "op%d", op
);
515 backend_instruction::is_tex()
517 return (opcode
== SHADER_OPCODE_TEX
||
518 opcode
== FS_OPCODE_TXB
||
519 opcode
== SHADER_OPCODE_TXD
||
520 opcode
== SHADER_OPCODE_TXF
||
521 opcode
== SHADER_OPCODE_TXF_MS
||
522 opcode
== SHADER_OPCODE_TXL
||
523 opcode
== SHADER_OPCODE_TXS
||
524 opcode
== SHADER_OPCODE_LOD
);
528 backend_instruction::is_math()
530 return (opcode
== SHADER_OPCODE_RCP
||
531 opcode
== SHADER_OPCODE_RSQ
||
532 opcode
== SHADER_OPCODE_SQRT
||
533 opcode
== SHADER_OPCODE_EXP2
||
534 opcode
== SHADER_OPCODE_LOG2
||
535 opcode
== SHADER_OPCODE_SIN
||
536 opcode
== SHADER_OPCODE_COS
||
537 opcode
== SHADER_OPCODE_INT_QUOTIENT
||
538 opcode
== SHADER_OPCODE_INT_REMAINDER
||
539 opcode
== SHADER_OPCODE_POW
);
543 backend_instruction::is_control_flow()
547 case BRW_OPCODE_WHILE
:
549 case BRW_OPCODE_ELSE
:
550 case BRW_OPCODE_ENDIF
:
551 case BRW_OPCODE_BREAK
:
552 case BRW_OPCODE_CONTINUE
:
560 backend_visitor::dump_instructions()
563 foreach_list(node
, &this->instructions
) {
564 backend_instruction
*inst
= (backend_instruction
*)node
;
565 printf("%d: ", ip
++);
566 dump_instruction(inst
);