src/mesa/drivers/dri/i965/brw_shader.cpp

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 extern "C" {
  25 #include "main/macros.h"
  26 #include "brw_context.h"
  27 }
  28 #include "brw_vs.h"
  29 #include "brw_vec4_gs.h"
  30 #include "brw_fs.h"
  31 #include "glsl/ir_optimization.h"
  32 #include "glsl/glsl_parser_extras.h"
  33 #include "main/shaderapi.h"
  34
  35 struct gl_shader *
  36 brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type)
  37 {
  38    struct brw_shader *shader;
  39
  40    shader = rzalloc(NULL, struct brw_shader);
  41    if (shader) {
  42       shader->base.Type = type;
  43       shader->base.Stage = _mesa_shader_enum_to_shader_stage(type);
  44       shader->base.Name = name;
  45       _mesa_init_shader(ctx, &shader->base);
  46    }
  47
  48    return &shader->base;
  49 }
  50
  51 struct gl_shader_program *
  52 brw_new_shader_program(struct gl_context *ctx, GLuint name)
  53 {
  54    struct gl_shader_program *prog = rzalloc(NULL, struct gl_shader_program);
  55    if (prog) {
  56       prog->Name = name;
  57       _mesa_init_shader_program(ctx, prog);
  58    }
  59    return prog;
  60 }
  61
  62 /**
  63  * Performs a compile of the shader stages even when we don't know
  64  * what non-orthogonal state will be set, in the hope that it reflects
  65  * the eventual NOS used, and thus allows us to produce link failures.
  66  */
  67 static bool
  68 brw_shader_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
  69 {
  70    struct brw_context *brw = brw_context(ctx);
  71
  72    if (brw->precompile && !brw_fs_precompile(ctx, prog))
  73       return false;
  74
  75    if (brw->precompile && !brw_gs_precompile(ctx, prog))
  76       return false;
  77
  78    if (brw->precompile && !brw_vs_precompile(ctx, prog))
  79       return false;
  80
  81    return true;
  82 }
  83
  84 static void
  85 brw_lower_packing_builtins(struct brw_context *brw,
  86                            gl_shader_stage shader_type,
  87                            exec_list *ir)
  88 {
  89    int ops = LOWER_PACK_SNORM_2x16
  90            | LOWER_UNPACK_SNORM_2x16
  91            | LOWER_PACK_UNORM_2x16
  92            | LOWER_UNPACK_UNORM_2x16
  93            | LOWER_PACK_SNORM_4x8
  94            | LOWER_UNPACK_SNORM_4x8
  95            | LOWER_PACK_UNORM_4x8
  96            | LOWER_UNPACK_UNORM_4x8;
  97
  98    if (brw->gen >= 7) {
  99       /* Gen7 introduced the f32to16 and f16to32 instructions, which can be
 100        * used to execute packHalf2x16 and unpackHalf2x16. For AOS code, no
 101        * lowering is needed. For SOA code, the Half2x16 ops must be
 102        * scalarized.
 103        */
 104       if (shader_type == MESA_SHADER_FRAGMENT) {
 105          ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
 106              |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
 107       }
 108    } else {
 109       ops |= LOWER_PACK_HALF_2x16
 110           |  LOWER_UNPACK_HALF_2x16;
 111    }
 112
 113    lower_packing_builtins(ir, ops);
 114 }
 115
 116 GLboolean
 117 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 118 {
 119    struct brw_context *brw = brw_context(ctx);
 120    unsigned int stage;
 121
 122    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 123       struct brw_shader *shader =
 124          (struct brw_shader *)shProg->_LinkedShaders[stage];
 125
 126       if (!shader)
 127          continue;
 128
 129       struct gl_program *prog =
 130          ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
 131                                 shader->base.Name);
 132       if (!prog)
 133         return false;
 134       prog->Parameters = _mesa_new_parameter_list();
 135
 136       _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
 137
 138       bool progress;
 139
 140       /* lower_packing_builtins() inserts arithmetic instructions, so it
 141        * must precede lower_instructions().
 142        */
 143       brw_lower_packing_builtins(brw, (gl_shader_stage) stage, shader->base.ir);
 144       do_mat_op_to_vec(shader->base.ir);
 145       const int bitfield_insert = brw->gen >= 7
 146                                   ? BITFIELD_INSERT_TO_BFM_BFI
 147                                   : 0;
 148       lower_instructions(shader->base.ir,
 149                          MOD_TO_FRACT |
 150                          DIV_TO_MUL_RCP |
 151                          SUB_TO_ADD_NEG |
 152                          EXP_TO_EXP2 |
 153                          LOG_TO_LOG2 |
 154                          bitfield_insert |
 155                          LDEXP_TO_ARITH);
 156
 157       /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 158        * if-statements need to be flattened.
 159        */
 160       if (brw->gen < 6)
 161          lower_if_to_cond_assign(shader->base.ir, 16);
 162
 163       do_lower_texture_projection(shader->base.ir);
 164       brw_lower_texture_gradients(brw, shader->base.ir);
 165       do_vec_index_to_cond_assign(shader->base.ir);
 166       lower_vector_insert(shader->base.ir, true);
 167       brw_do_cubemap_normalize(shader->base.ir);
 168       lower_offset_arrays(shader->base.ir);
 169       brw_do_lower_unnormalized_offset(shader->base.ir);
 170       lower_noise(shader->base.ir);
 171       lower_quadop_vector(shader->base.ir, false);
 172
 173       bool input = true;
 174       bool output = stage == MESA_SHADER_FRAGMENT;
 175       bool temp = stage == MESA_SHADER_FRAGMENT;
 176       bool uniform = false;
 177
 178       bool lowered_variable_indexing =
 179          lower_variable_index_to_cond_assign(shader->base.ir,
 180                                              input, output, temp, uniform);
 181
 182       if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
 183          perf_debug("Unsupported form of variable indexing in FS; falling "
 184                     "back to very inefficient code generation\n");
 185       }
 186
 187       /* FINISHME: Do this before the variable index lowering. */
 188       lower_ubo_reference(&shader->base, shader->base.ir);
 189
 190       do {
 191          progress = false;
 192
 193          if (stage == MESA_SHADER_FRAGMENT) {
 194             brw_do_channel_expressions(shader->base.ir);
 195             brw_do_vector_splitting(shader->base.ir);
 196          }
 197
 198          progress = do_lower_jumps(shader->base.ir, true, true,
 199                                    true, /* main return */
 200                                    false, /* continue */
 201                                    false /* loops */
 202                                    ) || progress;
 203
 204          progress = do_common_optimization(shader->base.ir, true, true, 32,
 205                                            &ctx->ShaderCompilerOptions[stage])
 206            || progress;
 207       } while (progress);
 208
 209       /* Make a pass over the IR to add state references for any built-in
 210        * uniforms that are used.  This has to be done now (during linking).
 211        * Code generation doesn't happen until the first time this shader is
 212        * used for rendering.  Waiting until then to generate the parameters is
 213        * too late.  At that point, the values for the built-in uniforms won't
 214        * get sent to the shader.
 215        */
 216       foreach_list(node, shader->base.ir) {
 217          ir_variable *var = ((ir_instruction *) node)->as_variable();
 218
 219          if ((var == NULL) || (var->data.mode != ir_var_uniform)
 220              || (strncmp(var->name, "gl_", 3) != 0))
 221             continue;
 222
 223          const ir_state_slot *const slots = var->state_slots;
 224          assert(var->state_slots != NULL);
 225
 226          for (unsigned int i = 0; i < var->num_state_slots; i++) {
 227             _mesa_add_state_reference(prog->Parameters,
 228                                       (gl_state_index *) slots[i].tokens);
 229          }
 230       }
 231
 232       validate_ir_tree(shader->base.ir);
 233
 234       do_set_program_inouts(shader->base.ir, prog, shader->base.Stage);
 235
 236       prog->SamplersUsed = shader->base.active_samplers;
 237       _mesa_update_shader_textures_used(shProg, prog);
 238
 239       _mesa_reference_program(ctx, &shader->base.Program, prog);
 240
 241       brw_add_texrect_params(prog);
 242
 243       /* This has to be done last.  Any operation that can cause
 244        * prog->ParameterValues to get reallocated (e.g., anything that adds a
 245        * program constant) has to happen before creating this linkage.
 246        */
 247       _mesa_associate_uniform_storage(ctx, shProg, prog->Parameters);
 248
 249       _mesa_reference_program(ctx, &prog, NULL);
 250
 251       if (ctx->Shader.Flags & GLSL_DUMP) {
 252          fprintf(stderr, "\n");
 253          fprintf(stderr, "GLSL IR for linked %s program %d:\n",
 254                  _mesa_shader_stage_to_string(shader->base.Stage),
 255                  shProg->Name);
 256          _mesa_print_ir(stderr, shader->base.ir, NULL);
 257          fprintf(stderr, "\n");
 258       }
 259    }
 260
 261    if ((ctx->Shader.Flags & GLSL_DUMP) && shProg->Name != 0) {
 262       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 263          const struct gl_shader *sh = shProg->Shaders[i];
 264          if (!sh)
 265             continue;
 266
 267          fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
 268                  _mesa_shader_stage_to_string(sh->Stage),
 269                  i, shProg->Name);
 270          fprintf(stderr, "%s", sh->Source);
 271          fprintf(stderr, "\n");
 272       }
 273    }
 274
 275    if (!brw_shader_precompile(ctx, shProg))
 276       return false;
 277
 278    return true;
 279 }
 280
 281
 282 int
 283 brw_type_for_base_type(const struct glsl_type *type)
 284 {
 285    switch (type->base_type) {
 286    case GLSL_TYPE_FLOAT:
 287       return BRW_REGISTER_TYPE_F;
 288    case GLSL_TYPE_INT:
 289    case GLSL_TYPE_BOOL:
 290       return BRW_REGISTER_TYPE_D;
 291    case GLSL_TYPE_UINT:
 292       return BRW_REGISTER_TYPE_UD;
 293    case GLSL_TYPE_ARRAY:
 294       return brw_type_for_base_type(type->fields.array);
 295    case GLSL_TYPE_STRUCT:
 296    case GLSL_TYPE_SAMPLER:
 297    case GLSL_TYPE_ATOMIC_UINT:
 298       /* These should be overridden with the type of the member when
 299        * dereferenced into.  BRW_REGISTER_TYPE_UD seems like a likely
 300        * way to trip up if we don't.
 301        */
 302       return BRW_REGISTER_TYPE_UD;
 303    case GLSL_TYPE_IMAGE:
 304       return BRW_REGISTER_TYPE_UD;
 305    case GLSL_TYPE_VOID:
 306    case GLSL_TYPE_ERROR:
 307    case GLSL_TYPE_INTERFACE:
 308       assert(!"not reached");
 309       break;
 310    }
 311
 312    return BRW_REGISTER_TYPE_F;
 313 }
 314
 315 uint32_t
 316 brw_conditional_for_comparison(unsigned int op)
 317 {
 318    switch (op) {
 319    case ir_binop_less:
 320       return BRW_CONDITIONAL_L;
 321    case ir_binop_greater:
 322       return BRW_CONDITIONAL_G;
 323    case ir_binop_lequal:
 324       return BRW_CONDITIONAL_LE;
 325    case ir_binop_gequal:
 326       return BRW_CONDITIONAL_GE;
 327    case ir_binop_equal:
 328    case ir_binop_all_equal: /* same as equal for scalars */
 329       return BRW_CONDITIONAL_Z;
 330    case ir_binop_nequal:
 331    case ir_binop_any_nequal: /* same as nequal for scalars */
 332       return BRW_CONDITIONAL_NZ;
 333    default:
 334       assert(!"not reached: bad operation for comparison");
 335       return BRW_CONDITIONAL_NZ;
 336    }
 337 }
 338
 339 uint32_t
 340 brw_math_function(enum opcode op)
 341 {
 342    switch (op) {
 343    case SHADER_OPCODE_RCP:
 344       return BRW_MATH_FUNCTION_INV;
 345    case SHADER_OPCODE_RSQ:
 346       return BRW_MATH_FUNCTION_RSQ;
 347    case SHADER_OPCODE_SQRT:
 348       return BRW_MATH_FUNCTION_SQRT;
 349    case SHADER_OPCODE_EXP2:
 350       return BRW_MATH_FUNCTION_EXP;
 351    case SHADER_OPCODE_LOG2:
 352       return BRW_MATH_FUNCTION_LOG;
 353    case SHADER_OPCODE_POW:
 354       return BRW_MATH_FUNCTION_POW;
 355    case SHADER_OPCODE_SIN:
 356       return BRW_MATH_FUNCTION_SIN;
 357    case SHADER_OPCODE_COS:
 358       return BRW_MATH_FUNCTION_COS;
 359    case SHADER_OPCODE_INT_QUOTIENT:
 360       return BRW_MATH_FUNCTION_INT_DIV_QUOTIENT;
 361    case SHADER_OPCODE_INT_REMAINDER:
 362       return BRW_MATH_FUNCTION_INT_DIV_REMAINDER;
 363    default:
 364       assert(!"not reached: unknown math function");
 365       return 0;
 366    }
 367 }
 368
 369 uint32_t
 370 brw_texture_offset(struct gl_context *ctx, ir_constant *offset)
 371 {
 372    /* If the driver does not support GL_ARB_gpu_shader5, the offset
 373     * must be constant.
 374     */
 375    assert(offset != NULL || ctx->Extensions.ARB_gpu_shader5);
 376
 377    if (!offset) return 0;  /* nonconstant offset; caller will handle it. */
 378
 379    signed char offsets[3];
 380    for (unsigned i = 0; i < offset->type->vector_elements; i++)
 381       offsets[i] = (signed char) offset->value.i[i];
 382
 383    /* Combine all three offsets into a single unsigned dword:
 384     *
 385     *    bits 11:8 - U Offset (X component)
 386     *    bits  7:4 - V Offset (Y component)
 387     *    bits  3:0 - R Offset (Z component)
 388     */
 389    unsigned offset_bits = 0;
 390    for (unsigned i = 0; i < offset->type->vector_elements; i++) {
 391       const unsigned shift = 4 * (2 - i);
 392       offset_bits |= (offsets[i] << shift) & (0xF << shift);
 393    }
 394    return offset_bits;
 395 }
 396
 397 const char *
 398 brw_instruction_name(enum opcode op)
 399 {
 400    char *fallback;
 401
 402    if (op < ARRAY_SIZE(opcode_descs) && opcode_descs[op].name)
 403       return opcode_descs[op].name;
 404
 405    switch (op) {
 406    case FS_OPCODE_FB_WRITE:
 407       return "fb_write";
 408    case FS_OPCODE_BLORP_FB_WRITE:
 409       return "blorp_fb_write";
 410
 411    case SHADER_OPCODE_RCP:
 412       return "rcp";
 413    case SHADER_OPCODE_RSQ:
 414       return "rsq";
 415    case SHADER_OPCODE_SQRT:
 416       return "sqrt";
 417    case SHADER_OPCODE_EXP2:
 418       return "exp2";
 419    case SHADER_OPCODE_LOG2:
 420       return "log2";
 421    case SHADER_OPCODE_POW:
 422       return "pow";
 423    case SHADER_OPCODE_INT_QUOTIENT:
 424       return "int_quot";
 425    case SHADER_OPCODE_INT_REMAINDER:
 426       return "int_rem";
 427    case SHADER_OPCODE_SIN:
 428       return "sin";
 429    case SHADER_OPCODE_COS:
 430       return "cos";
 431
 432    case SHADER_OPCODE_TEX:
 433       return "tex";
 434    case SHADER_OPCODE_TXD:
 435       return "txd";
 436    case SHADER_OPCODE_TXF:
 437       return "txf";
 438    case SHADER_OPCODE_TXL:
 439       return "txl";
 440    case SHADER_OPCODE_TXS:
 441       return "txs";
 442    case FS_OPCODE_TXB:
 443       return "txb";
 444    case SHADER_OPCODE_TXF_CMS:
 445       return "txf_cms";
 446    case SHADER_OPCODE_TXF_UMS:
 447       return "txf_ums";
 448    case SHADER_OPCODE_TXF_MCS:
 449       return "txf_mcs";
 450    case SHADER_OPCODE_TG4:
 451       return "tg4";
 452    case SHADER_OPCODE_TG4_OFFSET:
 453       return "tg4_offset";
 454
 455    case SHADER_OPCODE_GEN4_SCRATCH_READ:
 456       return "gen4_scratch_read";
 457    case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
 458       return "gen4_scratch_write";
 459    case SHADER_OPCODE_GEN7_SCRATCH_READ:
 460       return "gen7_scratch_read";
 461
 462    case FS_OPCODE_DDX:
 463       return "ddx";
 464    case FS_OPCODE_DDY:
 465       return "ddy";
 466
 467    case FS_OPCODE_PIXEL_X:
 468       return "pixel_x";
 469    case FS_OPCODE_PIXEL_Y:
 470       return "pixel_y";
 471
 472    case FS_OPCODE_CINTERP:
 473       return "cinterp";
 474    case FS_OPCODE_LINTERP:
 475       return "linterp";
 476
 477    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
 478       return "uniform_pull_const";
 479    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7:
 480       return "uniform_pull_const_gen7";
 481    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
 482       return "varying_pull_const";
 483    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
 484       return "varying_pull_const_gen7";
 485
 486    case FS_OPCODE_MOV_DISPATCH_TO_FLAGS:
 487       return "mov_dispatch_to_flags";
 488    case FS_OPCODE_DISCARD_JUMP:
 489       return "discard_jump";
 490
 491    case FS_OPCODE_SET_SIMD4X2_OFFSET:
 492       return "set_simd4x2_offset";
 493
 494    case FS_OPCODE_PACK_HALF_2x16_SPLIT:
 495       return "pack_half_2x16_split";
 496    case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X:
 497       return "unpack_half_2x16_split_x";
 498    case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y:
 499       return "unpack_half_2x16_split_y";
 500
 501    case FS_OPCODE_PLACEHOLDER_HALT:
 502       return "placeholder_halt";
 503
 504    case VS_OPCODE_URB_WRITE:
 505       return "vs_urb_write";
 506    case VS_OPCODE_PULL_CONSTANT_LOAD:
 507       return "pull_constant_load";
 508    case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
 509       return "pull_constant_load_gen7";
 510    case VS_OPCODE_UNPACK_FLAGS_SIMD4X2:
 511       return "unpack_flags_simd4x2";
 512
 513    case GS_OPCODE_URB_WRITE:
 514       return "gs_urb_write";
 515    case GS_OPCODE_THREAD_END:
 516       return "gs_thread_end";
 517    case GS_OPCODE_SET_WRITE_OFFSET:
 518       return "set_write_offset";
 519    case GS_OPCODE_SET_VERTEX_COUNT:
 520       return "set_vertex_count";
 521    case GS_OPCODE_SET_DWORD_2_IMMED:
 522       return "set_dword_2_immed";
 523    case GS_OPCODE_PREPARE_CHANNEL_MASKS:
 524       return "prepare_channel_masks";
 525    case GS_OPCODE_SET_CHANNEL_MASKS:
 526       return "set_channel_masks";
 527    case GS_OPCODE_GET_INSTANCE_ID:
 528       return "get_instance_id";
 529
 530    default:
 531       /* Yes, this leaks.  It's in debug code, it should never occur, and if
 532        * it does, you should just add the case to the list above.
 533        */
 534       asprintf(&fallback, "op%d", op);
 535       return fallback;
 536    }
 537 }
 538
 539 bool
 540 backend_instruction::is_tex()
 541 {
 542    return (opcode == SHADER_OPCODE_TEX ||
 543            opcode == FS_OPCODE_TXB ||
 544            opcode == SHADER_OPCODE_TXD ||
 545            opcode == SHADER_OPCODE_TXF ||
 546            opcode == SHADER_OPCODE_TXF_CMS ||
 547            opcode == SHADER_OPCODE_TXF_UMS ||
 548            opcode == SHADER_OPCODE_TXF_MCS ||
 549            opcode == SHADER_OPCODE_TXL ||
 550            opcode == SHADER_OPCODE_TXS ||
 551            opcode == SHADER_OPCODE_LOD ||
 552            opcode == SHADER_OPCODE_TG4 ||
 553            opcode == SHADER_OPCODE_TG4_OFFSET);
 554 }
 555
 556 bool
 557 backend_instruction::is_math()
 558 {
 559    return (opcode == SHADER_OPCODE_RCP ||
 560            opcode == SHADER_OPCODE_RSQ ||
 561            opcode == SHADER_OPCODE_SQRT ||
 562            opcode == SHADER_OPCODE_EXP2 ||
 563            opcode == SHADER_OPCODE_LOG2 ||
 564            opcode == SHADER_OPCODE_SIN ||
 565            opcode == SHADER_OPCODE_COS ||
 566            opcode == SHADER_OPCODE_INT_QUOTIENT ||
 567            opcode == SHADER_OPCODE_INT_REMAINDER ||
 568            opcode == SHADER_OPCODE_POW);
 569 }
 570
 571 bool
 572 backend_instruction::is_control_flow()
 573 {
 574    switch (opcode) {
 575    case BRW_OPCODE_DO:
 576    case BRW_OPCODE_WHILE:
 577    case BRW_OPCODE_IF:
 578    case BRW_OPCODE_ELSE:
 579    case BRW_OPCODE_ENDIF:
 580    case BRW_OPCODE_BREAK:
 581    case BRW_OPCODE_CONTINUE:
 582       return true;
 583    default:
 584       return false;
 585    }
 586 }
 587
 588 bool
 589 backend_instruction::can_do_source_mods()
 590 {
 591    switch (opcode) {
 592    case BRW_OPCODE_ADDC:
 593    case BRW_OPCODE_BFE:
 594    case BRW_OPCODE_BFI1:
 595    case BRW_OPCODE_BFI2:
 596    case BRW_OPCODE_BFREV:
 597    case BRW_OPCODE_CBIT:
 598    case BRW_OPCODE_FBH:
 599    case BRW_OPCODE_FBL:
 600    case BRW_OPCODE_SUBB:
 601       return false;
 602    default:
 603       return true;
 604    }
 605 }
 606
 607 bool
 608 backend_instruction::can_do_saturate()
 609 {
 610    switch (opcode) {
 611    case BRW_OPCODE_ADD:
 612    case BRW_OPCODE_ASR:
 613    case BRW_OPCODE_AVG:
 614    case BRW_OPCODE_DP2:
 615    case BRW_OPCODE_DP3:
 616    case BRW_OPCODE_DP4:
 617    case BRW_OPCODE_DPH:
 618    case BRW_OPCODE_F16TO32:
 619    case BRW_OPCODE_F32TO16:
 620    case BRW_OPCODE_LINE:
 621    case BRW_OPCODE_LRP:
 622    case BRW_OPCODE_MAC:
 623    case BRW_OPCODE_MACH:
 624    case BRW_OPCODE_MAD:
 625    case BRW_OPCODE_MATH:
 626    case BRW_OPCODE_MOV:
 627    case BRW_OPCODE_MUL:
 628    case BRW_OPCODE_PLN:
 629    case BRW_OPCODE_RNDD:
 630    case BRW_OPCODE_RNDE:
 631    case BRW_OPCODE_RNDU:
 632    case BRW_OPCODE_RNDZ:
 633    case BRW_OPCODE_SEL:
 634    case BRW_OPCODE_SHL:
 635    case BRW_OPCODE_SHR:
 636    case FS_OPCODE_LINTERP:
 637    case SHADER_OPCODE_COS:
 638    case SHADER_OPCODE_EXP2:
 639    case SHADER_OPCODE_LOG2:
 640    case SHADER_OPCODE_POW:
 641    case SHADER_OPCODE_RCP:
 642    case SHADER_OPCODE_RSQ:
 643    case SHADER_OPCODE_SIN:
 644    case SHADER_OPCODE_SQRT:
 645       return true;
 646    default:
 647       return false;
 648    }
 649 }
 650
 651 bool
 652 backend_instruction::has_side_effects() const
 653 {
 654    switch (opcode) {
 655    case SHADER_OPCODE_UNTYPED_ATOMIC:
 656       return true;
 657    default:
 658       return false;
 659    }
 660 }
 661
 662 void
 663 backend_visitor::dump_instructions()
 664 {
 665    int ip = 0;
 666    foreach_list(node, &this->instructions) {
 667       backend_instruction *inst = (backend_instruction *)node;
 668       fprintf(stderr, "%d: ", ip++);
 669       dump_instruction(inst);
 670    }
 671 }
 672
 673
 674 /**
 675  * Sets up the starting offsets for the groups of binding table entries
 676  * commong to all pipeline stages.
 677  *
 678  * Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
 679  * unused but also make sure that addition of small offsets to them will
 680  * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
 681  */
 682 void
 683 backend_visitor::assign_common_binding_table_offsets(uint32_t next_binding_table_offset)
 684 {
 685    int num_textures = _mesa_fls(prog->SamplersUsed);
 686
 687    stage_prog_data->binding_table.texture_start = next_binding_table_offset;
 688    next_binding_table_offset += num_textures;
 689
 690    if (shader) {
 691       stage_prog_data->binding_table.ubo_start = next_binding_table_offset;
 692       next_binding_table_offset += shader->base.NumUniformBlocks;
 693    } else {
 694       stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0;
 695    }
 696
 697    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
 698       stage_prog_data->binding_table.shader_time_start = next_binding_table_offset;
 699       next_binding_table_offset++;
 700    } else {
 701       stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0;
 702    }
 703
 704    if (prog->UsesGather) {
 705       stage_prog_data->binding_table.gather_texture_start = next_binding_table_offset;
 706       next_binding_table_offset += num_textures;
 707    } else {
 708       stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0;
 709    }
 710
 711    if (shader_prog && shader_prog->NumAtomicBuffers) {
 712       stage_prog_data->binding_table.abo_start = next_binding_table_offset;
 713       next_binding_table_offset += shader_prog->NumAtomicBuffers;
 714    } else {
 715       stage_prog_data->binding_table.abo_start = 0xd0d0d0d0;
 716    }
 717
 718    /* This may or may not be used depending on how the compile goes. */
 719    stage_prog_data->binding_table.pull_constants_start = next_binding_table_offset;
 720    next_binding_table_offset++;
 721
 722    assert(next_binding_table_offset <= BRW_MAX_SURFACES);
 723
 724    /* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */
 725 }