src/mesa/drivers/dri/i965/brw_shader.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27 #include "brw_reg.h"
  28 #include "brw_defines.h"
  29 #include "brw_context.h"
  30 #include "compiler/nir/nir.h"
  31
  32 #ifdef __cplusplus
  33 #include "brw_ir_allocator.h"
  34 #endif
  35
  36 #define MAX_SAMPLER_MESSAGE_SIZE 11
  37 #define MAX_VGRF_SIZE 16
  38
  39 #ifdef __cplusplus
  40 struct backend_reg : private brw_reg
  41 {
  42    backend_reg() {}
  43    backend_reg(const struct brw_reg &reg) : brw_reg(reg) {}
  44
  45    const brw_reg &as_brw_reg() const
  46    {
  47       assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM);
  48       assert(offset == 0);
  49       return static_cast<const brw_reg &>(*this);
  50    }
  51
  52    brw_reg &as_brw_reg()
  53    {
  54       assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM);
  55       assert(offset == 0);
  56       return static_cast<brw_reg &>(*this);
  57    }
  58
  59    bool equals(const backend_reg &r) const;
  60
  61    bool is_zero() const;
  62    bool is_one() const;
  63    bool is_negative_one() const;
  64    bool is_null() const;
  65    bool is_accumulator() const;
  66
  67    /** Offset from the start of the (virtual) register in bytes. */
  68    uint16_t offset;
  69
  70    using brw_reg::type;
  71    using brw_reg::file;
  72    using brw_reg::negate;
  73    using brw_reg::abs;
  74    using brw_reg::address_mode;
  75    using brw_reg::subnr;
  76    using brw_reg::nr;
  77
  78    using brw_reg::swizzle;
  79    using brw_reg::writemask;
  80    using brw_reg::indirect_offset;
  81    using brw_reg::vstride;
  82    using brw_reg::width;
  83    using brw_reg::hstride;
  84
  85    using brw_reg::df;
  86    using brw_reg::f;
  87    using brw_reg::d;
  88    using brw_reg::ud;
  89 };
  90 #endif
  91
  92 struct cfg_t;
  93 struct bblock_t;
  94
  95 #ifdef __cplusplus
  96 struct backend_instruction : public exec_node {
  97    bool is_3src(const struct gen_device_info *devinfo) const;
  98    bool is_tex() const;
  99    bool is_math() const;
 100    bool is_control_flow() const;
 101    bool is_commutative() const;
 102    bool can_do_source_mods() const;
 103    bool can_do_saturate() const;
 104    bool can_do_cmod() const;
 105    bool reads_accumulator_implicitly() const;
 106    bool writes_accumulator_implicitly(const struct gen_device_info *devinfo) const;
 107
 108    void remove(bblock_t *block);
 109    void insert_after(bblock_t *block, backend_instruction *inst);
 110    void insert_before(bblock_t *block, backend_instruction *inst);
 111    void insert_before(bblock_t *block, exec_list *list);
 112
 113    /**
 114     * True if the instruction has side effects other than writing to
 115     * its destination registers.  You are expected not to reorder or
 116     * optimize these out unless you know what you are doing.
 117     */
 118    bool has_side_effects() const;
 119
 120    /**
 121     * True if the instruction might be affected by side effects of other
 122     * instructions.
 123     */
 124    bool is_volatile() const;
 125 #else
 126 struct backend_instruction {
 127    struct exec_node link;
 128 #endif
 129    /** @{
 130     * Annotation for the generated IR.  One of the two can be set.
 131     */
 132    const void *ir;
 133    const char *annotation;
 134    /** @} */
 135
 136    uint32_t offset; /**< spill/unspill offset or texture offset bitfield */
 137    uint8_t mlen; /**< SEND message length */
 138    int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 139    uint8_t target; /**< MRT target. */
 140    unsigned size_written; /**< Data written to the destination register in bytes. */
 141
 142    enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
 143    enum brw_conditional_mod conditional_mod; /**< BRW_CONDITIONAL_* */
 144    enum brw_predicate predicate;
 145    bool predicate_inverse:1;
 146    bool writes_accumulator:1; /**< instruction implicitly writes accumulator */
 147    bool force_writemask_all:1;
 148    bool no_dd_clear:1;
 149    bool no_dd_check:1;
 150    bool saturate:1;
 151    bool shadow_compare:1;
 152
 153    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 154     * mod and predication.
 155     */
 156    unsigned flag_subreg:1;
 157
 158    /** The number of hardware registers used for a message header. */
 159    uint8_t header_size;
 160 };
 161
 162 #ifdef __cplusplus
 163
 164 enum instruction_scheduler_mode {
 165    SCHEDULE_PRE,
 166    SCHEDULE_PRE_NON_LIFO,
 167    SCHEDULE_PRE_LIFO,
 168    SCHEDULE_POST,
 169 };
 170
 171 struct backend_shader {
 172 protected:
 173
 174    backend_shader(const struct brw_compiler *compiler,
 175                   void *log_data,
 176                   void *mem_ctx,
 177                   const nir_shader *shader,
 178                   struct brw_stage_prog_data *stage_prog_data);
 179
 180 public:
 181
 182    const struct brw_compiler *compiler;
 183    void *log_data; /* Passed to compiler->*_log functions */
 184
 185    const struct gen_device_info * const devinfo;
 186    const nir_shader *nir;
 187    struct brw_stage_prog_data * const stage_prog_data;
 188
 189    /** ralloc context for temporary data used during compile */
 190    void *mem_ctx;
 191
 192    /**
 193     * List of either fs_inst or vec4_instruction (inheriting from
 194     * backend_instruction)
 195     */
 196    exec_list instructions;
 197
 198    cfg_t *cfg;
 199
 200    gl_shader_stage stage;
 201    bool debug_enabled;
 202    const char *stage_name;
 203    const char *stage_abbrev;
 204    bool is_passthrough_shader;
 205
 206    brw::simple_allocator alloc;
 207
 208    virtual void dump_instruction(backend_instruction *inst) = 0;
 209    virtual void dump_instruction(backend_instruction *inst, FILE *file) = 0;
 210    virtual void dump_instructions();
 211    virtual void dump_instructions(const char *name);
 212
 213    void calculate_cfg();
 214
 215    virtual void invalidate_live_intervals() = 0;
 216 };
 217
 218 uint32_t brw_texture_offset(int *offsets, unsigned num_components);
 219
 220 void brw_setup_image_uniform_values(gl_shader_stage stage,
 221                                     struct brw_stage_prog_data *stage_prog_data,
 222                                     unsigned param_start_index,
 223                                     const gl_uniform_storage *storage);
 224
 225 #else
 226 struct backend_shader;
 227 #endif /* __cplusplus */
 228
 229 enum brw_reg_type brw_type_for_base_type(const struct glsl_type *type);
 230 enum brw_conditional_mod brw_conditional_for_comparison(unsigned int op);
 231 uint32_t brw_math_function(enum opcode op);
 232 const char *brw_instruction_name(const struct gen_device_info *devinfo,
 233                                  enum opcode op);
 234 bool brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg);
 235 bool brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg);
 236 bool brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg);
 237
 238 bool opt_predicated_break(struct backend_shader *s);
 239
 240 #ifdef __cplusplus
 241 extern "C" {
 242 #endif
 243
 244 /**
 245  * Scratch data used when compiling a GLSL geometry shader.
 246  */
 247 struct brw_gs_compile
 248 {
 249    struct brw_gs_prog_key key;
 250    struct brw_vue_map input_vue_map;
 251
 252    unsigned control_data_bits_per_vertex;
 253    unsigned control_data_header_size_bits;
 254 };
 255
 256 uint32_t
 257 brw_assign_common_binding_table_offsets(gl_shader_stage stage,
 258                                         const struct gen_device_info *devinfo,
 259                                         const struct gl_shader_program *shader_prog,
 260                                         const struct gl_program *prog,
 261                                         struct brw_stage_prog_data *stage_prog_data,
 262                                         uint32_t next_binding_table_offset);
 263
 264 bool brw_vs_precompile(struct gl_context *ctx,
 265                        struct gl_shader_program *shader_prog,
 266                        struct gl_program *prog);
 267 bool brw_tcs_precompile(struct gl_context *ctx,
 268                         struct gl_shader_program *shader_prog,
 269                         struct gl_program *prog);
 270 bool brw_tes_precompile(struct gl_context *ctx,
 271                         struct gl_shader_program *shader_prog,
 272                         struct gl_program *prog);
 273 bool brw_gs_precompile(struct gl_context *ctx,
 274                        struct gl_shader_program *shader_prog,
 275                        struct gl_program *prog);
 276 bool brw_fs_precompile(struct gl_context *ctx,
 277                        struct gl_shader_program *shader_prog,
 278                        struct gl_program *prog);
 279 bool brw_cs_precompile(struct gl_context *ctx,
 280                        struct gl_shader_program *shader_prog,
 281                        struct gl_program *prog);
 282
 283 GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog);
 284 struct gl_linked_shader *brw_new_shader(gl_shader_stage stage);
 285
 286 unsigned tesslevel_outer_components(GLenum tes_primitive_mode);
 287 unsigned tesslevel_inner_components(GLenum tes_primitive_mode);
 288 unsigned writemask_for_backwards_vector(unsigned mask);
 289
 290 unsigned get_atomic_counter_op(nir_intrinsic_op op);
 291
 292 #ifdef __cplusplus
 293 }
 294 #endif