i965/vec4: Add a test for copy propagation behavior.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_shader.h
1 /*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdint.h>
25 #include "brw_defines.h"
26 #include "main/compiler.h"
27 #include "glsl/ir.h"
28
29 #pragma once
30
31 enum PACKED register_file {
32 BAD_FILE,
33 GRF,
34 MRF,
35 IMM,
36 HW_REG, /* a struct brw_reg */
37 ATTR,
38 UNIFORM, /* prog_data->params[reg] */
39 };
40
41 #ifdef __cplusplus
42
43 class backend_instruction : public exec_node {
44 public:
45 bool is_tex() const;
46 bool is_math() const;
47 bool is_control_flow() const;
48 bool can_do_source_mods() const;
49 bool can_do_saturate() const;
50
51 /**
52 * True if the instruction has side effects other than writing to
53 * its destination registers. You are expected not to reorder or
54 * optimize these out unless you know what you are doing.
55 */
56 bool has_side_effects() const;
57
58 enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
59
60 uint8_t predicate;
61 bool predicate_inverse;
62 };
63
64 enum instruction_scheduler_mode {
65 SCHEDULE_PRE,
66 SCHEDULE_PRE_NON_LIFO,
67 SCHEDULE_PRE_LIFO,
68 SCHEDULE_POST,
69 };
70
71 class backend_visitor : public ir_visitor {
72 protected:
73
74 backend_visitor(struct brw_context *brw,
75 struct gl_shader_program *shader_prog,
76 struct gl_program *prog,
77 struct brw_stage_prog_data *stage_prog_data,
78 gl_shader_stage stage);
79
80 public:
81
82 struct brw_context * const brw;
83 struct gl_context * const ctx;
84 struct brw_shader * const shader;
85 struct gl_shader_program * const shader_prog;
86 struct gl_program * const prog;
87 struct brw_stage_prog_data * const stage_prog_data;
88
89 /** ralloc context for temporary data used during compile */
90 void *mem_ctx;
91
92 /**
93 * List of either fs_inst or vec4_instruction (inheriting from
94 * backend_instruction)
95 */
96 exec_list instructions;
97
98 virtual void dump_instruction(backend_instruction *inst) = 0;
99 virtual void dump_instructions();
100
101 void assign_common_binding_table_offsets(uint32_t next_binding_table_offset);
102
103 virtual void invalidate_live_intervals() = 0;
104 };
105
106 uint32_t brw_texture_offset(struct gl_context *ctx, ir_constant *offset);
107
108 #endif /* __cplusplus */
109
110 int brw_type_for_base_type(const struct glsl_type *type);
111 uint32_t brw_conditional_for_comparison(unsigned int op);
112 uint32_t brw_math_function(enum opcode op);
113 const char *brw_instruction_name(enum opcode op);