src/mesa/drivers/dri/i965/brw_shader.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <stdint.h>
  25 #include "brw_reg.h"
  26 #include "brw_defines.h"
  27 #include "brw_context.h"
  28 #include "main/compiler.h"
  29 #include "glsl/ir.h"
  30 #include "program/prog_parameter.h"
  31
  32 #ifdef __cplusplus
  33 #include "brw_ir_allocator.h"
  34 #endif
  35
  36 #pragma once
  37
  38 #define MAX_SAMPLER_MESSAGE_SIZE 11
  39 #define MAX_VGRF_SIZE 16
  40
  41 #ifdef __cplusplus
  42 struct backend_reg : private brw_reg
  43 {
  44    backend_reg() {}
  45    backend_reg(const struct brw_reg &reg) : brw_reg(reg) {}
  46
  47    const brw_reg &as_brw_reg() const
  48    {
  49       assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM);
  50       assert(reg_offset == 0);
  51       return static_cast<const brw_reg &>(*this);
  52    }
  53
  54    brw_reg &as_brw_reg()
  55    {
  56       assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM);
  57       assert(reg_offset == 0);
  58       return static_cast<brw_reg &>(*this);
  59    }
  60
  61    bool equals(const backend_reg &r) const;
  62
  63    bool is_zero() const;
  64    bool is_one() const;
  65    bool is_negative_one() const;
  66    bool is_null() const;
  67    bool is_accumulator() const;
  68    bool in_range(const backend_reg &r, unsigned n) const;
  69
  70    /**
  71     * Offset within the virtual register.
  72     *
  73     * In the scalar backend, this is in units of a float per pixel for pre-
  74     * register allocation registers (i.e., one register in SIMD8 mode and two
  75     * registers in SIMD16 mode).
  76     *
  77     * For uniforms, this is in units of 1 float.
  78     */
  79    uint16_t reg_offset;
  80
  81    using brw_reg::type;
  82    using brw_reg::file;
  83    using brw_reg::negate;
  84    using brw_reg::abs;
  85    using brw_reg::address_mode;
  86    using brw_reg::subnr;
  87    using brw_reg::nr;
  88
  89    using brw_reg::swizzle;
  90    using brw_reg::writemask;
  91    using brw_reg::indirect_offset;
  92    using brw_reg::vstride;
  93    using brw_reg::width;
  94    using brw_reg::hstride;
  95
  96    using brw_reg::f;
  97    using brw_reg::d;
  98    using brw_reg::ud;
  99 };
 100 #endif
 101
 102 struct cfg_t;
 103 struct bblock_t;
 104
 105 #ifdef __cplusplus
 106 struct backend_instruction : public exec_node {
 107    bool is_3src() const;
 108    bool is_tex() const;
 109    bool is_math() const;
 110    bool is_control_flow() const;
 111    bool is_commutative() const;
 112    bool can_do_source_mods() const;
 113    bool can_do_saturate() const;
 114    bool can_do_cmod() const;
 115    bool reads_accumulator_implicitly() const;
 116    bool writes_accumulator_implicitly(const struct brw_device_info *devinfo) const;
 117
 118    void remove(bblock_t *block);
 119    void insert_after(bblock_t *block, backend_instruction *inst);
 120    void insert_before(bblock_t *block, backend_instruction *inst);
 121    void insert_before(bblock_t *block, exec_list *list);
 122
 123    /**
 124     * True if the instruction has side effects other than writing to
 125     * its destination registers.  You are expected not to reorder or
 126     * optimize these out unless you know what you are doing.
 127     */
 128    bool has_side_effects() const;
 129
 130    /**
 131     * True if the instruction might be affected by side effects of other
 132     * instructions.
 133     */
 134    bool is_volatile() const;
 135 #else
 136 struct backend_instruction {
 137    struct exec_node link;
 138 #endif
 139    /** @{
 140     * Annotation for the generated IR.  One of the two can be set.
 141     */
 142    const void *ir;
 143    const char *annotation;
 144    /** @} */
 145
 146    uint32_t offset; /**< spill/unspill offset or texture offset bitfield */
 147    uint8_t mlen; /**< SEND message length */
 148    int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 149    uint8_t target; /**< MRT target. */
 150    uint8_t regs_written; /**< Number of registers written by the instruction. */
 151
 152    enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
 153    enum brw_conditional_mod conditional_mod; /**< BRW_CONDITIONAL_* */
 154    enum brw_predicate predicate;
 155    bool predicate_inverse:1;
 156    bool writes_accumulator:1; /**< instruction implicitly writes accumulator */
 157    bool force_writemask_all:1;
 158    bool no_dd_clear:1;
 159    bool no_dd_check:1;
 160    bool saturate:1;
 161    bool shadow_compare:1;
 162
 163    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 164     * mod and predication.
 165     */
 166    unsigned flag_subreg:1;
 167
 168    /** The number of hardware registers used for a message header. */
 169    uint8_t header_size;
 170 };
 171
 172 #ifdef __cplusplus
 173
 174 enum instruction_scheduler_mode {
 175    SCHEDULE_PRE,
 176    SCHEDULE_PRE_NON_LIFO,
 177    SCHEDULE_PRE_LIFO,
 178    SCHEDULE_POST,
 179 };
 180
 181 struct backend_shader {
 182 protected:
 183
 184    backend_shader(const struct brw_compiler *compiler,
 185                   void *log_data,
 186                   void *mem_ctx,
 187                   const nir_shader *shader,
 188                   struct brw_stage_prog_data *stage_prog_data);
 189
 190 public:
 191
 192    const struct brw_compiler *compiler;
 193    void *log_data; /* Passed to compiler->*_log functions */
 194
 195    const struct brw_device_info * const devinfo;
 196    const nir_shader *nir;
 197    struct brw_stage_prog_data * const stage_prog_data;
 198
 199    /** ralloc context for temporary data used during compile */
 200    void *mem_ctx;
 201
 202    /**
 203     * List of either fs_inst or vec4_instruction (inheriting from
 204     * backend_instruction)
 205     */
 206    exec_list instructions;
 207
 208    cfg_t *cfg;
 209
 210    gl_shader_stage stage;
 211    bool debug_enabled;
 212    const char *stage_name;
 213    const char *stage_abbrev;
 214
 215    brw::simple_allocator alloc;
 216
 217    virtual void dump_instruction(backend_instruction *inst) = 0;
 218    virtual void dump_instruction(backend_instruction *inst, FILE *file) = 0;
 219    virtual void dump_instructions();
 220    virtual void dump_instructions(const char *name);
 221
 222    void calculate_cfg();
 223    void invalidate_cfg();
 224
 225    virtual void invalidate_live_intervals() = 0;
 226 };
 227
 228 uint32_t brw_texture_offset(int *offsets, unsigned num_components);
 229
 230 void brw_setup_image_uniform_values(gl_shader_stage stage,
 231                                     struct brw_stage_prog_data *stage_prog_data,
 232                                     unsigned param_start_index,
 233                                     const gl_uniform_storage *storage);
 234
 235 #else
 236 struct backend_shader;
 237 #endif /* __cplusplus */
 238
 239 enum brw_reg_type brw_type_for_base_type(const struct glsl_type *type);
 240 enum brw_conditional_mod brw_conditional_for_comparison(unsigned int op);
 241 uint32_t brw_math_function(enum opcode op);
 242 const char *brw_instruction_name(enum opcode op);
 243 bool brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg);
 244 bool brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg);
 245 bool brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg);
 246
 247 bool opt_predicated_break(struct backend_shader *s);
 248
 249 #ifdef __cplusplus
 250 extern "C" {
 251 #endif
 252
 253 /**
 254  * Scratch data used when compiling a GLSL geometry shader.
 255  */
 256 struct brw_gs_compile
 257 {
 258    struct brw_gs_prog_key key;
 259    struct brw_vue_map input_vue_map;
 260
 261    unsigned control_data_bits_per_vertex;
 262    unsigned control_data_header_size_bits;
 263 };
 264
 265 struct brw_compiler *
 266 brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo);
 267
 268 void
 269 brw_assign_common_binding_table_offsets(gl_shader_stage stage,
 270                                         const struct brw_device_info *devinfo,
 271                                         const struct gl_shader_program *shader_prog,
 272                                         const struct gl_program *prog,
 273                                         struct brw_stage_prog_data *stage_prog_data,
 274                                         uint32_t next_binding_table_offset);
 275
 276 bool brw_vs_precompile(struct gl_context *ctx,
 277                        struct gl_shader_program *shader_prog,
 278                        struct gl_program *prog);
 279 bool brw_gs_precompile(struct gl_context *ctx,
 280                        struct gl_shader_program *shader_prog,
 281                        struct gl_program *prog);
 282 bool brw_fs_precompile(struct gl_context *ctx,
 283                        struct gl_shader_program *shader_prog,
 284                        struct gl_program *prog);
 285 bool brw_cs_precompile(struct gl_context *ctx,
 286                        struct gl_shader_program *shader_prog,
 287                        struct gl_program *prog);
 288
 289 GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog);
 290 struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type);
 291
 292 int type_size_scalar(const struct glsl_type *type);
 293 int type_size_vec4(const struct glsl_type *type);
 294 int type_size_vec4_times_4(const struct glsl_type *type);
 295
 296 #ifdef __cplusplus
 297 }
 298 #endif