src/mesa/drivers/dri/i965/brw_state.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_STATE_H
  34 #define BRW_STATE_H
  35
  36 #include "brw_context.h"
  37
  38 #ifdef __cplusplus
  39 extern "C" {
  40 #endif
  41
  42 enum intel_msaa_layout;
  43
  44 extern const struct brw_tracked_state brw_blend_constant_color;
  45 extern const struct brw_tracked_state brw_clip_unit;
  46 extern const struct brw_tracked_state brw_vs_pull_constants;
  47 extern const struct brw_tracked_state brw_tcs_pull_constants;
  48 extern const struct brw_tracked_state brw_tes_pull_constants;
  49 extern const struct brw_tracked_state brw_gs_pull_constants;
  50 extern const struct brw_tracked_state brw_wm_pull_constants;
  51 extern const struct brw_tracked_state brw_cs_pull_constants;
  52 extern const struct brw_tracked_state brw_constant_buffer;
  53 extern const struct brw_tracked_state brw_curbe_offsets;
  54 extern const struct brw_tracked_state brw_binding_table_pointers;
  55 extern const struct brw_tracked_state brw_depthbuffer;
  56 extern const struct brw_tracked_state brw_recalculate_urb_fence;
  57 extern const struct brw_tracked_state brw_sf_vp;
  58 extern const struct brw_tracked_state brw_cs_texture_surfaces;
  59 extern const struct brw_tracked_state brw_vs_ubo_surfaces;
  60 extern const struct brw_tracked_state brw_vs_image_surfaces;
  61 extern const struct brw_tracked_state brw_tcs_ubo_surfaces;
  62 extern const struct brw_tracked_state brw_tcs_image_surfaces;
  63 extern const struct brw_tracked_state brw_tes_ubo_surfaces;
  64 extern const struct brw_tracked_state brw_tes_image_surfaces;
  65 extern const struct brw_tracked_state brw_gs_ubo_surfaces;
  66 extern const struct brw_tracked_state brw_gs_image_surfaces;
  67 extern const struct brw_tracked_state brw_renderbuffer_surfaces;
  68 extern const struct brw_tracked_state brw_renderbuffer_read_surfaces;
  69 extern const struct brw_tracked_state brw_texture_surfaces;
  70 extern const struct brw_tracked_state brw_wm_binding_table;
  71 extern const struct brw_tracked_state brw_gs_binding_table;
  72 extern const struct brw_tracked_state brw_tes_binding_table;
  73 extern const struct brw_tracked_state brw_tcs_binding_table;
  74 extern const struct brw_tracked_state brw_vs_binding_table;
  75 extern const struct brw_tracked_state brw_wm_ubo_surfaces;
  76 extern const struct brw_tracked_state brw_wm_image_surfaces;
  77 extern const struct brw_tracked_state brw_cs_ubo_surfaces;
  78 extern const struct brw_tracked_state brw_cs_image_surfaces;
  79
  80 extern const struct brw_tracked_state brw_psp_urb_cbs;
  81
  82 extern const struct brw_tracked_state brw_indices;
  83 extern const struct brw_tracked_state brw_index_buffer;
  84 extern const struct brw_tracked_state gen7_cs_push_constants;
  85 extern const struct brw_tracked_state gen6_binding_table_pointers;
  86 extern const struct brw_tracked_state gen6_gs_binding_table;
  87 extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
  88 extern const struct brw_tracked_state gen6_sampler_state;
  89 extern const struct brw_tracked_state gen6_sol_surface;
  90 extern const struct brw_tracked_state gen6_sf_vp;
  91 extern const struct brw_tracked_state gen6_urb;
  92 extern const struct brw_tracked_state gen7_l3_state;
  93 extern const struct brw_tracked_state gen7_push_constant_space;
  94 extern const struct brw_tracked_state gen7_urb;
  95 extern const struct brw_tracked_state gen8_pma_fix;
  96 extern const struct brw_tracked_state brw_cs_work_groups_surface;
  97
  98 static inline bool
  99 brw_state_dirty(const struct brw_context *brw,
 100                 GLuint mesa_flags, uint64_t brw_flags)
 101 {
 102    return ((brw->NewGLState & mesa_flags) |
 103            (brw->ctx.NewDriverState & brw_flags)) != 0;
 104 }
 105
 106 /* brw_binding_tables.c */
 107 void brw_upload_binding_table(struct brw_context *brw,
 108                               uint32_t packet_name,
 109                               const struct brw_stage_prog_data *prog_data,
 110                               struct brw_stage_state *stage_state);
 111
 112 /* brw_misc_state.c */
 113 void brw_upload_invariant_state(struct brw_context *brw);
 114 uint32_t
 115 brw_depthbuffer_format(struct brw_context *brw);
 116
 117 void brw_upload_state_base_address(struct brw_context *brw);
 118
 119 /* gen8_depth_state.c */
 120 void gen8_write_pma_stall_bits(struct brw_context *brw,
 121                                uint32_t pma_stall_bits);
 122
 123 /* brw_disk_cache.c */
 124 void brw_disk_cache_init(struct intel_screen *screen);
 125 bool brw_disk_cache_upload_program(struct brw_context *brw,
 126                                    gl_shader_stage stage);
 127 void brw_disk_cache_write_compute_program(struct brw_context *brw);
 128 void brw_disk_cache_write_render_programs(struct brw_context *brw);
 129
 130 /***********************************************************************
 131  * brw_state.c
 132  */
 133 void brw_upload_render_state(struct brw_context *brw);
 134 void brw_render_state_finished(struct brw_context *brw);
 135 void brw_upload_compute_state(struct brw_context *brw);
 136 void brw_compute_state_finished(struct brw_context *brw);
 137 void brw_init_state(struct brw_context *brw);
 138 void brw_destroy_state(struct brw_context *brw);
 139 void brw_emit_select_pipeline(struct brw_context *brw,
 140                               enum brw_pipeline pipeline);
 141
 142 static inline void
 143 brw_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
 144 {
 145    if (unlikely(brw->last_pipeline != pipeline)) {
 146       assert(pipeline < BRW_NUM_PIPELINES);
 147       brw_emit_select_pipeline(brw, pipeline);
 148       brw->last_pipeline = pipeline;
 149    }
 150 }
 151
 152 /***********************************************************************
 153  * brw_program_cache.c
 154  */
 155
 156 void brw_upload_cache(struct brw_cache *cache,
 157                       enum brw_cache_id cache_id,
 158                       const void *key,
 159                       GLuint key_sz,
 160                       const void *data,
 161                       GLuint data_sz,
 162                       const void *aux,
 163                       GLuint aux_sz,
 164                       uint32_t *out_offset, void *out_aux);
 165
 166 bool brw_search_cache(struct brw_cache *cache,
 167                       enum brw_cache_id cache_id,
 168                       const void *key,
 169                       GLuint key_size,
 170                       uint32_t *inout_offset, void *inout_aux);
 171
 172 const void *brw_find_previous_compile(struct brw_cache *cache,
 173                                       enum brw_cache_id cache_id,
 174                                       unsigned program_string_id);
 175
 176 void brw_program_cache_check_size(struct brw_context *brw);
 177
 178 void brw_init_caches( struct brw_context *brw );
 179 void brw_destroy_caches( struct brw_context *brw );
 180
 181 void brw_print_program_cache(struct brw_context *brw);
 182
 183 /* intel_batchbuffer.c */
 184 void brw_require_statebuffer_space(struct brw_context *brw, int size);
 185 void *brw_state_batch(struct brw_context *brw,
 186                       int size, int alignment, uint32_t *out_offset);
 187
 188 /* brw_wm_surface_state.c */
 189 uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 190 uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
 191 enum isl_format brw_isl_format_for_mesa_format(mesa_format mesa_format);
 192
 193 GLuint translate_tex_target(GLenum target);
 194
 195 enum isl_format translate_tex_format(struct brw_context *brw,
 196                                      mesa_format mesa_format,
 197                                      GLenum srgb_decode);
 198
 199 int brw_get_texture_swizzle(const struct gl_context *ctx,
 200                             const struct gl_texture_object *t);
 201
 202 void brw_emit_buffer_surface_state(struct brw_context *brw,
 203                                    uint32_t *out_offset,
 204                                    struct brw_bo *bo,
 205                                    unsigned buffer_offset,
 206                                    unsigned surface_format,
 207                                    unsigned buffer_size,
 208                                    unsigned pitch,
 209                                    unsigned reloc_flags);
 210
 211 /* brw_sampler_state.c */
 212 void brw_emit_sampler_state(struct brw_context *brw,
 213                             uint32_t *sampler_state,
 214                             uint32_t batch_offset_for_sampler_state,
 215                             unsigned min_filter,
 216                             unsigned mag_filter,
 217                             unsigned mip_filter,
 218                             unsigned max_anisotropy,
 219                             unsigned address_rounding,
 220                             unsigned wrap_s,
 221                             unsigned wrap_t,
 222                             unsigned wrap_r,
 223                             unsigned base_level,
 224                             unsigned min_lod,
 225                             unsigned max_lod,
 226                             int lod_bias,
 227                             unsigned shadow_function,
 228                             bool non_normalized_coordinates,
 229                             uint32_t border_color_offset);
 230
 231 /* gen6_constant_state.c */
 232 void
 233 brw_populate_constant_data(struct brw_context *brw,
 234                            const struct gl_program *prog,
 235                            const struct brw_stage_state *stage_state,
 236                            void *dst,
 237                            const uint32_t *param,
 238                            unsigned nr_params);
 239 void
 240 brw_upload_pull_constants(struct brw_context *brw,
 241                           GLbitfield64 brw_new_constbuf,
 242                           const struct gl_program *prog,
 243                           struct brw_stage_state *stage_state,
 244                           const struct brw_stage_prog_data *prog_data);
 245 void
 246 brw_upload_cs_push_constants(struct brw_context *brw,
 247                              const struct gl_program *prog,
 248                              const struct brw_cs_prog_data *cs_prog_data,
 249                              struct brw_stage_state *stage_state);
 250
 251 /* gen7_vs_state.c */
 252 void
 253 gen7_upload_constant_state(struct brw_context *brw,
 254                            const struct brw_stage_state *stage_state,
 255                            bool active, unsigned opcode);
 256
 257 /* brw_clip.c */
 258 void brw_upload_clip_prog(struct brw_context *brw);
 259
 260 /* brw_sf.c */
 261 void brw_upload_sf_prog(struct brw_context *brw);
 262
 263 bool brw_is_drawing_points(const struct brw_context *brw);
 264 bool brw_is_drawing_lines(const struct brw_context *brw);
 265
 266 /* gen7_l3_state.c */
 267 void
 268 gen7_restore_default_l3_config(struct brw_context *brw);
 269
 270 static inline bool
 271 use_state_point_size(const struct brw_context *brw)
 272 {
 273    const struct gl_context *ctx = &brw->ctx;
 274
 275    /* Section 14.4 (Points) of the OpenGL 4.5 specification says:
 276     *
 277     *    "If program point size mode is enabled, the derived point size is
 278     *     taken from the (potentially clipped) shader built-in gl_PointSize
 279     *     written by:
 280     *
 281     *        * the geometry shader, if active;
 282     *        * the tessellation evaluation shader, if active and no
 283     *          geometry shader is active;
 284     *        * the vertex shader, otherwise
 285     *
 286     *    and clamped to the implementation-dependent point size range.  If
 287     *    the value written to gl_PointSize is less than or equal to zero,
 288     *    or if no value was written to gl_PointSize, results are undefined.
 289     *    If program point size mode is disabled, the derived point size is
 290     *    specified with the command
 291     *
 292     *       void PointSize(float size);
 293     *
 294     *    size specifies the requested size of a point.  The default value
 295     *    is 1.0."
 296     *
 297     * The rules for GLES come from the ES 3.2, OES_geometry_point_size, and
 298     * OES_tessellation_point_size specifications.  To summarize: if the last
 299     * stage before rasterization is a GS or TES, then use gl_PointSize from
 300     * the shader if written.  Otherwise, use 1.0.  If the last stage is a
 301     * vertex shader, use gl_PointSize, or it is undefined.
 302     *
 303     * We can combine these rules into a single condition for both APIs.
 304     * Using the state point size when the last shader stage doesn't write
 305     * gl_PointSize satisfies GL's requirements, as it's undefined.  Because
 306     * ES doesn't have a PointSize() command, the state point size will
 307     * remain 1.0, satisfying the ES default value in the GS/TES case, and
 308     * the VS case (1.0 works for "undefined").  Mesa sets the program point
 309     * mode flag to always-enabled in ES, so we can safely check that, and
 310     * it'll be ignored for ES.
 311     *
 312     * _NEW_PROGRAM | _NEW_POINT
 313     * BRW_NEW_VUE_MAP_GEOM_OUT
 314     */
 315    return (!ctx->VertexProgram.PointSizeEnabled && !ctx->Point._Attenuated) ||
 316           (brw->vue_map_geom_out.slots_valid & VARYING_BIT_PSIZ) == 0;
 317 }
 318
 319 void brw_copy_pipeline_atoms(struct brw_context *brw,
 320                              enum brw_pipeline pipeline,
 321                              const struct brw_tracked_state **atoms,
 322                              int num_atoms);
 323 void gen4_init_atoms(struct brw_context *brw);
 324 void gen45_init_atoms(struct brw_context *brw);
 325 void gen5_init_atoms(struct brw_context *brw);
 326 void gen6_init_atoms(struct brw_context *brw);
 327 void gen7_init_atoms(struct brw_context *brw);
 328 void gen75_init_atoms(struct brw_context *brw);
 329 void gen8_init_atoms(struct brw_context *brw);
 330 void gen9_init_atoms(struct brw_context *brw);
 331 void gen10_init_atoms(struct brw_context *brw);
 332 void gen11_init_atoms(struct brw_context *brw);
 333
 334 /* Memory Object Control State:
 335  * Specifying zero for L3 means "uncached in L3", at least on Haswell
 336  * and Baytrail, since there are no PTE flags for setting L3 cacheability.
 337  * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
 338  * may still respect that.
 339  */
 340 #define GEN7_MOCS_L3                    1
 341
 342 /* Ivybridge only: cache in LLC.
 343  * Specifying zero here means to use the PTE values set by the kernel;
 344  * non-zero overrides the PTE values.
 345  */
 346 #define IVB_MOCS_LLC                    (1 << 1)
 347
 348 /* Baytrail only: snoop in CPU cache */
 349 #define BYT_MOCS_SNOOP                  (1 << 1)
 350
 351 /* Haswell only: LLC/eLLC controls (write-back or uncached).
 352  * Specifying zero here means to use the PTE values set by the kernel,
 353  * which is useful since it offers additional control (write-through
 354  * cacheing and age).  Non-zero overrides the PTE values.
 355  */
 356 #define HSW_MOCS_UC_LLC_UC_ELLC         (1 << 1)
 357 #define HSW_MOCS_WB_LLC_WB_ELLC         (2 << 1)
 358 #define HSW_MOCS_UC_LLC_WB_ELLC         (3 << 1)
 359
 360 /* Broadwell: these defines always use all available caches (L3, LLC, eLLC),
 361  * and let you force write-back (WB) or write-through (WT) caching, or leave
 362  * it up to the page table entry (PTE) specified by the kernel.
 363  */
 364 #define BDW_MOCS_WB  0x78
 365 #define BDW_MOCS_WT  0x58
 366 #define BDW_MOCS_PTE 0x18
 367
 368 /* Skylake: MOCS is now an index into an array of 62 different caching
 369  * configurations programmed by the kernel.
 370  */
 371 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 372 #define SKL_MOCS_WB  (2 << 1)
 373 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 374 #define SKL_MOCS_PTE (1 << 1)
 375
 376 /* Cannonlake: MOCS is now an index into an array of 62 different caching
 377  * configurations programmed by the kernel.
 378  */
 379 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 380 #define CNL_MOCS_WB  (2 << 1)
 381 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 382 #define CNL_MOCS_PTE (1 << 1)
 383
 384 /* Ice Lake uses same MOCS settings as Cannonlake */
 385 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 386 #define ICL_MOCS_WB  (2 << 1)
 387 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 388 #define ICL_MOCS_PTE (1 << 1)
 389
 390 uint32_t brw_get_bo_mocs(const struct gen_device_info *devinfo,
 391                          struct brw_bo *bo);
 392
 393 #ifdef __cplusplus
 394 }
 395 #endif
 396
 397 #endif