src/mesa/drivers/dri/i965/brw_state.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_STATE_H
  34 #define BRW_STATE_H
  35
  36 #include "brw_context.h"
  37
  38 #ifdef __cplusplus
  39 extern "C" {
  40 #endif
  41
  42 enum intel_msaa_layout;
  43
  44 extern const struct brw_tracked_state brw_blend_constant_color;
  45 extern const struct brw_tracked_state brw_clip_unit;
  46 extern const struct brw_tracked_state brw_vs_pull_constants;
  47 extern const struct brw_tracked_state brw_tcs_pull_constants;
  48 extern const struct brw_tracked_state brw_tes_pull_constants;
  49 extern const struct brw_tracked_state brw_gs_pull_constants;
  50 extern const struct brw_tracked_state brw_wm_pull_constants;
  51 extern const struct brw_tracked_state brw_cs_pull_constants;
  52 extern const struct brw_tracked_state brw_constant_buffer;
  53 extern const struct brw_tracked_state brw_curbe_offsets;
  54 extern const struct brw_tracked_state brw_invariant_state;
  55 extern const struct brw_tracked_state brw_binding_table_pointers;
  56 extern const struct brw_tracked_state brw_depthbuffer;
  57 extern const struct brw_tracked_state brw_recalculate_urb_fence;
  58 extern const struct brw_tracked_state brw_sf_vp;
  59 extern const struct brw_tracked_state brw_cs_texture_surfaces;
  60 extern const struct brw_tracked_state brw_vs_ubo_surfaces;
  61 extern const struct brw_tracked_state brw_vs_abo_surfaces;
  62 extern const struct brw_tracked_state brw_vs_image_surfaces;
  63 extern const struct brw_tracked_state brw_tcs_ubo_surfaces;
  64 extern const struct brw_tracked_state brw_tcs_abo_surfaces;
  65 extern const struct brw_tracked_state brw_tcs_image_surfaces;
  66 extern const struct brw_tracked_state brw_tes_ubo_surfaces;
  67 extern const struct brw_tracked_state brw_tes_abo_surfaces;
  68 extern const struct brw_tracked_state brw_tes_image_surfaces;
  69 extern const struct brw_tracked_state brw_gs_ubo_surfaces;
  70 extern const struct brw_tracked_state brw_gs_abo_surfaces;
  71 extern const struct brw_tracked_state brw_gs_image_surfaces;
  72 extern const struct brw_tracked_state brw_renderbuffer_surfaces;
  73 extern const struct brw_tracked_state brw_renderbuffer_read_surfaces;
  74 extern const struct brw_tracked_state brw_texture_surfaces;
  75 extern const struct brw_tracked_state brw_wm_binding_table;
  76 extern const struct brw_tracked_state brw_gs_binding_table;
  77 extern const struct brw_tracked_state brw_tes_binding_table;
  78 extern const struct brw_tracked_state brw_tcs_binding_table;
  79 extern const struct brw_tracked_state brw_vs_binding_table;
  80 extern const struct brw_tracked_state brw_wm_ubo_surfaces;
  81 extern const struct brw_tracked_state brw_wm_abo_surfaces;
  82 extern const struct brw_tracked_state brw_wm_image_surfaces;
  83 extern const struct brw_tracked_state brw_cs_ubo_surfaces;
  84 extern const struct brw_tracked_state brw_cs_abo_surfaces;
  85 extern const struct brw_tracked_state brw_cs_image_surfaces;
  86 extern const struct brw_tracked_state brw_wm_unit;
  87
  88 extern const struct brw_tracked_state brw_psp_urb_cbs;
  89
  90 extern const struct brw_tracked_state brw_indices;
  91 extern const struct brw_tracked_state brw_index_buffer;
  92 extern const struct brw_tracked_state gen7_cs_push_constants;
  93 extern const struct brw_tracked_state gen6_binding_table_pointers;
  94 extern const struct brw_tracked_state gen6_gs_binding_table;
  95 extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
  96 extern const struct brw_tracked_state gen6_sampler_state;
  97 extern const struct brw_tracked_state gen6_sol_surface;
  98 extern const struct brw_tracked_state gen6_sf_vp;
  99 extern const struct brw_tracked_state gen6_urb;
 100 extern const struct brw_tracked_state gen7_depthbuffer;
 101 extern const struct brw_tracked_state gen7_l3_state;
 102 extern const struct brw_tracked_state gen7_push_constant_space;
 103 extern const struct brw_tracked_state gen7_urb;
 104 extern const struct brw_tracked_state gen8_pma_fix;
 105 extern const struct brw_tracked_state brw_cs_work_groups_surface;
 106
 107 static inline bool
 108 brw_state_dirty(const struct brw_context *brw,
 109                 GLuint mesa_flags, uint64_t brw_flags)
 110 {
 111    return ((brw->NewGLState & mesa_flags) |
 112            (brw->ctx.NewDriverState & brw_flags)) != 0;
 113 }
 114
 115 /* brw_binding_tables.c */
 116 void brw_upload_binding_table(struct brw_context *brw,
 117                               uint32_t packet_name,
 118                               const struct brw_stage_prog_data *prog_data,
 119                               struct brw_stage_state *stage_state);
 120
 121 /* brw_misc_state.c */
 122 void brw_upload_invariant_state(struct brw_context *brw);
 123 uint32_t
 124 brw_depthbuffer_format(struct brw_context *brw);
 125
 126 uint32_t
 127 brw_convert_depth_value(mesa_format format, float value);
 128
 129 void brw_upload_state_base_address(struct brw_context *brw);
 130
 131 /* gen8_depth_state.c */
 132 void gen8_write_pma_stall_bits(struct brw_context *brw,
 133                                uint32_t pma_stall_bits);
 134
 135 /***********************************************************************
 136  * brw_state.c
 137  */
 138 void brw_upload_render_state(struct brw_context *brw);
 139 void brw_render_state_finished(struct brw_context *brw);
 140 void brw_upload_compute_state(struct brw_context *brw);
 141 void brw_compute_state_finished(struct brw_context *brw);
 142 void brw_init_state(struct brw_context *brw);
 143 void brw_destroy_state(struct brw_context *brw);
 144 void brw_emit_select_pipeline(struct brw_context *brw,
 145                               enum brw_pipeline pipeline);
 146
 147 static inline void
 148 brw_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
 149 {
 150    if (unlikely(brw->last_pipeline != pipeline)) {
 151       assert(pipeline < BRW_NUM_PIPELINES);
 152       brw_emit_select_pipeline(brw, pipeline);
 153       brw->last_pipeline = pipeline;
 154    }
 155 }
 156
 157 /***********************************************************************
 158  * brw_program_cache.c
 159  */
 160
 161 void brw_upload_cache(struct brw_cache *cache,
 162                       enum brw_cache_id cache_id,
 163                       const void *key,
 164                       GLuint key_sz,
 165                       const void *data,
 166                       GLuint data_sz,
 167                       const void *aux,
 168                       GLuint aux_sz,
 169                       uint32_t *out_offset, void *out_aux);
 170
 171 bool brw_search_cache(struct brw_cache *cache,
 172                       enum brw_cache_id cache_id,
 173                       const void *key,
 174                       GLuint key_size,
 175                       uint32_t *inout_offset, void *inout_aux);
 176
 177 const void *brw_find_previous_compile(struct brw_cache *cache,
 178                                       enum brw_cache_id cache_id,
 179                                       unsigned program_string_id);
 180
 181 void brw_program_cache_check_size(struct brw_context *brw);
 182
 183 void brw_init_caches( struct brw_context *brw );
 184 void brw_destroy_caches( struct brw_context *brw );
 185
 186 void brw_print_program_cache(struct brw_context *brw);
 187
 188 /***********************************************************************
 189  * brw_state_batch.c
 190  */
 191 #define BRW_BATCH_STRUCT(brw, s) \
 192    intel_batchbuffer_data(brw, (s), sizeof(*(s)), RENDER_RING)
 193
 194 void *brw_state_batch(struct brw_context *brw,
 195                       int size, int alignment, uint32_t *out_offset);
 196 uint32_t brw_state_batch_size(struct brw_context *brw, uint32_t offset);
 197
 198 /* brw_wm_surface_state.c */
 199 void gen4_init_vtable_surface_functions(struct brw_context *brw);
 200 uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 201 uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
 202 enum isl_format brw_isl_format_for_mesa_format(mesa_format mesa_format);
 203
 204 GLuint translate_tex_target(GLenum target);
 205
 206 enum isl_format translate_tex_format(struct brw_context *brw,
 207                                      mesa_format mesa_format,
 208                                      GLenum srgb_decode);
 209
 210 int brw_get_texture_swizzle(const struct gl_context *ctx,
 211                             const struct gl_texture_object *t);
 212
 213 void brw_emit_buffer_surface_state(struct brw_context *brw,
 214                                    uint32_t *out_offset,
 215                                    struct brw_bo *bo,
 216                                    unsigned buffer_offset,
 217                                    unsigned surface_format,
 218                                    unsigned buffer_size,
 219                                    unsigned pitch,
 220                                    bool rw);
 221
 222 void brw_update_texture_surface(struct gl_context *ctx,
 223                                 unsigned unit, uint32_t *surf_offset,
 224                                 bool for_gather, uint32_t plane);
 225
 226 uint32_t brw_update_renderbuffer_surface(struct brw_context *brw,
 227                                          struct gl_renderbuffer *rb,
 228                                          uint32_t flags, unsigned unit,
 229                                          uint32_t surf_index);
 230
 231 void brw_update_renderbuffer_surfaces(struct brw_context *brw,
 232                                       const struct gl_framebuffer *fb,
 233                                       uint32_t render_target_start,
 234                                       uint32_t *surf_offset);
 235
 236 /* gen7_wm_surface_state.c */
 237 void gen7_check_surface_setup(uint32_t *surf, bool is_render_target);
 238 void gen7_init_vtable_surface_functions(struct brw_context *brw);
 239
 240 /* gen8_surface_state.c */
 241
 242 void gen8_init_vtable_surface_functions(struct brw_context *brw);
 243
 244 /* brw_sampler_state.c */
 245 void brw_emit_sampler_state(struct brw_context *brw,
 246                             uint32_t *sampler_state,
 247                             uint32_t batch_offset_for_sampler_state,
 248                             unsigned min_filter,
 249                             unsigned mag_filter,
 250                             unsigned mip_filter,
 251                             unsigned max_anisotropy,
 252                             unsigned address_rounding,
 253                             unsigned wrap_s,
 254                             unsigned wrap_t,
 255                             unsigned wrap_r,
 256                             unsigned base_level,
 257                             unsigned min_lod,
 258                             unsigned max_lod,
 259                             int lod_bias,
 260                             unsigned shadow_function,
 261                             bool non_normalized_coordinates,
 262                             uint32_t border_color_offset);
 263
 264 /* gen6_surface_state.c */
 265 void gen6_init_vtable_surface_functions(struct brw_context *brw);
 266
 267 /* brw_vs_surface_state.c */
 268 void
 269 brw_upload_pull_constants(struct brw_context *brw,
 270                           GLbitfield64 brw_new_constbuf,
 271                           const struct gl_program *prog,
 272                           struct brw_stage_state *stage_state,
 273                           const struct brw_stage_prog_data *prog_data);
 274
 275 /* gen7_vs_state.c */
 276 void
 277 gen7_upload_constant_state(struct brw_context *brw,
 278                            const struct brw_stage_state *stage_state,
 279                            bool active, unsigned opcode);
 280
 281 /* brw_clip.c */
 282 void brw_upload_clip_prog(struct brw_context *brw);
 283
 284 /* brw_sf.c */
 285 void brw_upload_sf_prog(struct brw_context *brw);
 286
 287 bool brw_is_drawing_points(const struct brw_context *brw);
 288 bool brw_is_drawing_lines(const struct brw_context *brw);
 289
 290 /* gen7_l3_state.c */
 291 void
 292 gen7_restore_default_l3_config(struct brw_context *brw);
 293
 294 static inline bool
 295 use_state_point_size(const struct brw_context *brw)
 296 {
 297    const struct gl_context *ctx = &brw->ctx;
 298
 299    /* Section 14.4 (Points) of the OpenGL 4.5 specification says:
 300     *
 301     *    "If program point size mode is enabled, the derived point size is
 302     *     taken from the (potentially clipped) shader built-in gl_PointSize
 303     *     written by:
 304     *
 305     *        * the geometry shader, if active;
 306     *        * the tessellation evaluation shader, if active and no
 307     *          geometry shader is active;
 308     *        * the vertex shader, otherwise
 309     *
 310     *    and clamped to the implementation-dependent point size range.  If
 311     *    the value written to gl_PointSize is less than or equal to zero,
 312     *    or if no value was written to gl_PointSize, results are undefined.
 313     *    If program point size mode is disabled, the derived point size is
 314     *    specified with the command
 315     *
 316     *       void PointSize(float size);
 317     *
 318     *    size specifies the requested size of a point.  The default value
 319     *    is 1.0."
 320     *
 321     * The rules for GLES come from the ES 3.2, OES_geometry_point_size, and
 322     * OES_tessellation_point_size specifications.  To summarize: if the last
 323     * stage before rasterization is a GS or TES, then use gl_PointSize from
 324     * the shader if written.  Otherwise, use 1.0.  If the last stage is a
 325     * vertex shader, use gl_PointSize, or it is undefined.
 326     *
 327     * We can combine these rules into a single condition for both APIs.
 328     * Using the state point size when the last shader stage doesn't write
 329     * gl_PointSize satisfies GL's requirements, as it's undefined.  Because
 330     * ES doesn't have a PointSize() command, the state point size will
 331     * remain 1.0, satisfying the ES default value in the GS/TES case, and
 332     * the VS case (1.0 works for "undefined").  Mesa sets the program point
 333     * mode flag to always-enabled in ES, so we can safely check that, and
 334     * it'll be ignored for ES.
 335     *
 336     * _NEW_PROGRAM | _NEW_POINT
 337     * BRW_NEW_VUE_MAP_GEOM_OUT
 338     */
 339    return (!ctx->VertexProgram.PointSizeEnabled && !ctx->Point._Attenuated) ||
 340           (brw->vue_map_geom_out.slots_valid & VARYING_BIT_PSIZ) == 0;
 341 }
 342
 343 void brw_copy_pipeline_atoms(struct brw_context *brw,
 344                              enum brw_pipeline pipeline,
 345                              const struct brw_tracked_state **atoms,
 346                              int num_atoms);
 347 void gen4_init_atoms(struct brw_context *brw);
 348 void gen45_init_atoms(struct brw_context *brw);
 349 void gen5_init_atoms(struct brw_context *brw);
 350 void gen6_init_atoms(struct brw_context *brw);
 351 void gen7_init_atoms(struct brw_context *brw);
 352 void gen75_init_atoms(struct brw_context *brw);
 353 void gen8_init_atoms(struct brw_context *brw);
 354 void gen9_init_atoms(struct brw_context *brw);
 355 void gen10_init_atoms(struct brw_context *brw);
 356
 357 /* Memory Object Control State:
 358  * Specifying zero for L3 means "uncached in L3", at least on Haswell
 359  * and Baytrail, since there are no PTE flags for setting L3 cacheability.
 360  * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
 361  * may still respect that.
 362  */
 363 #define GEN7_MOCS_L3                    1
 364
 365 /* Ivybridge only: cache in LLC.
 366  * Specifying zero here means to use the PTE values set by the kernel;
 367  * non-zero overrides the PTE values.
 368  */
 369 #define IVB_MOCS_LLC                    (1 << 1)
 370
 371 /* Baytrail only: snoop in CPU cache */
 372 #define BYT_MOCS_SNOOP                  (1 << 1)
 373
 374 /* Haswell only: LLC/eLLC controls (write-back or uncached).
 375  * Specifying zero here means to use the PTE values set by the kernel,
 376  * which is useful since it offers additional control (write-through
 377  * cacheing and age).  Non-zero overrides the PTE values.
 378  */
 379 #define HSW_MOCS_UC_LLC_UC_ELLC         (1 << 1)
 380 #define HSW_MOCS_WB_LLC_WB_ELLC         (2 << 1)
 381 #define HSW_MOCS_UC_LLC_WB_ELLC         (3 << 1)
 382
 383 /* Broadwell: these defines always use all available caches (L3, LLC, eLLC),
 384  * and let you force write-back (WB) or write-through (WT) caching, or leave
 385  * it up to the page table entry (PTE) specified by the kernel.
 386  */
 387 #define BDW_MOCS_WB  0x78
 388 #define BDW_MOCS_WT  0x58
 389 #define BDW_MOCS_PTE 0x18
 390
 391 /* Skylake: MOCS is now an index into an array of 62 different caching
 392  * configurations programmed by the kernel.
 393  */
 394 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 395 #define SKL_MOCS_WB  (2 << 1)
 396 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 397 #define SKL_MOCS_PTE (1 << 1)
 398
 399 /* Cannonlake: MOCS is now an index into an array of 62 different caching
 400  * configurations programmed by the kernel.
 401  */
 402 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 403 #define CNL_MOCS_WB  (2 << 1)
 404 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 405 #define CNL_MOCS_PTE (1 << 1)
 406
 407 #ifdef __cplusplus
 408 }
 409 #endif
 410
 411 #endif