src/mesa/drivers/dri/i965/brw_state.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_STATE_H
  34 #define BRW_STATE_H
  35
  36 #include "brw_context.h"
  37
  38 #ifdef __cplusplus
  39 extern "C" {
  40 #endif
  41
  42 enum intel_msaa_layout;
  43
  44 extern const struct brw_tracked_state brw_blend_constant_color;
  45 extern const struct brw_tracked_state brw_clip_unit;
  46 extern const struct brw_tracked_state brw_vs_pull_constants;
  47 extern const struct brw_tracked_state brw_tcs_pull_constants;
  48 extern const struct brw_tracked_state brw_tes_pull_constants;
  49 extern const struct brw_tracked_state brw_gs_pull_constants;
  50 extern const struct brw_tracked_state brw_wm_pull_constants;
  51 extern const struct brw_tracked_state brw_cs_pull_constants;
  52 extern const struct brw_tracked_state brw_constant_buffer;
  53 extern const struct brw_tracked_state brw_curbe_offsets;
  54 extern const struct brw_tracked_state brw_invariant_state;
  55 extern const struct brw_tracked_state brw_binding_table_pointers;
  56 extern const struct brw_tracked_state brw_depthbuffer;
  57 extern const struct brw_tracked_state brw_recalculate_urb_fence;
  58 extern const struct brw_tracked_state brw_sf_vp;
  59 extern const struct brw_tracked_state brw_cs_texture_surfaces;
  60 extern const struct brw_tracked_state brw_vs_ubo_surfaces;
  61 extern const struct brw_tracked_state brw_vs_abo_surfaces;
  62 extern const struct brw_tracked_state brw_vs_image_surfaces;
  63 extern const struct brw_tracked_state brw_tcs_ubo_surfaces;
  64 extern const struct brw_tracked_state brw_tcs_abo_surfaces;
  65 extern const struct brw_tracked_state brw_tcs_image_surfaces;
  66 extern const struct brw_tracked_state brw_tes_ubo_surfaces;
  67 extern const struct brw_tracked_state brw_tes_abo_surfaces;
  68 extern const struct brw_tracked_state brw_tes_image_surfaces;
  69 extern const struct brw_tracked_state brw_gs_ubo_surfaces;
  70 extern const struct brw_tracked_state brw_gs_abo_surfaces;
  71 extern const struct brw_tracked_state brw_gs_image_surfaces;
  72 extern const struct brw_tracked_state brw_renderbuffer_surfaces;
  73 extern const struct brw_tracked_state brw_renderbuffer_read_surfaces;
  74 extern const struct brw_tracked_state brw_texture_surfaces;
  75 extern const struct brw_tracked_state brw_wm_binding_table;
  76 extern const struct brw_tracked_state brw_gs_binding_table;
  77 extern const struct brw_tracked_state brw_tes_binding_table;
  78 extern const struct brw_tracked_state brw_tcs_binding_table;
  79 extern const struct brw_tracked_state brw_vs_binding_table;
  80 extern const struct brw_tracked_state brw_wm_ubo_surfaces;
  81 extern const struct brw_tracked_state brw_wm_abo_surfaces;
  82 extern const struct brw_tracked_state brw_wm_image_surfaces;
  83 extern const struct brw_tracked_state brw_cs_ubo_surfaces;
  84 extern const struct brw_tracked_state brw_cs_abo_surfaces;
  85 extern const struct brw_tracked_state brw_cs_image_surfaces;
  86
  87 extern const struct brw_tracked_state brw_psp_urb_cbs;
  88
  89 extern const struct brw_tracked_state brw_indices;
  90 extern const struct brw_tracked_state brw_index_buffer;
  91 extern const struct brw_tracked_state gen7_cs_push_constants;
  92 extern const struct brw_tracked_state gen6_binding_table_pointers;
  93 extern const struct brw_tracked_state gen6_gs_binding_table;
  94 extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
  95 extern const struct brw_tracked_state gen6_sampler_state;
  96 extern const struct brw_tracked_state gen6_sol_surface;
  97 extern const struct brw_tracked_state gen6_sf_vp;
  98 extern const struct brw_tracked_state gen6_urb;
  99 extern const struct brw_tracked_state gen7_depthbuffer;
 100 extern const struct brw_tracked_state gen7_l3_state;
 101 extern const struct brw_tracked_state gen7_push_constant_space;
 102 extern const struct brw_tracked_state gen7_urb;
 103 extern const struct brw_tracked_state gen8_pma_fix;
 104 extern const struct brw_tracked_state brw_cs_work_groups_surface;
 105
 106 static inline bool
 107 brw_state_dirty(const struct brw_context *brw,
 108                 GLuint mesa_flags, uint64_t brw_flags)
 109 {
 110    return ((brw->NewGLState & mesa_flags) |
 111            (brw->ctx.NewDriverState & brw_flags)) != 0;
 112 }
 113
 114 /* brw_binding_tables.c */
 115 void brw_upload_binding_table(struct brw_context *brw,
 116                               uint32_t packet_name,
 117                               const struct brw_stage_prog_data *prog_data,
 118                               struct brw_stage_state *stage_state);
 119
 120 /* brw_misc_state.c */
 121 void brw_upload_invariant_state(struct brw_context *brw);
 122 uint32_t
 123 brw_depthbuffer_format(struct brw_context *brw);
 124
 125 uint32_t
 126 brw_convert_depth_value(mesa_format format, float value);
 127
 128 void brw_upload_state_base_address(struct brw_context *brw);
 129
 130 /* gen8_depth_state.c */
 131 void gen8_write_pma_stall_bits(struct brw_context *brw,
 132                                uint32_t pma_stall_bits);
 133
 134 /***********************************************************************
 135  * brw_state.c
 136  */
 137 void brw_upload_render_state(struct brw_context *brw);
 138 void brw_render_state_finished(struct brw_context *brw);
 139 void brw_upload_compute_state(struct brw_context *brw);
 140 void brw_compute_state_finished(struct brw_context *brw);
 141 void brw_init_state(struct brw_context *brw);
 142 void brw_destroy_state(struct brw_context *brw);
 143 void brw_emit_select_pipeline(struct brw_context *brw,
 144                               enum brw_pipeline pipeline);
 145
 146 static inline void
 147 brw_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
 148 {
 149    if (unlikely(brw->last_pipeline != pipeline)) {
 150       assert(pipeline < BRW_NUM_PIPELINES);
 151       brw_emit_select_pipeline(brw, pipeline);
 152       brw->last_pipeline = pipeline;
 153    }
 154 }
 155
 156 /***********************************************************************
 157  * brw_program_cache.c
 158  */
 159
 160 void brw_upload_cache(struct brw_cache *cache,
 161                       enum brw_cache_id cache_id,
 162                       const void *key,
 163                       GLuint key_sz,
 164                       const void *data,
 165                       GLuint data_sz,
 166                       const void *aux,
 167                       GLuint aux_sz,
 168                       uint32_t *out_offset, void *out_aux);
 169
 170 bool brw_search_cache(struct brw_cache *cache,
 171                       enum brw_cache_id cache_id,
 172                       const void *key,
 173                       GLuint key_size,
 174                       uint32_t *inout_offset, void *inout_aux);
 175
 176 const void *brw_find_previous_compile(struct brw_cache *cache,
 177                                       enum brw_cache_id cache_id,
 178                                       unsigned program_string_id);
 179
 180 void brw_program_cache_check_size(struct brw_context *brw);
 181
 182 void brw_init_caches( struct brw_context *brw );
 183 void brw_destroy_caches( struct brw_context *brw );
 184
 185 void brw_print_program_cache(struct brw_context *brw);
 186
 187 /* intel_batchbuffer.c */
 188 void *brw_state_batch(struct brw_context *brw,
 189                       int size, int alignment, uint32_t *out_offset);
 190 uint32_t brw_state_batch_size(struct brw_context *brw, uint32_t offset);
 191
 192 /* brw_wm_surface_state.c */
 193 uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 194 uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
 195 enum isl_format brw_isl_format_for_mesa_format(mesa_format mesa_format);
 196
 197 GLuint translate_tex_target(GLenum target);
 198
 199 enum isl_format translate_tex_format(struct brw_context *brw,
 200                                      mesa_format mesa_format,
 201                                      GLenum srgb_decode);
 202
 203 int brw_get_texture_swizzle(const struct gl_context *ctx,
 204                             const struct gl_texture_object *t);
 205
 206 void brw_emit_buffer_surface_state(struct brw_context *brw,
 207                                    uint32_t *out_offset,
 208                                    struct brw_bo *bo,
 209                                    unsigned buffer_offset,
 210                                    unsigned surface_format,
 211                                    unsigned buffer_size,
 212                                    unsigned pitch,
 213                                    unsigned reloc_flags);
 214
 215 void brw_update_texture_surface(struct gl_context *ctx,
 216                                 unsigned unit, uint32_t *surf_offset,
 217                                 bool for_gather, uint32_t plane);
 218
 219 /* brw_sampler_state.c */
 220 void brw_emit_sampler_state(struct brw_context *brw,
 221                             uint32_t *sampler_state,
 222                             uint32_t batch_offset_for_sampler_state,
 223                             unsigned min_filter,
 224                             unsigned mag_filter,
 225                             unsigned mip_filter,
 226                             unsigned max_anisotropy,
 227                             unsigned address_rounding,
 228                             unsigned wrap_s,
 229                             unsigned wrap_t,
 230                             unsigned wrap_r,
 231                             unsigned base_level,
 232                             unsigned min_lod,
 233                             unsigned max_lod,
 234                             int lod_bias,
 235                             unsigned shadow_function,
 236                             bool non_normalized_coordinates,
 237                             uint32_t border_color_offset);
 238
 239 /* brw_vs_surface_state.c */
 240 void
 241 brw_upload_pull_constants(struct brw_context *brw,
 242                           GLbitfield64 brw_new_constbuf,
 243                           const struct gl_program *prog,
 244                           struct brw_stage_state *stage_state,
 245                           const struct brw_stage_prog_data *prog_data);
 246
 247 /* gen7_vs_state.c */
 248 void
 249 gen7_upload_constant_state(struct brw_context *brw,
 250                            const struct brw_stage_state *stage_state,
 251                            bool active, unsigned opcode);
 252
 253 /* brw_clip.c */
 254 void brw_upload_clip_prog(struct brw_context *brw);
 255
 256 /* brw_sf.c */
 257 void brw_upload_sf_prog(struct brw_context *brw);
 258
 259 bool brw_is_drawing_points(const struct brw_context *brw);
 260 bool brw_is_drawing_lines(const struct brw_context *brw);
 261
 262 /* gen7_l3_state.c */
 263 void
 264 gen7_restore_default_l3_config(struct brw_context *brw);
 265
 266 static inline bool
 267 use_state_point_size(const struct brw_context *brw)
 268 {
 269    const struct gl_context *ctx = &brw->ctx;
 270
 271    /* Section 14.4 (Points) of the OpenGL 4.5 specification says:
 272     *
 273     *    "If program point size mode is enabled, the derived point size is
 274     *     taken from the (potentially clipped) shader built-in gl_PointSize
 275     *     written by:
 276     *
 277     *        * the geometry shader, if active;
 278     *        * the tessellation evaluation shader, if active and no
 279     *          geometry shader is active;
 280     *        * the vertex shader, otherwise
 281     *
 282     *    and clamped to the implementation-dependent point size range.  If
 283     *    the value written to gl_PointSize is less than or equal to zero,
 284     *    or if no value was written to gl_PointSize, results are undefined.
 285     *    If program point size mode is disabled, the derived point size is
 286     *    specified with the command
 287     *
 288     *       void PointSize(float size);
 289     *
 290     *    size specifies the requested size of a point.  The default value
 291     *    is 1.0."
 292     *
 293     * The rules for GLES come from the ES 3.2, OES_geometry_point_size, and
 294     * OES_tessellation_point_size specifications.  To summarize: if the last
 295     * stage before rasterization is a GS or TES, then use gl_PointSize from
 296     * the shader if written.  Otherwise, use 1.0.  If the last stage is a
 297     * vertex shader, use gl_PointSize, or it is undefined.
 298     *
 299     * We can combine these rules into a single condition for both APIs.
 300     * Using the state point size when the last shader stage doesn't write
 301     * gl_PointSize satisfies GL's requirements, as it's undefined.  Because
 302     * ES doesn't have a PointSize() command, the state point size will
 303     * remain 1.0, satisfying the ES default value in the GS/TES case, and
 304     * the VS case (1.0 works for "undefined").  Mesa sets the program point
 305     * mode flag to always-enabled in ES, so we can safely check that, and
 306     * it'll be ignored for ES.
 307     *
 308     * _NEW_PROGRAM | _NEW_POINT
 309     * BRW_NEW_VUE_MAP_GEOM_OUT
 310     */
 311    return (!ctx->VertexProgram.PointSizeEnabled && !ctx->Point._Attenuated) ||
 312           (brw->vue_map_geom_out.slots_valid & VARYING_BIT_PSIZ) == 0;
 313 }
 314
 315 void brw_copy_pipeline_atoms(struct brw_context *brw,
 316                              enum brw_pipeline pipeline,
 317                              const struct brw_tracked_state **atoms,
 318                              int num_atoms);
 319 void gen4_init_atoms(struct brw_context *brw);
 320 void gen45_init_atoms(struct brw_context *brw);
 321 void gen5_init_atoms(struct brw_context *brw);
 322 void gen6_init_atoms(struct brw_context *brw);
 323 void gen7_init_atoms(struct brw_context *brw);
 324 void gen75_init_atoms(struct brw_context *brw);
 325 void gen8_init_atoms(struct brw_context *brw);
 326 void gen9_init_atoms(struct brw_context *brw);
 327 void gen10_init_atoms(struct brw_context *brw);
 328
 329 /* Memory Object Control State:
 330  * Specifying zero for L3 means "uncached in L3", at least on Haswell
 331  * and Baytrail, since there are no PTE flags for setting L3 cacheability.
 332  * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
 333  * may still respect that.
 334  */
 335 #define GEN7_MOCS_L3                    1
 336
 337 /* Ivybridge only: cache in LLC.
 338  * Specifying zero here means to use the PTE values set by the kernel;
 339  * non-zero overrides the PTE values.
 340  */
 341 #define IVB_MOCS_LLC                    (1 << 1)
 342
 343 /* Baytrail only: snoop in CPU cache */
 344 #define BYT_MOCS_SNOOP                  (1 << 1)
 345
 346 /* Haswell only: LLC/eLLC controls (write-back or uncached).
 347  * Specifying zero here means to use the PTE values set by the kernel,
 348  * which is useful since it offers additional control (write-through
 349  * cacheing and age).  Non-zero overrides the PTE values.
 350  */
 351 #define HSW_MOCS_UC_LLC_UC_ELLC         (1 << 1)
 352 #define HSW_MOCS_WB_LLC_WB_ELLC         (2 << 1)
 353 #define HSW_MOCS_UC_LLC_WB_ELLC         (3 << 1)
 354
 355 /* Broadwell: these defines always use all available caches (L3, LLC, eLLC),
 356  * and let you force write-back (WB) or write-through (WT) caching, or leave
 357  * it up to the page table entry (PTE) specified by the kernel.
 358  */
 359 #define BDW_MOCS_WB  0x78
 360 #define BDW_MOCS_WT  0x58
 361 #define BDW_MOCS_PTE 0x18
 362
 363 /* Skylake: MOCS is now an index into an array of 62 different caching
 364  * configurations programmed by the kernel.
 365  */
 366 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 367 #define SKL_MOCS_WB  (2 << 1)
 368 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 369 #define SKL_MOCS_PTE (1 << 1)
 370
 371 /* Cannonlake: MOCS is now an index into an array of 62 different caching
 372  * configurations programmed by the kernel.
 373  */
 374 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 375 #define CNL_MOCS_WB  (2 << 1)
 376 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 377 #define CNL_MOCS_PTE (1 << 1)
 378
 379 #ifdef __cplusplus
 380 }
 381 #endif
 382
 383 #endif