src/mesa/drivers/dri/i965/brw_state.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_STATE_H
  34 #define BRW_STATE_H
  35
  36 #include "brw_context.h"
  37
  38 #ifdef __cplusplus
  39 extern "C" {
  40 #endif
  41
  42 enum intel_msaa_layout;
  43
  44 extern const struct brw_tracked_state brw_blend_constant_color;
  45 extern const struct brw_tracked_state brw_cc_vp;
  46 extern const struct brw_tracked_state brw_cc_unit;
  47 extern const struct brw_tracked_state brw_clip_unit;
  48 extern const struct brw_tracked_state brw_vs_pull_constants;
  49 extern const struct brw_tracked_state brw_tcs_pull_constants;
  50 extern const struct brw_tracked_state brw_tes_pull_constants;
  51 extern const struct brw_tracked_state brw_gs_pull_constants;
  52 extern const struct brw_tracked_state brw_wm_pull_constants;
  53 extern const struct brw_tracked_state brw_cs_pull_constants;
  54 extern const struct brw_tracked_state brw_constant_buffer;
  55 extern const struct brw_tracked_state brw_curbe_offsets;
  56 extern const struct brw_tracked_state brw_invariant_state;
  57 extern const struct brw_tracked_state brw_fs_samplers;
  58 extern const struct brw_tracked_state brw_gs_unit;
  59 extern const struct brw_tracked_state brw_binding_table_pointers;
  60 extern const struct brw_tracked_state brw_depthbuffer;
  61 extern const struct brw_tracked_state brw_recalculate_urb_fence;
  62 extern const struct brw_tracked_state brw_sf_unit;
  63 extern const struct brw_tracked_state brw_sf_vp;
  64 extern const struct brw_tracked_state brw_vs_samplers;
  65 extern const struct brw_tracked_state brw_tcs_samplers;
  66 extern const struct brw_tracked_state brw_tes_samplers;
  67 extern const struct brw_tracked_state brw_gs_samplers;
  68 extern const struct brw_tracked_state brw_cs_samplers;
  69 extern const struct brw_tracked_state brw_cs_texture_surfaces;
  70 extern const struct brw_tracked_state brw_vs_ubo_surfaces;
  71 extern const struct brw_tracked_state brw_vs_abo_surfaces;
  72 extern const struct brw_tracked_state brw_vs_image_surfaces;
  73 extern const struct brw_tracked_state brw_tcs_ubo_surfaces;
  74 extern const struct brw_tracked_state brw_tcs_abo_surfaces;
  75 extern const struct brw_tracked_state brw_tcs_image_surfaces;
  76 extern const struct brw_tracked_state brw_tes_ubo_surfaces;
  77 extern const struct brw_tracked_state brw_tes_abo_surfaces;
  78 extern const struct brw_tracked_state brw_tes_image_surfaces;
  79 extern const struct brw_tracked_state brw_gs_ubo_surfaces;
  80 extern const struct brw_tracked_state brw_gs_abo_surfaces;
  81 extern const struct brw_tracked_state brw_gs_image_surfaces;
  82 extern const struct brw_tracked_state brw_vs_unit;
  83 extern const struct brw_tracked_state brw_renderbuffer_surfaces;
  84 extern const struct brw_tracked_state brw_renderbuffer_read_surfaces;
  85 extern const struct brw_tracked_state brw_texture_surfaces;
  86 extern const struct brw_tracked_state brw_wm_binding_table;
  87 extern const struct brw_tracked_state brw_gs_binding_table;
  88 extern const struct brw_tracked_state brw_tes_binding_table;
  89 extern const struct brw_tracked_state brw_tcs_binding_table;
  90 extern const struct brw_tracked_state brw_vs_binding_table;
  91 extern const struct brw_tracked_state brw_wm_ubo_surfaces;
  92 extern const struct brw_tracked_state brw_wm_abo_surfaces;
  93 extern const struct brw_tracked_state brw_wm_image_surfaces;
  94 extern const struct brw_tracked_state brw_cs_ubo_surfaces;
  95 extern const struct brw_tracked_state brw_cs_abo_surfaces;
  96 extern const struct brw_tracked_state brw_cs_image_surfaces;
  97 extern const struct brw_tracked_state brw_wm_unit;
  98
  99 extern const struct brw_tracked_state brw_psp_urb_cbs;
 100
 101 extern const struct brw_tracked_state brw_indices;
 102 extern const struct brw_tracked_state brw_index_buffer;
 103 extern const struct brw_tracked_state brw_cs_state;
 104 extern const struct brw_tracked_state gen7_cs_push_constants;
 105 extern const struct brw_tracked_state gen6_binding_table_pointers;
 106 extern const struct brw_tracked_state gen6_gs_binding_table;
 107 extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
 108 extern const struct brw_tracked_state gen6_sampler_state;
 109 extern const struct brw_tracked_state gen6_sol_surface;
 110 extern const struct brw_tracked_state gen6_sf_vp;
 111 extern const struct brw_tracked_state gen6_urb;
 112 extern const struct brw_tracked_state gen7_depthbuffer;
 113 extern const struct brw_tracked_state gen7_l3_state;
 114 extern const struct brw_tracked_state gen7_push_constant_space;
 115 extern const struct brw_tracked_state gen7_urb;
 116 extern const struct brw_tracked_state gen8_index_buffer;
 117 extern const struct brw_tracked_state gen8_pma_fix;
 118 extern const struct brw_tracked_state gen8_vf_topology;
 119 extern const struct brw_tracked_state brw_cs_work_groups_surface;
 120
 121 static inline bool
 122 brw_state_dirty(const struct brw_context *brw,
 123                 GLuint mesa_flags, uint64_t brw_flags)
 124 {
 125    return ((brw->NewGLState & mesa_flags) |
 126            (brw->ctx.NewDriverState & brw_flags)) != 0;
 127 }
 128
 129 /* brw_binding_tables.c */
 130 void brw_upload_binding_table(struct brw_context *brw,
 131                               uint32_t packet_name,
 132                               const struct brw_stage_prog_data *prog_data,
 133                               struct brw_stage_state *stage_state);
 134
 135 /* brw_misc_state.c */
 136 void brw_upload_invariant_state(struct brw_context *brw);
 137 uint32_t
 138 brw_depthbuffer_format(struct brw_context *brw);
 139
 140 void brw_upload_state_base_address(struct brw_context *brw);
 141
 142 /* gen8_depth_state.c */
 143 void gen8_write_pma_stall_bits(struct brw_context *brw,
 144                                uint32_t pma_stall_bits);
 145
 146 /***********************************************************************
 147  * brw_state.c
 148  */
 149 void brw_upload_render_state(struct brw_context *brw);
 150 void brw_render_state_finished(struct brw_context *brw);
 151 void brw_upload_compute_state(struct brw_context *brw);
 152 void brw_compute_state_finished(struct brw_context *brw);
 153 void brw_init_state(struct brw_context *brw);
 154 void brw_destroy_state(struct brw_context *brw);
 155 void brw_emit_select_pipeline(struct brw_context *brw,
 156                               enum brw_pipeline pipeline);
 157
 158 static inline void
 159 brw_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
 160 {
 161    if (unlikely(brw->last_pipeline != pipeline)) {
 162       assert(pipeline < BRW_NUM_PIPELINES);
 163       brw_emit_select_pipeline(brw, pipeline);
 164       brw->last_pipeline = pipeline;
 165    }
 166 }
 167
 168 /***********************************************************************
 169  * brw_program_cache.c
 170  */
 171
 172 void brw_upload_cache(struct brw_cache *cache,
 173                       enum brw_cache_id cache_id,
 174                       const void *key,
 175                       GLuint key_sz,
 176                       const void *data,
 177                       GLuint data_sz,
 178                       const void *aux,
 179                       GLuint aux_sz,
 180                       uint32_t *out_offset, void *out_aux);
 181
 182 bool brw_search_cache(struct brw_cache *cache,
 183                       enum brw_cache_id cache_id,
 184                       const void *key,
 185                       GLuint key_size,
 186                       uint32_t *inout_offset, void *inout_aux);
 187
 188 const void *brw_find_previous_compile(struct brw_cache *cache,
 189                                       enum brw_cache_id cache_id,
 190                                       unsigned program_string_id);
 191
 192 void brw_program_cache_check_size(struct brw_context *brw);
 193
 194 void brw_init_caches( struct brw_context *brw );
 195 void brw_destroy_caches( struct brw_context *brw );
 196
 197 void brw_print_program_cache(struct brw_context *brw);
 198
 199 /***********************************************************************
 200  * brw_state_batch.c
 201  */
 202 #define BRW_BATCH_STRUCT(brw, s) \
 203    intel_batchbuffer_data(brw, (s), sizeof(*(s)), RENDER_RING)
 204
 205 void *brw_state_batch(struct brw_context *brw,
 206                       int size, int alignment, uint32_t *out_offset);
 207 uint32_t brw_state_batch_size(struct brw_context *brw, uint32_t offset);
 208
 209 /* brw_wm_surface_state.c */
 210 void gen4_init_vtable_surface_functions(struct brw_context *brw);
 211 uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 212 uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
 213
 214 uint32_t brw_isl_format_for_mesa_format(mesa_format mesa_format);
 215
 216 GLuint translate_tex_target(GLenum target);
 217
 218 GLuint translate_tex_format(struct brw_context *brw,
 219                             mesa_format mesa_format,
 220                             GLenum srgb_decode);
 221
 222 int brw_get_texture_swizzle(const struct gl_context *ctx,
 223                             const struct gl_texture_object *t);
 224
 225 void brw_emit_buffer_surface_state(struct brw_context *brw,
 226                                    uint32_t *out_offset,
 227                                    struct brw_bo *bo,
 228                                    unsigned buffer_offset,
 229                                    unsigned surface_format,
 230                                    unsigned buffer_size,
 231                                    unsigned pitch,
 232                                    bool rw);
 233
 234 void brw_update_texture_surface(struct gl_context *ctx,
 235                                 unsigned unit, uint32_t *surf_offset,
 236                                 bool for_gather, uint32_t plane);
 237
 238 uint32_t brw_update_renderbuffer_surface(struct brw_context *brw,
 239                                          struct gl_renderbuffer *rb,
 240                                          uint32_t flags, unsigned unit,
 241                                          uint32_t surf_index);
 242
 243 void brw_update_renderbuffer_surfaces(struct brw_context *brw,
 244                                       const struct gl_framebuffer *fb,
 245                                       uint32_t render_target_start,
 246                                       uint32_t *surf_offset);
 247
 248 /* gen7_wm_surface_state.c */
 249 void gen7_check_surface_setup(uint32_t *surf, bool is_render_target);
 250 void gen7_init_vtable_surface_functions(struct brw_context *brw);
 251
 252 /* gen8_surface_state.c */
 253
 254 void gen8_init_vtable_surface_functions(struct brw_context *brw);
 255
 256 /* brw_sampler_state.c */
 257 void brw_emit_sampler_state(struct brw_context *brw,
 258                             uint32_t *sampler_state,
 259                             uint32_t batch_offset_for_sampler_state,
 260                             unsigned min_filter,
 261                             unsigned mag_filter,
 262                             unsigned mip_filter,
 263                             unsigned max_anisotropy,
 264                             unsigned address_rounding,
 265                             unsigned wrap_s,
 266                             unsigned wrap_t,
 267                             unsigned wrap_r,
 268                             unsigned base_level,
 269                             unsigned min_lod,
 270                             unsigned max_lod,
 271                             int lod_bias,
 272                             unsigned shadow_function,
 273                             bool non_normalized_coordinates,
 274                             uint32_t border_color_offset);
 275
 276 /* gen6_surface_state.c */
 277 void gen6_init_vtable_surface_functions(struct brw_context *brw);
 278
 279 /* brw_vs_surface_state.c */
 280 void
 281 brw_upload_pull_constants(struct brw_context *brw,
 282                           GLbitfield64 brw_new_constbuf,
 283                           const struct gl_program *prog,
 284                           struct brw_stage_state *stage_state,
 285                           const struct brw_stage_prog_data *prog_data);
 286
 287 /* gen7_vs_state.c */
 288 void
 289 gen7_upload_constant_state(struct brw_context *brw,
 290                            const struct brw_stage_state *stage_state,
 291                            bool active, unsigned opcode);
 292
 293 /* brw_clip.c */
 294 void brw_upload_clip_prog(struct brw_context *brw);
 295
 296 /* brw_sf.c */
 297 void brw_upload_sf_prog(struct brw_context *brw);
 298
 299 bool brw_is_drawing_points(const struct brw_context *brw);
 300 bool brw_is_drawing_lines(const struct brw_context *brw);
 301
 302 /* gen7_l3_state.c */
 303 void
 304 gen7_restore_default_l3_config(struct brw_context *brw);
 305
 306 static inline bool
 307 use_state_point_size(const struct brw_context *brw)
 308 {
 309    const struct gl_context *ctx = &brw->ctx;
 310
 311    /* Section 14.4 (Points) of the OpenGL 4.5 specification says:
 312     *
 313     *    "If program point size mode is enabled, the derived point size is
 314     *     taken from the (potentially clipped) shader built-in gl_PointSize
 315     *     written by:
 316     *
 317     *        * the geometry shader, if active;
 318     *        * the tessellation evaluation shader, if active and no
 319     *          geometry shader is active;
 320     *        * the vertex shader, otherwise
 321     *
 322     *    and clamped to the implementation-dependent point size range.  If
 323     *    the value written to gl_PointSize is less than or equal to zero,
 324     *    or if no value was written to gl_PointSize, results are undefined.
 325     *    If program point size mode is disabled, the derived point size is
 326     *    specified with the command
 327     *
 328     *       void PointSize(float size);
 329     *
 330     *    size specifies the requested size of a point.  The default value
 331     *    is 1.0."
 332     *
 333     * The rules for GLES come from the ES 3.2, OES_geometry_point_size, and
 334     * OES_tessellation_point_size specifications.  To summarize: if the last
 335     * stage before rasterization is a GS or TES, then use gl_PointSize from
 336     * the shader if written.  Otherwise, use 1.0.  If the last stage is a
 337     * vertex shader, use gl_PointSize, or it is undefined.
 338     *
 339     * We can combine these rules into a single condition for both APIs.
 340     * Using the state point size when the last shader stage doesn't write
 341     * gl_PointSize satisfies GL's requirements, as it's undefined.  Because
 342     * ES doesn't have a PointSize() command, the state point size will
 343     * remain 1.0, satisfying the ES default value in the GS/TES case, and
 344     * the VS case (1.0 works for "undefined").  Mesa sets the program point
 345     * mode flag to always-enabled in ES, so we can safely check that, and
 346     * it'll be ignored for ES.
 347     *
 348     * _NEW_PROGRAM | _NEW_POINT
 349     * BRW_NEW_VUE_MAP_GEOM_OUT
 350     */
 351    return (!ctx->VertexProgram.PointSizeEnabled && !ctx->Point._Attenuated) ||
 352           (brw->vue_map_geom_out.slots_valid & VARYING_BIT_PSIZ) == 0;
 353 }
 354
 355 void brw_copy_pipeline_atoms(struct brw_context *brw,
 356                              enum brw_pipeline pipeline,
 357                              const struct brw_tracked_state **atoms,
 358                              int num_atoms);
 359 void gen4_init_atoms(struct brw_context *brw);
 360 void gen45_init_atoms(struct brw_context *brw);
 361 void gen5_init_atoms(struct brw_context *brw);
 362 void gen6_init_atoms(struct brw_context *brw);
 363 void gen7_init_atoms(struct brw_context *brw);
 364 void gen75_init_atoms(struct brw_context *brw);
 365 void gen8_init_atoms(struct brw_context *brw);
 366 void gen9_init_atoms(struct brw_context *brw);
 367
 368 void upload_gs_state_for_tf(struct brw_context *brw);
 369
 370 /* Memory Object Control State:
 371  * Specifying zero for L3 means "uncached in L3", at least on Haswell
 372  * and Baytrail, since there are no PTE flags for setting L3 cacheability.
 373  * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
 374  * may still respect that.
 375  */
 376 #define GEN7_MOCS_L3                    1
 377
 378 /* Ivybridge only: cache in LLC.
 379  * Specifying zero here means to use the PTE values set by the kernel;
 380  * non-zero overrides the PTE values.
 381  */
 382 #define IVB_MOCS_LLC                    (1 << 1)
 383
 384 /* Baytrail only: snoop in CPU cache */
 385 #define BYT_MOCS_SNOOP                  (1 << 1)
 386
 387 /* Haswell only: LLC/eLLC controls (write-back or uncached).
 388  * Specifying zero here means to use the PTE values set by the kernel,
 389  * which is useful since it offers additional control (write-through
 390  * cacheing and age).  Non-zero overrides the PTE values.
 391  */
 392 #define HSW_MOCS_UC_LLC_UC_ELLC         (1 << 1)
 393 #define HSW_MOCS_WB_LLC_WB_ELLC         (2 << 1)
 394 #define HSW_MOCS_UC_LLC_WB_ELLC         (3 << 1)
 395
 396 /* Broadwell: these defines always use all available caches (L3, LLC, eLLC),
 397  * and let you force write-back (WB) or write-through (WT) caching, or leave
 398  * it up to the page table entry (PTE) specified by the kernel.
 399  */
 400 #define BDW_MOCS_WB  0x78
 401 #define BDW_MOCS_WT  0x58
 402 #define BDW_MOCS_PTE 0x18
 403
 404 /* Skylake: MOCS is now an index into an array of 62 different caching
 405  * configurations programmed by the kernel.
 406  */
 407 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 408 #define SKL_MOCS_WB  (2 << 1)
 409 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 410 #define SKL_MOCS_PTE (1 << 1)
 411
 412 #ifdef __cplusplus
 413 }
 414 #endif
 415
 416 #endif