src/mesa/drivers/dri/i965/brw_state.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_STATE_H
  34 #define BRW_STATE_H
  35
  36 #include "brw_context.h"
  37
  38 #ifdef __cplusplus
  39 extern "C" {
  40 #endif
  41
  42 enum intel_msaa_layout;
  43
  44 extern const struct brw_tracked_state brw_blend_constant_color;
  45 extern const struct brw_tracked_state brw_cc_unit;
  46 extern const struct brw_tracked_state brw_clip_unit;
  47 extern const struct brw_tracked_state brw_vs_pull_constants;
  48 extern const struct brw_tracked_state brw_tcs_pull_constants;
  49 extern const struct brw_tracked_state brw_tes_pull_constants;
  50 extern const struct brw_tracked_state brw_gs_pull_constants;
  51 extern const struct brw_tracked_state brw_wm_pull_constants;
  52 extern const struct brw_tracked_state brw_cs_pull_constants;
  53 extern const struct brw_tracked_state brw_constant_buffer;
  54 extern const struct brw_tracked_state brw_curbe_offsets;
  55 extern const struct brw_tracked_state brw_invariant_state;
  56 extern const struct brw_tracked_state brw_fs_samplers;
  57 extern const struct brw_tracked_state brw_gs_unit;
  58 extern const struct brw_tracked_state brw_binding_table_pointers;
  59 extern const struct brw_tracked_state brw_depthbuffer;
  60 extern const struct brw_tracked_state brw_recalculate_urb_fence;
  61 extern const struct brw_tracked_state brw_sf_unit;
  62 extern const struct brw_tracked_state brw_sf_vp;
  63 extern const struct brw_tracked_state brw_vs_samplers;
  64 extern const struct brw_tracked_state brw_tcs_samplers;
  65 extern const struct brw_tracked_state brw_tes_samplers;
  66 extern const struct brw_tracked_state brw_gs_samplers;
  67 extern const struct brw_tracked_state brw_cs_samplers;
  68 extern const struct brw_tracked_state brw_cs_texture_surfaces;
  69 extern const struct brw_tracked_state brw_vs_ubo_surfaces;
  70 extern const struct brw_tracked_state brw_vs_abo_surfaces;
  71 extern const struct brw_tracked_state brw_vs_image_surfaces;
  72 extern const struct brw_tracked_state brw_tcs_ubo_surfaces;
  73 extern const struct brw_tracked_state brw_tcs_abo_surfaces;
  74 extern const struct brw_tracked_state brw_tcs_image_surfaces;
  75 extern const struct brw_tracked_state brw_tes_ubo_surfaces;
  76 extern const struct brw_tracked_state brw_tes_abo_surfaces;
  77 extern const struct brw_tracked_state brw_tes_image_surfaces;
  78 extern const struct brw_tracked_state brw_gs_ubo_surfaces;
  79 extern const struct brw_tracked_state brw_gs_abo_surfaces;
  80 extern const struct brw_tracked_state brw_gs_image_surfaces;
  81 extern const struct brw_tracked_state brw_renderbuffer_surfaces;
  82 extern const struct brw_tracked_state brw_renderbuffer_read_surfaces;
  83 extern const struct brw_tracked_state brw_texture_surfaces;
  84 extern const struct brw_tracked_state brw_wm_binding_table;
  85 extern const struct brw_tracked_state brw_gs_binding_table;
  86 extern const struct brw_tracked_state brw_tes_binding_table;
  87 extern const struct brw_tracked_state brw_tcs_binding_table;
  88 extern const struct brw_tracked_state brw_vs_binding_table;
  89 extern const struct brw_tracked_state brw_wm_ubo_surfaces;
  90 extern const struct brw_tracked_state brw_wm_abo_surfaces;
  91 extern const struct brw_tracked_state brw_wm_image_surfaces;
  92 extern const struct brw_tracked_state brw_cs_ubo_surfaces;
  93 extern const struct brw_tracked_state brw_cs_abo_surfaces;
  94 extern const struct brw_tracked_state brw_cs_image_surfaces;
  95 extern const struct brw_tracked_state brw_wm_unit;
  96
  97 extern const struct brw_tracked_state brw_psp_urb_cbs;
  98
  99 extern const struct brw_tracked_state brw_indices;
 100 extern const struct brw_tracked_state brw_index_buffer;
 101 extern const struct brw_tracked_state gen7_cs_push_constants;
 102 extern const struct brw_tracked_state gen6_binding_table_pointers;
 103 extern const struct brw_tracked_state gen6_gs_binding_table;
 104 extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
 105 extern const struct brw_tracked_state gen6_sampler_state;
 106 extern const struct brw_tracked_state gen6_sol_surface;
 107 extern const struct brw_tracked_state gen6_sf_vp;
 108 extern const struct brw_tracked_state gen6_urb;
 109 extern const struct brw_tracked_state gen7_depthbuffer;
 110 extern const struct brw_tracked_state gen7_l3_state;
 111 extern const struct brw_tracked_state gen7_push_constant_space;
 112 extern const struct brw_tracked_state gen7_urb;
 113 extern const struct brw_tracked_state gen8_pma_fix;
 114 extern const struct brw_tracked_state brw_cs_work_groups_surface;
 115
 116 static inline bool
 117 brw_state_dirty(const struct brw_context *brw,
 118                 GLuint mesa_flags, uint64_t brw_flags)
 119 {
 120    return ((brw->NewGLState & mesa_flags) |
 121            (brw->ctx.NewDriverState & brw_flags)) != 0;
 122 }
 123
 124 /* brw_binding_tables.c */
 125 void brw_upload_binding_table(struct brw_context *brw,
 126                               uint32_t packet_name,
 127                               const struct brw_stage_prog_data *prog_data,
 128                               struct brw_stage_state *stage_state);
 129
 130 /* brw_misc_state.c */
 131 void brw_upload_invariant_state(struct brw_context *brw);
 132 uint32_t
 133 brw_depthbuffer_format(struct brw_context *brw);
 134
 135 void brw_upload_state_base_address(struct brw_context *brw);
 136
 137 /* gen8_depth_state.c */
 138 void gen8_write_pma_stall_bits(struct brw_context *brw,
 139                                uint32_t pma_stall_bits);
 140
 141 /***********************************************************************
 142  * brw_state.c
 143  */
 144 void brw_upload_render_state(struct brw_context *brw);
 145 void brw_render_state_finished(struct brw_context *brw);
 146 void brw_upload_compute_state(struct brw_context *brw);
 147 void brw_compute_state_finished(struct brw_context *brw);
 148 void brw_init_state(struct brw_context *brw);
 149 void brw_destroy_state(struct brw_context *brw);
 150 void brw_emit_select_pipeline(struct brw_context *brw,
 151                               enum brw_pipeline pipeline);
 152
 153 static inline void
 154 brw_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
 155 {
 156    if (unlikely(brw->last_pipeline != pipeline)) {
 157       assert(pipeline < BRW_NUM_PIPELINES);
 158       brw_emit_select_pipeline(brw, pipeline);
 159       brw->last_pipeline = pipeline;
 160    }
 161 }
 162
 163 /***********************************************************************
 164  * brw_program_cache.c
 165  */
 166
 167 void brw_upload_cache(struct brw_cache *cache,
 168                       enum brw_cache_id cache_id,
 169                       const void *key,
 170                       GLuint key_sz,
 171                       const void *data,
 172                       GLuint data_sz,
 173                       const void *aux,
 174                       GLuint aux_sz,
 175                       uint32_t *out_offset, void *out_aux);
 176
 177 bool brw_search_cache(struct brw_cache *cache,
 178                       enum brw_cache_id cache_id,
 179                       const void *key,
 180                       GLuint key_size,
 181                       uint32_t *inout_offset, void *inout_aux);
 182
 183 const void *brw_find_previous_compile(struct brw_cache *cache,
 184                                       enum brw_cache_id cache_id,
 185                                       unsigned program_string_id);
 186
 187 void brw_program_cache_check_size(struct brw_context *brw);
 188
 189 void brw_init_caches( struct brw_context *brw );
 190 void brw_destroy_caches( struct brw_context *brw );
 191
 192 void brw_print_program_cache(struct brw_context *brw);
 193
 194 /***********************************************************************
 195  * brw_state_batch.c
 196  */
 197 #define BRW_BATCH_STRUCT(brw, s) \
 198    intel_batchbuffer_data(brw, (s), sizeof(*(s)), RENDER_RING)
 199
 200 void *brw_state_batch(struct brw_context *brw,
 201                       int size, int alignment, uint32_t *out_offset);
 202 uint32_t brw_state_batch_size(struct brw_context *brw, uint32_t offset);
 203
 204 /* brw_wm_surface_state.c */
 205 void gen4_init_vtable_surface_functions(struct brw_context *brw);
 206 uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 207 uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
 208 enum isl_format brw_isl_format_for_mesa_format(mesa_format mesa_format);
 209
 210 GLuint translate_tex_target(GLenum target);
 211
 212 GLuint translate_tex_format(struct brw_context *brw,
 213                             mesa_format mesa_format,
 214                             GLenum srgb_decode);
 215
 216 int brw_get_texture_swizzle(const struct gl_context *ctx,
 217                             const struct gl_texture_object *t);
 218
 219 void brw_emit_buffer_surface_state(struct brw_context *brw,
 220                                    uint32_t *out_offset,
 221                                    struct brw_bo *bo,
 222                                    unsigned buffer_offset,
 223                                    unsigned surface_format,
 224                                    unsigned buffer_size,
 225                                    unsigned pitch,
 226                                    bool rw);
 227
 228 void brw_update_texture_surface(struct gl_context *ctx,
 229                                 unsigned unit, uint32_t *surf_offset,
 230                                 bool for_gather, uint32_t plane);
 231
 232 uint32_t brw_update_renderbuffer_surface(struct brw_context *brw,
 233                                          struct gl_renderbuffer *rb,
 234                                          uint32_t flags, unsigned unit,
 235                                          uint32_t surf_index);
 236
 237 void brw_update_renderbuffer_surfaces(struct brw_context *brw,
 238                                       const struct gl_framebuffer *fb,
 239                                       uint32_t render_target_start,
 240                                       uint32_t *surf_offset);
 241
 242 /* gen7_wm_surface_state.c */
 243 void gen7_check_surface_setup(uint32_t *surf, bool is_render_target);
 244 void gen7_init_vtable_surface_functions(struct brw_context *brw);
 245
 246 /* gen8_surface_state.c */
 247
 248 void gen8_init_vtable_surface_functions(struct brw_context *brw);
 249
 250 /* brw_sampler_state.c */
 251 void brw_emit_sampler_state(struct brw_context *brw,
 252                             uint32_t *sampler_state,
 253                             uint32_t batch_offset_for_sampler_state,
 254                             unsigned min_filter,
 255                             unsigned mag_filter,
 256                             unsigned mip_filter,
 257                             unsigned max_anisotropy,
 258                             unsigned address_rounding,
 259                             unsigned wrap_s,
 260                             unsigned wrap_t,
 261                             unsigned wrap_r,
 262                             unsigned base_level,
 263                             unsigned min_lod,
 264                             unsigned max_lod,
 265                             int lod_bias,
 266                             unsigned shadow_function,
 267                             bool non_normalized_coordinates,
 268                             uint32_t border_color_offset);
 269
 270 /* gen6_surface_state.c */
 271 void gen6_init_vtable_surface_functions(struct brw_context *brw);
 272
 273 /* brw_vs_surface_state.c */
 274 void
 275 brw_upload_pull_constants(struct brw_context *brw,
 276                           GLbitfield64 brw_new_constbuf,
 277                           const struct gl_program *prog,
 278                           struct brw_stage_state *stage_state,
 279                           const struct brw_stage_prog_data *prog_data);
 280
 281 /* gen7_vs_state.c */
 282 void
 283 gen7_upload_constant_state(struct brw_context *brw,
 284                            const struct brw_stage_state *stage_state,
 285                            bool active, unsigned opcode);
 286
 287 /* brw_clip.c */
 288 void brw_upload_clip_prog(struct brw_context *brw);
 289
 290 /* brw_sf.c */
 291 void brw_upload_sf_prog(struct brw_context *brw);
 292
 293 bool brw_is_drawing_points(const struct brw_context *brw);
 294 bool brw_is_drawing_lines(const struct brw_context *brw);
 295
 296 /* gen7_l3_state.c */
 297 void
 298 gen7_restore_default_l3_config(struct brw_context *brw);
 299
 300 static inline bool
 301 use_state_point_size(const struct brw_context *brw)
 302 {
 303    const struct gl_context *ctx = &brw->ctx;
 304
 305    /* Section 14.4 (Points) of the OpenGL 4.5 specification says:
 306     *
 307     *    "If program point size mode is enabled, the derived point size is
 308     *     taken from the (potentially clipped) shader built-in gl_PointSize
 309     *     written by:
 310     *
 311     *        * the geometry shader, if active;
 312     *        * the tessellation evaluation shader, if active and no
 313     *          geometry shader is active;
 314     *        * the vertex shader, otherwise
 315     *
 316     *    and clamped to the implementation-dependent point size range.  If
 317     *    the value written to gl_PointSize is less than or equal to zero,
 318     *    or if no value was written to gl_PointSize, results are undefined.
 319     *    If program point size mode is disabled, the derived point size is
 320     *    specified with the command
 321     *
 322     *       void PointSize(float size);
 323     *
 324     *    size specifies the requested size of a point.  The default value
 325     *    is 1.0."
 326     *
 327     * The rules for GLES come from the ES 3.2, OES_geometry_point_size, and
 328     * OES_tessellation_point_size specifications.  To summarize: if the last
 329     * stage before rasterization is a GS or TES, then use gl_PointSize from
 330     * the shader if written.  Otherwise, use 1.0.  If the last stage is a
 331     * vertex shader, use gl_PointSize, or it is undefined.
 332     *
 333     * We can combine these rules into a single condition for both APIs.
 334     * Using the state point size when the last shader stage doesn't write
 335     * gl_PointSize satisfies GL's requirements, as it's undefined.  Because
 336     * ES doesn't have a PointSize() command, the state point size will
 337     * remain 1.0, satisfying the ES default value in the GS/TES case, and
 338     * the VS case (1.0 works for "undefined").  Mesa sets the program point
 339     * mode flag to always-enabled in ES, so we can safely check that, and
 340     * it'll be ignored for ES.
 341     *
 342     * _NEW_PROGRAM | _NEW_POINT
 343     * BRW_NEW_VUE_MAP_GEOM_OUT
 344     */
 345    return (!ctx->VertexProgram.PointSizeEnabled && !ctx->Point._Attenuated) ||
 346           (brw->vue_map_geom_out.slots_valid & VARYING_BIT_PSIZ) == 0;
 347 }
 348
 349 void brw_copy_pipeline_atoms(struct brw_context *brw,
 350                              enum brw_pipeline pipeline,
 351                              const struct brw_tracked_state **atoms,
 352                              int num_atoms);
 353 void gen4_init_atoms(struct brw_context *brw);
 354 void gen45_init_atoms(struct brw_context *brw);
 355 void gen5_init_atoms(struct brw_context *brw);
 356 void gen6_init_atoms(struct brw_context *brw);
 357 void gen7_init_atoms(struct brw_context *brw);
 358 void gen75_init_atoms(struct brw_context *brw);
 359 void gen8_init_atoms(struct brw_context *brw);
 360 void gen9_init_atoms(struct brw_context *brw);
 361
 362 void upload_gs_state_for_tf(struct brw_context *brw);
 363
 364 /* Memory Object Control State:
 365  * Specifying zero for L3 means "uncached in L3", at least on Haswell
 366  * and Baytrail, since there are no PTE flags for setting L3 cacheability.
 367  * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
 368  * may still respect that.
 369  */
 370 #define GEN7_MOCS_L3                    1
 371
 372 /* Ivybridge only: cache in LLC.
 373  * Specifying zero here means to use the PTE values set by the kernel;
 374  * non-zero overrides the PTE values.
 375  */
 376 #define IVB_MOCS_LLC                    (1 << 1)
 377
 378 /* Baytrail only: snoop in CPU cache */
 379 #define BYT_MOCS_SNOOP                  (1 << 1)
 380
 381 /* Haswell only: LLC/eLLC controls (write-back or uncached).
 382  * Specifying zero here means to use the PTE values set by the kernel,
 383  * which is useful since it offers additional control (write-through
 384  * cacheing and age).  Non-zero overrides the PTE values.
 385  */
 386 #define HSW_MOCS_UC_LLC_UC_ELLC         (1 << 1)
 387 #define HSW_MOCS_WB_LLC_WB_ELLC         (2 << 1)
 388 #define HSW_MOCS_UC_LLC_WB_ELLC         (3 << 1)
 389
 390 /* Broadwell: these defines always use all available caches (L3, LLC, eLLC),
 391  * and let you force write-back (WB) or write-through (WT) caching, or leave
 392  * it up to the page table entry (PTE) specified by the kernel.
 393  */
 394 #define BDW_MOCS_WB  0x78
 395 #define BDW_MOCS_WT  0x58
 396 #define BDW_MOCS_PTE 0x18
 397
 398 /* Skylake: MOCS is now an index into an array of 62 different caching
 399  * configurations programmed by the kernel.
 400  */
 401 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 402 #define SKL_MOCS_WB  (2 << 1)
 403 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 404 #define SKL_MOCS_PTE (1 << 1)
 405
 406 #ifdef __cplusplus
 407 }
 408 #endif
 409
 410 #endif