src/mesa/drivers/dri/i965/brw_state.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_STATE_H
  34 #define BRW_STATE_H
  35
  36 #include "brw_context.h"
  37
  38 #ifdef __cplusplus
  39 extern "C" {
  40 #endif
  41
  42 enum intel_msaa_layout;
  43
  44 extern const struct brw_tracked_state brw_blend_constant_color;
  45 extern const struct brw_tracked_state brw_cc_unit;
  46 extern const struct brw_tracked_state brw_clip_unit;
  47 extern const struct brw_tracked_state brw_vs_pull_constants;
  48 extern const struct brw_tracked_state brw_tcs_pull_constants;
  49 extern const struct brw_tracked_state brw_tes_pull_constants;
  50 extern const struct brw_tracked_state brw_gs_pull_constants;
  51 extern const struct brw_tracked_state brw_wm_pull_constants;
  52 extern const struct brw_tracked_state brw_cs_pull_constants;
  53 extern const struct brw_tracked_state brw_constant_buffer;
  54 extern const struct brw_tracked_state brw_curbe_offsets;
  55 extern const struct brw_tracked_state brw_invariant_state;
  56 extern const struct brw_tracked_state brw_gs_unit;
  57 extern const struct brw_tracked_state brw_binding_table_pointers;
  58 extern const struct brw_tracked_state brw_depthbuffer;
  59 extern const struct brw_tracked_state brw_recalculate_urb_fence;
  60 extern const struct brw_tracked_state brw_sf_vp;
  61 extern const struct brw_tracked_state brw_vs_samplers;
  62 extern const struct brw_tracked_state brw_tcs_samplers;
  63 extern const struct brw_tracked_state brw_tes_samplers;
  64 extern const struct brw_tracked_state brw_gs_samplers;
  65 extern const struct brw_tracked_state brw_cs_samplers;
  66 extern const struct brw_tracked_state brw_cs_texture_surfaces;
  67 extern const struct brw_tracked_state brw_vs_ubo_surfaces;
  68 extern const struct brw_tracked_state brw_vs_abo_surfaces;
  69 extern const struct brw_tracked_state brw_vs_image_surfaces;
  70 extern const struct brw_tracked_state brw_tcs_ubo_surfaces;
  71 extern const struct brw_tracked_state brw_tcs_abo_surfaces;
  72 extern const struct brw_tracked_state brw_tcs_image_surfaces;
  73 extern const struct brw_tracked_state brw_tes_ubo_surfaces;
  74 extern const struct brw_tracked_state brw_tes_abo_surfaces;
  75 extern const struct brw_tracked_state brw_tes_image_surfaces;
  76 extern const struct brw_tracked_state brw_gs_ubo_surfaces;
  77 extern const struct brw_tracked_state brw_gs_abo_surfaces;
  78 extern const struct brw_tracked_state brw_gs_image_surfaces;
  79 extern const struct brw_tracked_state brw_renderbuffer_surfaces;
  80 extern const struct brw_tracked_state brw_renderbuffer_read_surfaces;
  81 extern const struct brw_tracked_state brw_texture_surfaces;
  82 extern const struct brw_tracked_state brw_wm_binding_table;
  83 extern const struct brw_tracked_state brw_gs_binding_table;
  84 extern const struct brw_tracked_state brw_tes_binding_table;
  85 extern const struct brw_tracked_state brw_tcs_binding_table;
  86 extern const struct brw_tracked_state brw_vs_binding_table;
  87 extern const struct brw_tracked_state brw_wm_ubo_surfaces;
  88 extern const struct brw_tracked_state brw_wm_abo_surfaces;
  89 extern const struct brw_tracked_state brw_wm_image_surfaces;
  90 extern const struct brw_tracked_state brw_cs_ubo_surfaces;
  91 extern const struct brw_tracked_state brw_cs_abo_surfaces;
  92 extern const struct brw_tracked_state brw_cs_image_surfaces;
  93 extern const struct brw_tracked_state brw_wm_unit;
  94
  95 extern const struct brw_tracked_state brw_psp_urb_cbs;
  96
  97 extern const struct brw_tracked_state brw_indices;
  98 extern const struct brw_tracked_state brw_index_buffer;
  99 extern const struct brw_tracked_state gen7_cs_push_constants;
 100 extern const struct brw_tracked_state gen6_binding_table_pointers;
 101 extern const struct brw_tracked_state gen6_gs_binding_table;
 102 extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
 103 extern const struct brw_tracked_state gen6_sampler_state;
 104 extern const struct brw_tracked_state gen6_sol_surface;
 105 extern const struct brw_tracked_state gen6_sf_vp;
 106 extern const struct brw_tracked_state gen6_urb;
 107 extern const struct brw_tracked_state gen7_depthbuffer;
 108 extern const struct brw_tracked_state gen7_l3_state;
 109 extern const struct brw_tracked_state gen7_push_constant_space;
 110 extern const struct brw_tracked_state gen7_urb;
 111 extern const struct brw_tracked_state gen8_pma_fix;
 112 extern const struct brw_tracked_state brw_cs_work_groups_surface;
 113
 114 static inline bool
 115 brw_state_dirty(const struct brw_context *brw,
 116                 GLuint mesa_flags, uint64_t brw_flags)
 117 {
 118    return ((brw->NewGLState & mesa_flags) |
 119            (brw->ctx.NewDriverState & brw_flags)) != 0;
 120 }
 121
 122 /* brw_binding_tables.c */
 123 void brw_upload_binding_table(struct brw_context *brw,
 124                               uint32_t packet_name,
 125                               const struct brw_stage_prog_data *prog_data,
 126                               struct brw_stage_state *stage_state);
 127
 128 /* brw_misc_state.c */
 129 void brw_upload_invariant_state(struct brw_context *brw);
 130 uint32_t
 131 brw_depthbuffer_format(struct brw_context *brw);
 132
 133 uint32_t
 134 brw_convert_depth_value(mesa_format format, float value);
 135
 136 void brw_upload_state_base_address(struct brw_context *brw);
 137
 138 /* gen8_depth_state.c */
 139 void gen8_write_pma_stall_bits(struct brw_context *brw,
 140                                uint32_t pma_stall_bits);
 141
 142 /***********************************************************************
 143  * brw_state.c
 144  */
 145 void brw_upload_render_state(struct brw_context *brw);
 146 void brw_render_state_finished(struct brw_context *brw);
 147 void brw_upload_compute_state(struct brw_context *brw);
 148 void brw_compute_state_finished(struct brw_context *brw);
 149 void brw_init_state(struct brw_context *brw);
 150 void brw_destroy_state(struct brw_context *brw);
 151 void brw_emit_select_pipeline(struct brw_context *brw,
 152                               enum brw_pipeline pipeline);
 153
 154 static inline void
 155 brw_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
 156 {
 157    if (unlikely(brw->last_pipeline != pipeline)) {
 158       assert(pipeline < BRW_NUM_PIPELINES);
 159       brw_emit_select_pipeline(brw, pipeline);
 160       brw->last_pipeline = pipeline;
 161    }
 162 }
 163
 164 /***********************************************************************
 165  * brw_program_cache.c
 166  */
 167
 168 void brw_upload_cache(struct brw_cache *cache,
 169                       enum brw_cache_id cache_id,
 170                       const void *key,
 171                       GLuint key_sz,
 172                       const void *data,
 173                       GLuint data_sz,
 174                       const void *aux,
 175                       GLuint aux_sz,
 176                       uint32_t *out_offset, void *out_aux);
 177
 178 bool brw_search_cache(struct brw_cache *cache,
 179                       enum brw_cache_id cache_id,
 180                       const void *key,
 181                       GLuint key_size,
 182                       uint32_t *inout_offset, void *inout_aux);
 183
 184 const void *brw_find_previous_compile(struct brw_cache *cache,
 185                                       enum brw_cache_id cache_id,
 186                                       unsigned program_string_id);
 187
 188 void brw_program_cache_check_size(struct brw_context *brw);
 189
 190 void brw_init_caches( struct brw_context *brw );
 191 void brw_destroy_caches( struct brw_context *brw );
 192
 193 void brw_print_program_cache(struct brw_context *brw);
 194
 195 /***********************************************************************
 196  * brw_state_batch.c
 197  */
 198 #define BRW_BATCH_STRUCT(brw, s) \
 199    intel_batchbuffer_data(brw, (s), sizeof(*(s)), RENDER_RING)
 200
 201 void *brw_state_batch(struct brw_context *brw,
 202                       int size, int alignment, uint32_t *out_offset);
 203 uint32_t brw_state_batch_size(struct brw_context *brw, uint32_t offset);
 204
 205 /* brw_wm_surface_state.c */
 206 void gen4_init_vtable_surface_functions(struct brw_context *brw);
 207 uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 208 uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
 209 enum isl_format brw_isl_format_for_mesa_format(mesa_format mesa_format);
 210
 211 GLuint translate_tex_target(GLenum target);
 212
 213 enum isl_format translate_tex_format(struct brw_context *brw,
 214                                      mesa_format mesa_format,
 215                                      GLenum srgb_decode);
 216
 217 int brw_get_texture_swizzle(const struct gl_context *ctx,
 218                             const struct gl_texture_object *t);
 219
 220 void brw_emit_buffer_surface_state(struct brw_context *brw,
 221                                    uint32_t *out_offset,
 222                                    struct brw_bo *bo,
 223                                    unsigned buffer_offset,
 224                                    unsigned surface_format,
 225                                    unsigned buffer_size,
 226                                    unsigned pitch,
 227                                    bool rw);
 228
 229 void brw_update_texture_surface(struct gl_context *ctx,
 230                                 unsigned unit, uint32_t *surf_offset,
 231                                 bool for_gather, uint32_t plane);
 232
 233 uint32_t brw_update_renderbuffer_surface(struct brw_context *brw,
 234                                          struct gl_renderbuffer *rb,
 235                                          uint32_t flags, unsigned unit,
 236                                          uint32_t surf_index);
 237
 238 void brw_update_renderbuffer_surfaces(struct brw_context *brw,
 239                                       const struct gl_framebuffer *fb,
 240                                       uint32_t render_target_start,
 241                                       uint32_t *surf_offset);
 242
 243 /* gen7_wm_surface_state.c */
 244 void gen7_check_surface_setup(uint32_t *surf, bool is_render_target);
 245 void gen7_init_vtable_surface_functions(struct brw_context *brw);
 246
 247 /* gen8_surface_state.c */
 248
 249 void gen8_init_vtable_surface_functions(struct brw_context *brw);
 250
 251 /* brw_sampler_state.c */
 252 void brw_emit_sampler_state(struct brw_context *brw,
 253                             uint32_t *sampler_state,
 254                             uint32_t batch_offset_for_sampler_state,
 255                             unsigned min_filter,
 256                             unsigned mag_filter,
 257                             unsigned mip_filter,
 258                             unsigned max_anisotropy,
 259                             unsigned address_rounding,
 260                             unsigned wrap_s,
 261                             unsigned wrap_t,
 262                             unsigned wrap_r,
 263                             unsigned base_level,
 264                             unsigned min_lod,
 265                             unsigned max_lod,
 266                             int lod_bias,
 267                             unsigned shadow_function,
 268                             bool non_normalized_coordinates,
 269                             uint32_t border_color_offset);
 270
 271 /* gen6_surface_state.c */
 272 void gen6_init_vtable_surface_functions(struct brw_context *brw);
 273
 274 /* brw_vs_surface_state.c */
 275 void
 276 brw_upload_pull_constants(struct brw_context *brw,
 277                           GLbitfield64 brw_new_constbuf,
 278                           const struct gl_program *prog,
 279                           struct brw_stage_state *stage_state,
 280                           const struct brw_stage_prog_data *prog_data);
 281
 282 /* gen7_vs_state.c */
 283 void
 284 gen7_upload_constant_state(struct brw_context *brw,
 285                            const struct brw_stage_state *stage_state,
 286                            bool active, unsigned opcode);
 287
 288 /* brw_clip.c */
 289 void brw_upload_clip_prog(struct brw_context *brw);
 290
 291 /* brw_sf.c */
 292 void brw_upload_sf_prog(struct brw_context *brw);
 293
 294 bool brw_is_drawing_points(const struct brw_context *brw);
 295 bool brw_is_drawing_lines(const struct brw_context *brw);
 296
 297 /* gen7_l3_state.c */
 298 void
 299 gen7_restore_default_l3_config(struct brw_context *brw);
 300
 301 static inline bool
 302 use_state_point_size(const struct brw_context *brw)
 303 {
 304    const struct gl_context *ctx = &brw->ctx;
 305
 306    /* Section 14.4 (Points) of the OpenGL 4.5 specification says:
 307     *
 308     *    "If program point size mode is enabled, the derived point size is
 309     *     taken from the (potentially clipped) shader built-in gl_PointSize
 310     *     written by:
 311     *
 312     *        * the geometry shader, if active;
 313     *        * the tessellation evaluation shader, if active and no
 314     *          geometry shader is active;
 315     *        * the vertex shader, otherwise
 316     *
 317     *    and clamped to the implementation-dependent point size range.  If
 318     *    the value written to gl_PointSize is less than or equal to zero,
 319     *    or if no value was written to gl_PointSize, results are undefined.
 320     *    If program point size mode is disabled, the derived point size is
 321     *    specified with the command
 322     *
 323     *       void PointSize(float size);
 324     *
 325     *    size specifies the requested size of a point.  The default value
 326     *    is 1.0."
 327     *
 328     * The rules for GLES come from the ES 3.2, OES_geometry_point_size, and
 329     * OES_tessellation_point_size specifications.  To summarize: if the last
 330     * stage before rasterization is a GS or TES, then use gl_PointSize from
 331     * the shader if written.  Otherwise, use 1.0.  If the last stage is a
 332     * vertex shader, use gl_PointSize, or it is undefined.
 333     *
 334     * We can combine these rules into a single condition for both APIs.
 335     * Using the state point size when the last shader stage doesn't write
 336     * gl_PointSize satisfies GL's requirements, as it's undefined.  Because
 337     * ES doesn't have a PointSize() command, the state point size will
 338     * remain 1.0, satisfying the ES default value in the GS/TES case, and
 339     * the VS case (1.0 works for "undefined").  Mesa sets the program point
 340     * mode flag to always-enabled in ES, so we can safely check that, and
 341     * it'll be ignored for ES.
 342     *
 343     * _NEW_PROGRAM | _NEW_POINT
 344     * BRW_NEW_VUE_MAP_GEOM_OUT
 345     */
 346    return (!ctx->VertexProgram.PointSizeEnabled && !ctx->Point._Attenuated) ||
 347           (brw->vue_map_geom_out.slots_valid & VARYING_BIT_PSIZ) == 0;
 348 }
 349
 350 void brw_copy_pipeline_atoms(struct brw_context *brw,
 351                              enum brw_pipeline pipeline,
 352                              const struct brw_tracked_state **atoms,
 353                              int num_atoms);
 354 void gen4_init_atoms(struct brw_context *brw);
 355 void gen45_init_atoms(struct brw_context *brw);
 356 void gen5_init_atoms(struct brw_context *brw);
 357 void gen6_init_atoms(struct brw_context *brw);
 358 void gen7_init_atoms(struct brw_context *brw);
 359 void gen75_init_atoms(struct brw_context *brw);
 360 void gen8_init_atoms(struct brw_context *brw);
 361 void gen9_init_atoms(struct brw_context *brw);
 362 void gen10_init_atoms(struct brw_context *brw);
 363
 364 void upload_gs_state_for_tf(struct brw_context *brw);
 365
 366 /* Memory Object Control State:
 367  * Specifying zero for L3 means "uncached in L3", at least on Haswell
 368  * and Baytrail, since there are no PTE flags for setting L3 cacheability.
 369  * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
 370  * may still respect that.
 371  */
 372 #define GEN7_MOCS_L3                    1
 373
 374 /* Ivybridge only: cache in LLC.
 375  * Specifying zero here means to use the PTE values set by the kernel;
 376  * non-zero overrides the PTE values.
 377  */
 378 #define IVB_MOCS_LLC                    (1 << 1)
 379
 380 /* Baytrail only: snoop in CPU cache */
 381 #define BYT_MOCS_SNOOP                  (1 << 1)
 382
 383 /* Haswell only: LLC/eLLC controls (write-back or uncached).
 384  * Specifying zero here means to use the PTE values set by the kernel,
 385  * which is useful since it offers additional control (write-through
 386  * cacheing and age).  Non-zero overrides the PTE values.
 387  */
 388 #define HSW_MOCS_UC_LLC_UC_ELLC         (1 << 1)
 389 #define HSW_MOCS_WB_LLC_WB_ELLC         (2 << 1)
 390 #define HSW_MOCS_UC_LLC_WB_ELLC         (3 << 1)
 391
 392 /* Broadwell: these defines always use all available caches (L3, LLC, eLLC),
 393  * and let you force write-back (WB) or write-through (WT) caching, or leave
 394  * it up to the page table entry (PTE) specified by the kernel.
 395  */
 396 #define BDW_MOCS_WB  0x78
 397 #define BDW_MOCS_WT  0x58
 398 #define BDW_MOCS_PTE 0x18
 399
 400 /* Skylake: MOCS is now an index into an array of 62 different caching
 401  * configurations programmed by the kernel.
 402  */
 403 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 404 #define SKL_MOCS_WB  (2 << 1)
 405 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 406 #define SKL_MOCS_PTE (1 << 1)
 407
 408 /* Cannonlake: MOCS is now an index into an array of 62 different caching
 409  * configurations programmed by the kernel.
 410  */
 411 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
 412 #define CNL_MOCS_WB  (2 << 1)
 413 /* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
 414 #define CNL_MOCS_PTE (1 << 1)
 415
 416 #ifdef __cplusplus
 417 }
 418 #endif
 419
 420 #endif