i965: Remove use of deprecated drm_intel_aub routines
[mesa.git] / src / mesa / drivers / dri / i965 / brw_state_batch.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32 #include "brw_state.h"
33 #include "intel_batchbuffer.h"
34 #include "main/imports.h"
35 #include "util/ralloc.h"
36
37 static void
38 brw_track_state_batch(struct brw_context *brw,
39 enum aub_state_struct_type type,
40 uint32_t offset,
41 int size,
42 int index)
43 {
44 struct intel_batchbuffer *batch = &brw->batch;
45
46 if (!brw->state_batch_list) {
47 /* Our structs are always aligned to at least 32 bytes, so
48 * our array doesn't need to be any larger
49 * TODO: don't use rzalloc
50 */
51 brw->state_batch_list = rzalloc_size(brw, sizeof(*brw->state_batch_list) *
52 batch->bo->size / 32);
53 }
54
55 brw->state_batch_list[brw->state_batch_count].offset = offset;
56 brw->state_batch_list[brw->state_batch_count].size = size;
57 brw->state_batch_list[brw->state_batch_count].type = type;
58 brw->state_batch_list[brw->state_batch_count].index = index;
59 brw->state_batch_count++;
60 }
61
62 /**
63 * Allocates a block of space in the batchbuffer for indirect state.
64 *
65 * We don't want to allocate separate BOs for every bit of indirect
66 * state in the driver. It means overallocating by a significant
67 * margin (4096 bytes, even if the object is just a 20-byte surface
68 * state), and more buffers to walk and count for aperture size checking.
69 *
70 * However, due to the restrictions imposed by the aperture size
71 * checking performance hacks, we can't have the batch point at a
72 * separate indirect state buffer, because once the batch points at
73 * it, no more relocations can be added to it. So, we sneak these
74 * buffers in at the top of the batchbuffer.
75 */
76 void *
77 __brw_state_batch(struct brw_context *brw,
78 enum aub_state_struct_type type,
79 int size,
80 int alignment,
81 int index,
82 uint32_t *out_offset)
83
84 {
85 struct intel_batchbuffer *batch = &brw->batch;
86 uint32_t offset;
87
88 assert(size < batch->bo->size);
89 offset = ROUND_DOWN_TO(batch->state_batch_offset - size, alignment);
90
91 /* If allocating from the top would wrap below the batchbuffer, or
92 * if the batch's used space (plus the reserved pad) collides with our
93 * space, then flush and try again.
94 */
95 if (batch->state_batch_offset < size ||
96 offset < 4 * USED_BATCH(*batch) + batch->reserved_space) {
97 intel_batchbuffer_flush(brw);
98 offset = ROUND_DOWN_TO(batch->state_batch_offset - size, alignment);
99 }
100
101 batch->state_batch_offset = offset;
102
103 if (unlikely(INTEL_DEBUG & DEBUG_BATCH))
104 brw_track_state_batch(brw, type, offset, size, index);
105
106 *out_offset = offset;
107 return batch->map + (offset>>2);
108 }