2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
32 /** @file brw_state_cache.c
34 * This file implements a simple static state cache for 965. The
35 * consumers can query the hash table of state using a cache_id,
36 * opaque key data, and receive the corresponding state buffer object
37 * of state (plus associated auxiliary data) in return. Objects in
38 * the cache may not have relocations (pointers to other BOs) in them.
40 * The inner workings are a simple hash table based on a CRC of the
43 * Replacement is not implemented. Instead, when the cache gets too
44 * big we throw out all of the cache data and let it get regenerated.
47 #include "main/imports.h"
48 #include "intel_batchbuffer.h"
49 #include "brw_state.h"
54 #define FILE_DEBUG_FLAG DEBUG_STATE
57 hash_key(struct brw_cache_item
*item
)
59 GLuint
*ikey
= (GLuint
*)item
->key
;
60 GLuint hash
= item
->cache_id
, i
;
62 assert(item
->key_size
% 4 == 0);
64 /* I'm sure this can be improved on:
66 for (i
= 0; i
< item
->key_size
/4; i
++) {
68 hash
= (hash
<< 5) | (hash
>> 27);
75 brw_cache_item_equals(const struct brw_cache_item
*a
,
76 const struct brw_cache_item
*b
)
78 return a
->cache_id
== b
->cache_id
&&
80 a
->key_size
== b
->key_size
&&
81 (memcmp(a
->key
, b
->key
, a
->key_size
) == 0);
84 static struct brw_cache_item
*
85 search_cache(struct brw_cache
*cache
, GLuint hash
,
86 struct brw_cache_item
*lookup
)
88 struct brw_cache_item
*c
;
93 for (c
= cache
->items
[hash
% cache
->size
]; c
; c
= c
->next
)
96 fprintf(stderr
, "bucket %d/%d = %d/%d items\n", hash
% cache
->size
,
97 cache
->size
, bucketcount
, cache
->n_items
);
100 for (c
= cache
->items
[hash
% cache
->size
]; c
; c
= c
->next
) {
101 if (brw_cache_item_equals(lookup
, c
))
110 rehash(struct brw_cache
*cache
)
112 struct brw_cache_item
**items
;
113 struct brw_cache_item
*c
, *next
;
116 size
= cache
->size
* 3;
117 items
= calloc(1, size
* sizeof(*items
));
119 for (i
= 0; i
< cache
->size
; i
++)
120 for (c
= cache
->items
[i
]; c
; c
= next
) {
122 c
->next
= items
[c
->hash
% size
];
123 items
[c
->hash
% size
] = c
;
127 cache
->items
= items
;
133 * Returns the buffer object matching cache_id and key, or NULL.
136 brw_search_cache(struct brw_cache
*cache
,
137 enum brw_cache_id cache_id
,
138 const void *key
, GLuint key_size
,
139 uint32_t *inout_offset
, void *out_aux
)
141 struct brw_context
*brw
= cache
->brw
;
142 struct brw_cache_item
*item
;
143 struct brw_cache_item lookup
;
146 lookup
.cache_id
= cache_id
;
148 lookup
.key_size
= key_size
;
149 hash
= hash_key(&lookup
);
152 item
= search_cache(cache
, hash
, &lookup
);
157 *(void **)out_aux
= ((char *)item
->key
+ item
->key_size
);
159 if (item
->offset
!= *inout_offset
) {
160 brw
->state
.dirty
.cache
|= (1 << cache_id
);
161 *inout_offset
= item
->offset
;
168 brw_cache_new_bo(struct brw_cache
*cache
, uint32_t new_size
)
170 struct brw_context
*brw
= cache
->brw
;
171 drm_intel_bo
*new_bo
;
173 new_bo
= drm_intel_bo_alloc(brw
->bufmgr
, "program cache", new_size
, 64);
175 /* Copy any existing data that needs to be saved. */
176 if (cache
->next_offset
!= 0) {
177 drm_intel_bo_map(cache
->bo
, false);
178 drm_intel_bo_subdata(new_bo
, 0, cache
->next_offset
, cache
->bo
->virtual);
179 drm_intel_bo_unmap(cache
->bo
);
182 drm_intel_bo_unreference(cache
->bo
);
184 cache
->bo_used_by_gpu
= false;
186 /* Since we have a new BO in place, we need to signal the units
187 * that depend on it (state base address on gen5+, or unit state before).
189 brw
->state
.dirty
.brw
|= BRW_NEW_PROGRAM_CACHE
;
193 * Attempts to find an item in the cache with identical data and aux
197 brw_try_upload_using_copy(struct brw_cache
*cache
,
198 struct brw_cache_item
*result_item
,
203 struct brw_cache_item
*item
;
205 for (i
= 0; i
< cache
->size
; i
++) {
206 for (item
= cache
->items
[i
]; item
; item
= item
->next
) {
207 const void *item_aux
= item
->key
+ item
->key_size
;
210 if (item
->cache_id
!= result_item
->cache_id
||
211 item
->size
!= result_item
->size
||
212 item
->aux_size
!= result_item
->aux_size
) {
216 if (cache
->aux_compare
[result_item
->cache_id
]) {
217 if (!cache
->aux_compare
[result_item
->cache_id
](item_aux
, aux
,
221 } else if (memcmp(item_aux
, aux
, item
->aux_size
) != 0) {
225 drm_intel_bo_map(cache
->bo
, false);
226 ret
= memcmp(cache
->bo
->virtual + item
->offset
, data
, item
->size
);
227 drm_intel_bo_unmap(cache
->bo
);
231 result_item
->offset
= item
->offset
;
241 brw_upload_item_data(struct brw_cache
*cache
,
242 struct brw_cache_item
*item
,
245 /* Allocate space in the cache BO for our new program. */
246 if (cache
->next_offset
+ item
->size
> cache
->bo
->size
) {
247 uint32_t new_size
= cache
->bo
->size
* 2;
249 while (cache
->next_offset
+ item
->size
> new_size
)
252 brw_cache_new_bo(cache
, new_size
);
255 /* If we would block on writing to an in-use program BO, just
258 if (cache
->bo_used_by_gpu
) {
259 brw_cache_new_bo(cache
, cache
->bo
->size
);
262 item
->offset
= cache
->next_offset
;
264 /* Programs are always 64-byte aligned, so set up the next one now */
265 cache
->next_offset
= ALIGN(item
->offset
+ item
->size
, 64);
269 brw_upload_cache(struct brw_cache
*cache
,
270 enum brw_cache_id cache_id
,
277 uint32_t *out_offset
,
280 struct brw_cache_item
*item
= CALLOC_STRUCT(brw_cache_item
);
284 item
->cache_id
= cache_id
;
285 item
->size
= data_size
;
287 item
->key_size
= key_size
;
288 item
->aux_size
= aux_size
;
289 hash
= hash_key(item
);
292 /* If we can find a matching prog/prog_data combo in the cache
293 * already, then reuse the existing stuff. This will mean not
294 * flagging CACHE_NEW_* when transitioning between the two
295 * equivalent hash keys. This is notably useful for programs
296 * generating shaders at runtime, where multiple shaders may
297 * compile to the thing in our backend.
299 if (!brw_try_upload_using_copy(cache
, item
, data
, aux
)) {
300 brw_upload_item_data(cache
, item
, data
);
303 /* Set up the memory containing the key and aux_data */
304 tmp
= malloc(key_size
+ aux_size
);
306 memcpy(tmp
, key
, key_size
);
307 memcpy(tmp
+ key_size
, aux
, aux_size
);
311 if (cache
->n_items
> cache
->size
* 1.5)
315 item
->next
= cache
->items
[hash
];
316 cache
->items
[hash
] = item
;
319 /* Copy data to the buffer */
320 drm_intel_bo_subdata(cache
->bo
, item
->offset
, data_size
, data
);
322 *out_offset
= item
->offset
;
323 *(void **)out_aux
= (void *)((char *)item
->key
+ item
->key_size
);
324 cache
->brw
->state
.dirty
.cache
|= 1 << cache_id
;
328 brw_init_caches(struct brw_context
*brw
)
330 struct brw_cache
*cache
= &brw
->cache
;
337 calloc(1, cache
->size
* sizeof(struct brw_cache_item
*));
339 cache
->bo
= drm_intel_bo_alloc(brw
->bufmgr
,
343 cache
->aux_compare
[BRW_VS_PROG
] = brw_vs_prog_data_compare
;
344 cache
->aux_compare
[BRW_WM_PROG
] = brw_wm_prog_data_compare
;
345 cache
->aux_free
[BRW_VS_PROG
] = brw_vs_prog_data_free
;
346 cache
->aux_free
[BRW_WM_PROG
] = brw_wm_prog_data_free
;
350 brw_clear_cache(struct brw_context
*brw
, struct brw_cache
*cache
)
352 struct brw_cache_item
*c
, *next
;
355 DBG("%s\n", __FUNCTION__
);
357 for (i
= 0; i
< cache
->size
; i
++) {
358 for (c
= cache
->items
[i
]; c
; c
= next
) {
360 if (cache
->aux_free
[c
->cache_id
]) {
361 const void *item_aux
= c
->key
+ c
->key_size
;
362 cache
->aux_free
[c
->cache_id
](item_aux
);
364 free((void *)c
->key
);
367 cache
->items
[i
] = NULL
;
372 /* Start putting programs into the start of the BO again, since
373 * we'll never find the old results.
375 cache
->next_offset
= 0;
377 /* We need to make sure that the programs get regenerated, since
378 * any offsets leftover in brw_context will no longer be valid.
380 brw
->state
.dirty
.mesa
|= ~0;
381 brw
->state
.dirty
.brw
|= ~0;
382 brw
->state
.dirty
.cache
|= ~0;
383 intel_batchbuffer_flush(brw
);
387 brw_state_cache_check_size(struct brw_context
*brw
)
389 /* un-tuned guess. Each object is generally a page, so 2000 of them is 8 MB of
392 if (brw
->cache
.n_items
> 2000) {
393 perf_debug("Exceeded state cache size limit. Clearing the set "
394 "of compiled programs, which will trigger recompiles\n");
395 brw_clear_cache(brw
, &brw
->cache
);
401 brw_destroy_cache(struct brw_context
*brw
, struct brw_cache
*cache
)
404 DBG("%s\n", __FUNCTION__
);
406 drm_intel_bo_unreference(cache
->bo
);
408 brw_clear_cache(brw
, cache
);
416 brw_destroy_caches(struct brw_context
*brw
)
418 brw_destroy_cache(brw
, &brw
->cache
);