2 * Copyright © 2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 #include "main/mtypes.h"
29 #include "intel_batchbuffer.h"
31 #include "brw_context.h"
32 #include "brw_defines.h"
36 batch_out(struct brw_context
*brw
, const char *name
, uint32_t offset
,
37 int index
, char *fmt
, ...) PRINTFLIKE(5, 6);
40 batch_out(struct brw_context
*brw
, const char *name
, uint32_t offset
,
41 int index
, char *fmt
, ...)
43 uint32_t *data
= brw
->batch
.bo
->virtual + offset
;
46 fprintf(stderr
, "0x%08x: 0x%08x: %8s: ",
47 offset
+ index
* 4, data
[index
], name
);
49 vfprintf(stderr
, fmt
, va
);
54 get_965_surfacetype(unsigned int surfacetype
)
56 switch (surfacetype
) {
60 case 3: return "CUBE";
61 case 4: return "BUFFER";
62 case 7: return "NULL";
63 default: return "unknown";
68 get_965_surface_format(unsigned int surface_format
)
70 switch (surface_format
) {
71 case 0x000: return "r32g32b32a32_float";
72 case 0x0c1: return "b8g8r8a8_unorm";
73 case 0x100: return "b5g6r5_unorm";
74 case 0x102: return "b5g5r5a1_unorm";
75 case 0x104: return "b4g4r4a4_unorm";
76 default: return "unknown";
80 static void dump_vs_state(struct brw_context
*brw
, uint32_t offset
)
82 const char *name
= "VS_STATE";
83 struct brw_vs_unit_state
*vs
= brw
->batch
.bo
->virtual + offset
;
85 batch_out(brw
, name
, offset
, 0, "thread0\n");
86 batch_out(brw
, name
, offset
, 1, "thread1\n");
87 batch_out(brw
, name
, offset
, 2, "thread2\n");
88 batch_out(brw
, name
, offset
, 3, "thread3\n");
89 batch_out(brw
, name
, offset
, 4, "thread4: %d threads\n",
90 vs
->thread4
.max_threads
+ 1);
91 batch_out(brw
, name
, offset
, 5, "vs5\n");
92 batch_out(brw
, name
, offset
, 6, "vs6\n");
95 static void dump_gs_state(struct brw_context
*brw
, uint32_t offset
)
97 const char *name
= "GS_STATE";
98 struct brw_gs_unit_state
*gs
= brw
->batch
.bo
->virtual + offset
;
100 batch_out(brw
, name
, offset
, 0, "thread0\n");
101 batch_out(brw
, name
, offset
, 1, "thread1\n");
102 batch_out(brw
, name
, offset
, 2, "thread2\n");
103 batch_out(brw
, name
, offset
, 3, "thread3\n");
104 batch_out(brw
, name
, offset
, 4, "thread4: %d threads\n",
105 gs
->thread4
.max_threads
+ 1);
106 batch_out(brw
, name
, offset
, 5, "vs5\n");
107 batch_out(brw
, name
, offset
, 6, "vs6\n");
110 static void dump_clip_state(struct brw_context
*brw
, uint32_t offset
)
112 const char *name
= "CLIP_STATE";
113 struct brw_clip_unit_state
*clip
= brw
->batch
.bo
->virtual + offset
;
115 batch_out(brw
, name
, offset
, 0, "thread0\n");
116 batch_out(brw
, name
, offset
, 1, "thread1\n");
117 batch_out(brw
, name
, offset
, 2, "thread2\n");
118 batch_out(brw
, name
, offset
, 3, "thread3\n");
119 batch_out(brw
, name
, offset
, 4, "thread4: %d threads\n",
120 clip
->thread4
.max_threads
+ 1);
121 batch_out(brw
, name
, offset
, 5, "clip5\n");
122 batch_out(brw
, name
, offset
, 6, "clip6\n");
123 batch_out(brw
, name
, offset
, 7, "vp xmin %f\n", clip
->viewport_xmin
);
124 batch_out(brw
, name
, offset
, 8, "vp xmax %f\n", clip
->viewport_xmax
);
125 batch_out(brw
, name
, offset
, 9, "vp ymin %f\n", clip
->viewport_ymin
);
126 batch_out(brw
, name
, offset
, 10, "vp ymax %f\n", clip
->viewport_ymax
);
129 static void dump_sf_state(struct brw_context
*brw
, uint32_t offset
)
131 const char *name
= "SF_STATE";
132 struct brw_sf_unit_state
*sf
= brw
->batch
.bo
->virtual + offset
;
134 batch_out(brw
, name
, offset
, 0, "thread0\n");
135 batch_out(brw
, name
, offset
, 1, "thread1\n");
136 batch_out(brw
, name
, offset
, 2, "thread2\n");
137 batch_out(brw
, name
, offset
, 3, "thread3\n");
138 batch_out(brw
, name
, offset
, 4, "thread4: %d threads\n",
139 sf
->thread4
.max_threads
+ 1);
140 batch_out(brw
, name
, offset
, 5, "sf5: viewport offset\n");
141 batch_out(brw
, name
, offset
, 6, "sf6\n");
142 batch_out(brw
, name
, offset
, 7, "sf7\n");
145 static void dump_wm_state(struct brw_context
*brw
, uint32_t offset
)
147 const char *name
= "WM_STATE";
148 struct brw_wm_unit_state
*wm
= brw
->batch
.bo
->virtual + offset
;
150 batch_out(brw
, name
, offset
, 0, "thread0\n");
151 batch_out(brw
, name
, offset
, 1, "thread1\n");
152 batch_out(brw
, name
, offset
, 2, "thread2\n");
153 batch_out(brw
, name
, offset
, 3, "thread3\n");
154 batch_out(brw
, name
, offset
, 4, "wm4\n");
155 batch_out(brw
, name
, offset
, 5, "wm5: %s%s%s%s%s%s, %d threads\n",
156 wm
->wm5
.enable_8_pix
? "8pix" : "",
157 wm
->wm5
.enable_16_pix
? "16pix" : "",
158 wm
->wm5
.program_uses_depth
? ", uses depth" : "",
159 wm
->wm5
.program_computes_depth
? ", computes depth" : "",
160 wm
->wm5
.program_uses_killpixel
? ", kills" : "",
161 wm
->wm5
.thread_dispatch_enable
? "" : ", no dispatch",
162 wm
->wm5
.max_threads
+ 1);
163 batch_out(brw
, name
, offset
, 6, "depth offset constant %f\n",
164 wm
->global_depth_offset_constant
);
165 batch_out(brw
, name
, offset
, 7, "depth offset scale %f\n",
166 wm
->global_depth_offset_scale
);
167 batch_out(brw
, name
, offset
, 8, "wm8: kernel 1 (gen5+)\n");
168 batch_out(brw
, name
, offset
, 9, "wm9: kernel 2 (gen5+)\n");
169 batch_out(brw
, name
, offset
, 10, "wm10: kernel 3 (gen5+)\n");
172 static void dump_surface_state(struct brw_context
*brw
, uint32_t offset
)
174 const char *name
= "SURF";
175 uint32_t *surf
= brw
->batch
.bo
->virtual + offset
;
177 batch_out(brw
, name
, offset
, 0, "%s %s\n",
178 get_965_surfacetype(GET_FIELD(surf
[0], BRW_SURFACE_TYPE
)),
179 get_965_surface_format(GET_FIELD(surf
[0], BRW_SURFACE_FORMAT
)));
180 batch_out(brw
, name
, offset
, 1, "offset\n");
181 batch_out(brw
, name
, offset
, 2, "%dx%d size, %d mips\n",
182 GET_FIELD(surf
[2], BRW_SURFACE_WIDTH
) + 1,
183 GET_FIELD(surf
[2], BRW_SURFACE_HEIGHT
) + 1,
184 GET_FIELD(surf
[2], BRW_SURFACE_LOD
));
185 batch_out(brw
, name
, offset
, 3, "pitch %d, %s tiled\n",
186 GET_FIELD(surf
[3], BRW_SURFACE_PITCH
) + 1,
187 (surf
[3] & BRW_SURFACE_TILED
) ?
188 ((surf
[3] & BRW_SURFACE_TILED_Y
) ? "Y" : "X") : "not");
189 batch_out(brw
, name
, offset
, 4, "mip base %d\n",
190 GET_FIELD(surf
[4], BRW_SURFACE_MIN_LOD
));
191 batch_out(brw
, name
, offset
, 5, "x,y offset: %d,%d\n",
192 GET_FIELD(surf
[5], BRW_SURFACE_X_OFFSET
),
193 GET_FIELD(surf
[5], BRW_SURFACE_Y_OFFSET
));
196 static void dump_gen7_surface_state(struct brw_context
*brw
, uint32_t offset
)
198 const char *name
= "SURF";
199 uint32_t *surf
= brw
->batch
.bo
->virtual + offset
;
201 batch_out(brw
, name
, offset
, 0, "%s %s %s\n",
202 get_965_surfacetype(GET_FIELD(surf
[0], BRW_SURFACE_TYPE
)),
203 get_965_surface_format(GET_FIELD(surf
[0], BRW_SURFACE_FORMAT
)),
204 (surf
[0] & GEN7_SURFACE_IS_ARRAY
) ? "array" : "");
205 batch_out(brw
, name
, offset
, 1, "offset\n");
206 batch_out(brw
, name
, offset
, 2, "%dx%d size, %d mips, %d slices\n",
207 GET_FIELD(surf
[2], GEN7_SURFACE_WIDTH
) + 1,
208 GET_FIELD(surf
[2], GEN7_SURFACE_HEIGHT
) + 1,
209 surf
[5] & INTEL_MASK(3, 0),
210 GET_FIELD(surf
[3], BRW_SURFACE_DEPTH
) + 1);
211 batch_out(brw
, name
, offset
, 3, "pitch %d, %stiled\n",
212 (surf
[3] & INTEL_MASK(17, 0)) + 1,
213 (surf
[0] & (1 << 14)) ? "" : "not ");
214 batch_out(brw
, name
, offset
, 4, "min array element %d, array extent %d\n",
215 GET_FIELD(surf
[4], GEN7_SURFACE_MIN_ARRAY_ELEMENT
),
216 GET_FIELD(surf
[4], GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT
) + 1);
217 batch_out(brw
, name
, offset
, 5, "mip base %d\n",
218 GET_FIELD(surf
[5], GEN7_SURFACE_MIN_LOD
));
219 batch_out(brw
, name
, offset
, 6, "x,y offset: %d,%d\n",
220 GET_FIELD(surf
[5], BRW_SURFACE_X_OFFSET
),
221 GET_FIELD(surf
[5], BRW_SURFACE_Y_OFFSET
));
222 batch_out(brw
, name
, offset
, 7, "\n");
226 dump_sdc(struct brw_context
*brw
, uint32_t offset
)
228 const char *name
= "SDC";
230 if (brw
->gen
>= 5 && brw
->gen
<= 6) {
231 struct gen5_sampler_default_color
*sdc
= (brw
->batch
.bo
->virtual +
233 batch_out(brw
, name
, offset
, 0, "unorm rgba\n");
234 batch_out(brw
, name
, offset
, 1, "r %f\n", sdc
->f
[0]);
235 batch_out(brw
, name
, offset
, 2, "b %f\n", sdc
->f
[1]);
236 batch_out(brw
, name
, offset
, 3, "g %f\n", sdc
->f
[2]);
237 batch_out(brw
, name
, offset
, 4, "a %f\n", sdc
->f
[3]);
238 batch_out(brw
, name
, offset
, 5, "half float rg\n");
239 batch_out(brw
, name
, offset
, 6, "half float ba\n");
240 batch_out(brw
, name
, offset
, 7, "u16 rg\n");
241 batch_out(brw
, name
, offset
, 8, "u16 ba\n");
242 batch_out(brw
, name
, offset
, 9, "s16 rg\n");
243 batch_out(brw
, name
, offset
, 10, "s16 ba\n");
244 batch_out(brw
, name
, offset
, 11, "s8 rgba\n");
246 float *sdc
= brw
->batch
.bo
->virtual + offset
;
247 batch_out(brw
, name
, offset
, 0, "r %f\n", sdc
[0]);
248 batch_out(brw
, name
, offset
, 1, "g %f\n", sdc
[1]);
249 batch_out(brw
, name
, offset
, 2, "b %f\n", sdc
[2]);
250 batch_out(brw
, name
, offset
, 3, "a %f\n", sdc
[3]);
254 static void dump_sampler_state(struct brw_context
*brw
,
255 uint32_t offset
, uint32_t size
)
258 uint32_t *samp
= brw
->batch
.bo
->virtual + offset
;
260 for (i
= 0; i
< size
/ 16; i
++) {
263 sprintf(name
, "WM SAMP%d", i
);
264 batch_out(brw
, name
, offset
, 0, "filtering\n");
265 batch_out(brw
, name
, offset
, 1, "wrapping, lod\n");
266 batch_out(brw
, name
, offset
, 2, "default color pointer\n");
267 batch_out(brw
, name
, offset
, 3, "chroma key, aniso\n");
270 offset
+= 4 * sizeof(uint32_t);
274 static void dump_sf_viewport_state(struct brw_context
*brw
,
277 const char *name
= "SF VP";
278 struct brw_sf_viewport
*vp
= brw
->batch
.bo
->virtual + offset
;
280 assert(brw
->gen
< 7);
282 batch_out(brw
, name
, offset
, 0, "m00 = %f\n", vp
->viewport
.m00
);
283 batch_out(brw
, name
, offset
, 1, "m11 = %f\n", vp
->viewport
.m11
);
284 batch_out(brw
, name
, offset
, 2, "m22 = %f\n", vp
->viewport
.m22
);
285 batch_out(brw
, name
, offset
, 3, "m30 = %f\n", vp
->viewport
.m30
);
286 batch_out(brw
, name
, offset
, 4, "m31 = %f\n", vp
->viewport
.m31
);
287 batch_out(brw
, name
, offset
, 5, "m32 = %f\n", vp
->viewport
.m32
);
289 batch_out(brw
, name
, offset
, 6, "top left = %d,%d\n",
290 vp
->scissor
.xmin
, vp
->scissor
.ymin
);
291 batch_out(brw
, name
, offset
, 7, "bottom right = %d,%d\n",
292 vp
->scissor
.xmax
, vp
->scissor
.ymax
);
295 static void dump_clip_viewport_state(struct brw_context
*brw
,
298 const char *name
= "CLIP VP";
299 struct brw_clipper_viewport
*vp
= brw
->batch
.bo
->virtual + offset
;
301 assert(brw
->gen
< 7);
303 batch_out(brw
, name
, offset
, 0, "xmin = %f\n", vp
->xmin
);
304 batch_out(brw
, name
, offset
, 1, "xmax = %f\n", vp
->xmax
);
305 batch_out(brw
, name
, offset
, 2, "ymin = %f\n", vp
->ymin
);
306 batch_out(brw
, name
, offset
, 3, "ymax = %f\n", vp
->ymax
);
309 static void dump_sf_clip_viewport_state(struct brw_context
*brw
,
312 const char *name
= "SF_CLIP VP";
313 struct gen7_sf_clip_viewport
*vp
= brw
->batch
.bo
->virtual + offset
;
315 assert(brw
->gen
>= 7);
317 batch_out(brw
, name
, offset
, 0, "m00 = %f\n", vp
->viewport
.m00
);
318 batch_out(brw
, name
, offset
, 1, "m11 = %f\n", vp
->viewport
.m11
);
319 batch_out(brw
, name
, offset
, 2, "m22 = %f\n", vp
->viewport
.m22
);
320 batch_out(brw
, name
, offset
, 3, "m30 = %f\n", vp
->viewport
.m30
);
321 batch_out(brw
, name
, offset
, 4, "m31 = %f\n", vp
->viewport
.m31
);
322 batch_out(brw
, name
, offset
, 5, "m32 = %f\n", vp
->viewport
.m32
);
323 batch_out(brw
, name
, offset
, 6, "guardband xmin = %f\n", vp
->guardband
.xmin
);
324 batch_out(brw
, name
, offset
, 7, "guardband xmax = %f\n", vp
->guardband
.xmax
);
325 batch_out(brw
, name
, offset
, 8, "guardband ymin = %f\n", vp
->guardband
.ymin
);
326 batch_out(brw
, name
, offset
, 9, "guardband ymax = %f\n", vp
->guardband
.ymax
);
330 static void dump_cc_viewport_state(struct brw_context
*brw
, uint32_t offset
)
332 const char *name
= "CC VP";
333 struct brw_cc_viewport
*vp
= brw
->batch
.bo
->virtual + offset
;
335 batch_out(brw
, name
, offset
, 0, "min_depth = %f\n", vp
->min_depth
);
336 batch_out(brw
, name
, offset
, 1, "max_depth = %f\n", vp
->max_depth
);
339 static void dump_depth_stencil_state(struct brw_context
*brw
, uint32_t offset
)
341 const char *name
= "D_S";
342 struct gen6_depth_stencil_state
*ds
= brw
->batch
.bo
->virtual + offset
;
344 batch_out(brw
, name
, offset
, 0,
345 "stencil %sable, func %d, write %sable\n",
346 ds
->ds0
.stencil_enable
? "en" : "dis",
347 ds
->ds0
.stencil_func
,
348 ds
->ds0
.stencil_write_enable
? "en" : "dis");
349 batch_out(brw
, name
, offset
, 1,
350 "stencil test mask 0x%x, write mask 0x%x\n",
351 ds
->ds1
.stencil_test_mask
, ds
->ds1
.stencil_write_mask
);
352 batch_out(brw
, name
, offset
, 2,
353 "depth test %sable, func %d, write %sable\n",
354 ds
->ds2
.depth_test_enable
? "en" : "dis",
355 ds
->ds2
.depth_test_func
,
356 ds
->ds2
.depth_write_enable
? "en" : "dis");
359 static void dump_cc_state_gen4(struct brw_context
*brw
, uint32_t offset
)
361 const char *name
= "CC";
363 batch_out(brw
, name
, offset
, 0, "cc0\n");
364 batch_out(brw
, name
, offset
, 1, "cc1\n");
365 batch_out(brw
, name
, offset
, 2, "cc2\n");
366 batch_out(brw
, name
, offset
, 3, "cc3\n");
367 batch_out(brw
, name
, offset
, 4, "cc4: viewport offset\n");
368 batch_out(brw
, name
, offset
, 5, "cc5\n");
369 batch_out(brw
, name
, offset
, 6, "cc6\n");
370 batch_out(brw
, name
, offset
, 7, "cc7\n");
373 static void dump_cc_state_gen6(struct brw_context
*brw
, uint32_t offset
)
375 const char *name
= "CC";
376 struct gen6_color_calc_state
*cc
= brw
->batch
.bo
->virtual + offset
;
378 batch_out(brw
, name
, offset
, 0,
379 "alpha test format %s, round disable %d, stencil ref %d, "
380 "bf stencil ref %d\n",
381 cc
->cc0
.alpha_test_format
? "FLOAT32" : "UNORM8",
382 cc
->cc0
.round_disable
,
384 cc
->cc0
.bf_stencil_ref
);
385 batch_out(brw
, name
, offset
, 1, "\n");
386 batch_out(brw
, name
, offset
, 2, "constant red %f\n", cc
->constant_r
);
387 batch_out(brw
, name
, offset
, 3, "constant green %f\n", cc
->constant_g
);
388 batch_out(brw
, name
, offset
, 4, "constant blue %f\n", cc
->constant_b
);
389 batch_out(brw
, name
, offset
, 5, "constant alpha %f\n", cc
->constant_a
);
392 static void dump_blend_state(struct brw_context
*brw
, uint32_t offset
)
394 const char *name
= "BLEND";
396 batch_out(brw
, name
, offset
, 0, "\n");
397 batch_out(brw
, name
, offset
, 1, "\n");
401 dump_scissor(struct brw_context
*brw
, uint32_t offset
)
403 const char *name
= "SCISSOR";
404 struct gen6_scissor_rect
*scissor
= brw
->batch
.bo
->virtual + offset
;
406 batch_out(brw
, name
, offset
, 0, "xmin %d, ymin %d\n",
407 scissor
->xmin
, scissor
->ymin
);
408 batch_out(brw
, name
, offset
, 1, "xmax %d, ymax %d\n",
409 scissor
->xmax
, scissor
->ymax
);
413 dump_vs_constants(struct brw_context
*brw
, uint32_t offset
, uint32_t size
)
415 const char *name
= "VS_CONST";
416 uint32_t *as_uint
= brw
->batch
.bo
->virtual + offset
;
417 float *as_float
= brw
->batch
.bo
->virtual + offset
;
420 for (i
= 0; i
< size
/ 4; i
+= 4) {
421 batch_out(brw
, name
, offset
, i
, "%3d: (% f % f % f % f) (0x%08x 0x%08x 0x%08x 0x%08x)\n",
423 as_float
[i
], as_float
[i
+ 1], as_float
[i
+ 2], as_float
[i
+ 3],
424 as_uint
[i
], as_uint
[i
+ 1], as_uint
[i
+ 2], as_uint
[i
+ 3]);
429 dump_wm_constants(struct brw_context
*brw
, uint32_t offset
, uint32_t size
)
431 const char *name
= "WM_CONST";
432 uint32_t *as_uint
= brw
->batch
.bo
->virtual + offset
;
433 float *as_float
= brw
->batch
.bo
->virtual + offset
;
436 for (i
= 0; i
< size
/ 4; i
+= 4) {
437 batch_out(brw
, name
, offset
, i
, "%3d: (% f % f % f % f) (0x%08x 0x%08x 0x%08x 0x%08x)\n",
439 as_float
[i
], as_float
[i
+ 1], as_float
[i
+ 2], as_float
[i
+ 3],
440 as_uint
[i
], as_uint
[i
+ 1], as_uint
[i
+ 2], as_uint
[i
+ 3]);
444 static void dump_binding_table(struct brw_context
*brw
, uint32_t offset
,
449 uint32_t *data
= brw
->batch
.bo
->virtual + offset
;
451 for (i
= 0; i
< size
/ 4; i
++) {
455 sprintf(name
, "BIND%d", i
);
456 batch_out(brw
, name
, offset
, i
, "surface state address\n");
461 dump_prog_cache(struct brw_context
*brw
)
463 struct brw_cache
*cache
= &brw
->cache
;
466 drm_intel_bo_map(brw
->cache
.bo
, false);
468 for (b
= 0; b
< cache
->size
; b
++) {
469 struct brw_cache_item
*item
;
471 for (item
= cache
->items
[b
]; item
; item
= item
->next
) {
474 switch (item
->cache_id
) {
479 name
= "Fixed-function GS kernel";
485 name
= "CLIP kernel";
498 fprintf(stderr
, "%s:\n", name
);
499 brw_disassemble(brw
, brw
->cache
.bo
->virtual, item
->offset
, item
->size
,
504 drm_intel_bo_unmap(brw
->cache
.bo
);
508 dump_state_batch(struct brw_context
*brw
)
512 for (i
= 0; i
< brw
->state_batch_count
; i
++) {
513 uint32_t offset
= brw
->state_batch_list
[i
].offset
;
514 uint32_t size
= brw
->state_batch_list
[i
].size
;
516 switch (brw
->state_batch_list
[i
].type
) {
517 case AUB_TRACE_VS_STATE
:
518 dump_vs_state(brw
, offset
);
520 case AUB_TRACE_GS_STATE
:
521 dump_gs_state(brw
, offset
);
523 case AUB_TRACE_CLIP_STATE
:
524 dump_clip_state(brw
, offset
);
526 case AUB_TRACE_SF_STATE
:
527 dump_sf_state(brw
, offset
);
529 case AUB_TRACE_WM_STATE
:
530 dump_wm_state(brw
, offset
);
532 case AUB_TRACE_CLIP_VP_STATE
:
533 dump_clip_viewport_state(brw
, offset
);
535 case AUB_TRACE_SF_VP_STATE
:
537 dump_sf_clip_viewport_state(brw
, offset
);
539 dump_sf_viewport_state(brw
, offset
);
542 case AUB_TRACE_CC_VP_STATE
:
543 dump_cc_viewport_state(brw
, offset
);
545 case AUB_TRACE_DEPTH_STENCIL_STATE
:
546 dump_depth_stencil_state(brw
, offset
);
548 case AUB_TRACE_CC_STATE
:
550 dump_cc_state_gen6(brw
, offset
);
552 dump_cc_state_gen4(brw
, offset
);
554 case AUB_TRACE_BLEND_STATE
:
555 dump_blend_state(brw
, offset
);
557 case AUB_TRACE_BINDING_TABLE
:
558 dump_binding_table(brw
, offset
, size
);
560 case AUB_TRACE_SURFACE_STATE
:
562 dump_surface_state(brw
, offset
);
564 dump_gen7_surface_state(brw
, offset
);
567 case AUB_TRACE_SAMPLER_STATE
:
568 dump_sampler_state(brw
, offset
, size
);
570 case AUB_TRACE_SAMPLER_DEFAULT_COLOR
:
571 dump_sdc(brw
, offset
);
573 case AUB_TRACE_SCISSOR_STATE
:
574 dump_scissor(brw
, offset
);
576 case AUB_TRACE_VS_CONSTANTS
:
577 dump_vs_constants(brw
, offset
, size
);
579 case AUB_TRACE_WM_CONSTANTS
:
580 dump_wm_constants(brw
, offset
, size
);
589 * Print additional debug information associated with the batchbuffer
590 * when DEBUG_BATCH is set.
592 * For 965, this means mapping the state buffers that would have been referenced
593 * by the batchbuffer and dumping them.
595 * The buffer offsets printed rely on the buffer containing the last offset
596 * it was validated at.
598 void brw_debug_batch(struct brw_context
*brw
)
600 drm_intel_bo_map(brw
->batch
.bo
, false);
601 dump_state_batch(brw
);
602 drm_intel_bo_unmap(brw
->batch
.bo
);
605 dump_prog_cache(brw
);