2 * Copyright © 2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 #include "main/mtypes.h"
29 #include "intel_batchbuffer.h"
31 #include "brw_context.h"
32 #include "brw_defines.h"
35 batch_out(struct brw_context
*brw
, const char *name
, uint32_t offset
,
36 int index
, char *fmt
, ...) PRINTFLIKE(5, 6);
39 batch_out(struct brw_context
*brw
, const char *name
, uint32_t offset
,
40 int index
, char *fmt
, ...)
42 uint32_t *data
= brw
->batch
.bo
->virtual + offset
;
45 fprintf(stderr
, "0x%08x: 0x%08x: %8s: ",
46 offset
+ index
* 4, data
[index
], name
);
48 vfprintf(stderr
, fmt
, va
);
53 get_965_surfacetype(unsigned int surfacetype
)
55 switch (surfacetype
) {
59 case 3: return "CUBE";
60 case 4: return "BUFFER";
61 case 7: return "NULL";
62 default: return "unknown";
67 get_965_surface_format(unsigned int surface_format
)
69 switch (surface_format
) {
70 case 0x000: return "r32g32b32a32_float";
71 case 0x0c1: return "b8g8r8a8_unorm";
72 case 0x100: return "b5g6r5_unorm";
73 case 0x102: return "b5g5r5a1_unorm";
74 case 0x104: return "b4g4r4a4_unorm";
75 default: return "unknown";
79 static void dump_vs_state(struct brw_context
*brw
, uint32_t offset
)
81 const char *name
= "VS_STATE";
82 struct brw_vs_unit_state
*vs
= brw
->batch
.bo
->virtual + offset
;
84 batch_out(brw
, name
, offset
, 0, "thread0\n");
85 batch_out(brw
, name
, offset
, 1, "thread1\n");
86 batch_out(brw
, name
, offset
, 2, "thread2\n");
87 batch_out(brw
, name
, offset
, 3, "thread3\n");
88 batch_out(brw
, name
, offset
, 4, "thread4: %d threads\n",
89 vs
->thread4
.max_threads
+ 1);
90 batch_out(brw
, name
, offset
, 5, "vs5\n");
91 batch_out(brw
, name
, offset
, 6, "vs6\n");
94 static void dump_gs_state(struct brw_context
*brw
, uint32_t offset
)
96 const char *name
= "GS_STATE";
97 struct brw_gs_unit_state
*gs
= brw
->batch
.bo
->virtual + offset
;
99 batch_out(brw
, name
, offset
, 0, "thread0\n");
100 batch_out(brw
, name
, offset
, 1, "thread1\n");
101 batch_out(brw
, name
, offset
, 2, "thread2\n");
102 batch_out(brw
, name
, offset
, 3, "thread3\n");
103 batch_out(brw
, name
, offset
, 4, "thread4: %d threads\n",
104 gs
->thread4
.max_threads
+ 1);
105 batch_out(brw
, name
, offset
, 5, "vs5\n");
106 batch_out(brw
, name
, offset
, 6, "vs6\n");
109 static void dump_clip_state(struct brw_context
*brw
, uint32_t offset
)
111 const char *name
= "CLIP_STATE";
112 struct brw_clip_unit_state
*clip
= brw
->batch
.bo
->virtual + offset
;
114 batch_out(brw
, name
, offset
, 0, "thread0\n");
115 batch_out(brw
, name
, offset
, 1, "thread1\n");
116 batch_out(brw
, name
, offset
, 2, "thread2\n");
117 batch_out(brw
, name
, offset
, 3, "thread3\n");
118 batch_out(brw
, name
, offset
, 4, "thread4: %d threads\n",
119 clip
->thread4
.max_threads
+ 1);
120 batch_out(brw
, name
, offset
, 5, "clip5\n");
121 batch_out(brw
, name
, offset
, 6, "clip6\n");
122 batch_out(brw
, name
, offset
, 7, "vp xmin %f\n", clip
->viewport_xmin
);
123 batch_out(brw
, name
, offset
, 8, "vp xmax %f\n", clip
->viewport_xmax
);
124 batch_out(brw
, name
, offset
, 9, "vp ymin %f\n", clip
->viewport_ymin
);
125 batch_out(brw
, name
, offset
, 10, "vp ymax %f\n", clip
->viewport_ymax
);
128 static void dump_sf_state(struct brw_context
*brw
, uint32_t offset
)
130 const char *name
= "SF_STATE";
131 struct brw_sf_unit_state
*sf
= brw
->batch
.bo
->virtual + offset
;
133 batch_out(brw
, name
, offset
, 0, "thread0\n");
134 batch_out(brw
, name
, offset
, 1, "thread1\n");
135 batch_out(brw
, name
, offset
, 2, "thread2\n");
136 batch_out(brw
, name
, offset
, 3, "thread3\n");
137 batch_out(brw
, name
, offset
, 4, "thread4: %d threads\n",
138 sf
->thread4
.max_threads
+ 1);
139 batch_out(brw
, name
, offset
, 5, "sf5: viewport offset\n");
140 batch_out(brw
, name
, offset
, 6, "sf6\n");
141 batch_out(brw
, name
, offset
, 7, "sf7\n");
144 static void dump_wm_state(struct brw_context
*brw
, uint32_t offset
)
146 const char *name
= "WM_STATE";
147 struct brw_wm_unit_state
*wm
= brw
->batch
.bo
->virtual + offset
;
149 batch_out(brw
, name
, offset
, 0, "thread0\n");
150 batch_out(brw
, name
, offset
, 1, "thread1\n");
151 batch_out(brw
, name
, offset
, 2, "thread2\n");
152 batch_out(brw
, name
, offset
, 3, "thread3\n");
153 batch_out(brw
, name
, offset
, 4, "wm4\n");
154 batch_out(brw
, name
, offset
, 5, "wm5: %s%s%s%s%s%s, %d threads\n",
155 wm
->wm5
.enable_8_pix
? "8pix" : "",
156 wm
->wm5
.enable_16_pix
? "16pix" : "",
157 wm
->wm5
.program_uses_depth
? ", uses depth" : "",
158 wm
->wm5
.program_computes_depth
? ", computes depth" : "",
159 wm
->wm5
.program_uses_killpixel
? ", kills" : "",
160 wm
->wm5
.thread_dispatch_enable
? "" : ", no dispatch",
161 wm
->wm5
.max_threads
+ 1);
162 batch_out(brw
, name
, offset
, 6, "depth offset constant %f\n",
163 wm
->global_depth_offset_constant
);
164 batch_out(brw
, name
, offset
, 7, "depth offset scale %f\n",
165 wm
->global_depth_offset_scale
);
166 batch_out(brw
, name
, offset
, 8, "wm8: kernel 1 (gen5+)\n");
167 batch_out(brw
, name
, offset
, 9, "wm9: kernel 2 (gen5+)\n");
168 batch_out(brw
, name
, offset
, 10, "wm10: kernel 3 (gen5+)\n");
171 static void dump_surface_state(struct brw_context
*brw
, uint32_t offset
)
173 const char *name
= "SURF";
174 uint32_t *surf
= brw
->batch
.bo
->virtual + offset
;
176 batch_out(brw
, name
, offset
, 0, "%s %s\n",
177 get_965_surfacetype(GET_FIELD(surf
[0], BRW_SURFACE_TYPE
)),
178 get_965_surface_format(GET_FIELD(surf
[0], BRW_SURFACE_FORMAT
)));
179 batch_out(brw
, name
, offset
, 1, "offset\n");
180 batch_out(brw
, name
, offset
, 2, "%dx%d size, %d mips\n",
181 GET_FIELD(surf
[2], BRW_SURFACE_WIDTH
) + 1,
182 GET_FIELD(surf
[2], BRW_SURFACE_HEIGHT
) + 1,
183 GET_FIELD(surf
[2], BRW_SURFACE_LOD
));
184 batch_out(brw
, name
, offset
, 3, "pitch %d, %s tiled\n",
185 GET_FIELD(surf
[3], BRW_SURFACE_PITCH
) + 1,
186 (surf
[3] & BRW_SURFACE_TILED
) ?
187 ((surf
[3] & BRW_SURFACE_TILED_Y
) ? "Y" : "X") : "not");
188 batch_out(brw
, name
, offset
, 4, "mip base %d\n",
189 GET_FIELD(surf
[4], BRW_SURFACE_MIN_LOD
));
190 batch_out(brw
, name
, offset
, 5, "x,y offset: %d,%d\n",
191 GET_FIELD(surf
[5], BRW_SURFACE_X_OFFSET
),
192 GET_FIELD(surf
[5], BRW_SURFACE_Y_OFFSET
));
195 static void dump_gen7_surface_state(struct brw_context
*brw
, uint32_t offset
)
197 const char *name
= "SURF";
198 uint32_t *surf
= brw
->batch
.bo
->virtual + offset
;
200 batch_out(brw
, name
, offset
, 0, "%s %s\n",
201 get_965_surfacetype(GET_FIELD(surf
[0], BRW_SURFACE_TYPE
)),
202 get_965_surface_format(GET_FIELD(surf
[0], BRW_SURFACE_FORMAT
)));
203 batch_out(brw
, name
, offset
, 1, "offset\n");
204 batch_out(brw
, name
, offset
, 2, "%dx%d size, %d mips\n",
205 GET_FIELD(surf
[2], GEN7_SURFACE_WIDTH
) + 1,
206 GET_FIELD(surf
[2], GEN7_SURFACE_HEIGHT
) + 1,
207 surf
[5] & INTEL_MASK(3, 0));
208 batch_out(brw
, name
, offset
, 3, "pitch %d, %stiled\n",
209 (surf
[3] & INTEL_MASK(17, 0)) + 1,
210 (surf
[0] & (1 << 14)) ? "" : "not ");
211 batch_out(brw
, name
, offset
, 4, "mip base %d\n",
212 GET_FIELD(surf
[5], GEN7_SURFACE_MIN_LOD
));
213 batch_out(brw
, name
, offset
, 5, "x,y offset: %d,%d\n",
214 GET_FIELD(surf
[5], BRW_SURFACE_X_OFFSET
),
215 GET_FIELD(surf
[5], BRW_SURFACE_Y_OFFSET
));
219 dump_sdc(struct brw_context
*brw
, uint32_t offset
)
221 const char *name
= "SDC";
222 struct intel_context
*intel
= &brw
->intel
;
224 if (intel
->gen
>= 5 && intel
->gen
<= 6) {
225 struct gen5_sampler_default_color
*sdc
= (brw
->batch
.bo
->virtual +
227 batch_out(brw
, name
, offset
, 0, "unorm rgba\n");
228 batch_out(brw
, name
, offset
, 1, "r %f\n", sdc
->f
[0]);
229 batch_out(brw
, name
, offset
, 2, "b %f\n", sdc
->f
[1]);
230 batch_out(brw
, name
, offset
, 3, "g %f\n", sdc
->f
[2]);
231 batch_out(brw
, name
, offset
, 4, "a %f\n", sdc
->f
[3]);
232 batch_out(brw
, name
, offset
, 5, "half float rg\n");
233 batch_out(brw
, name
, offset
, 6, "half float ba\n");
234 batch_out(brw
, name
, offset
, 7, "u16 rg\n");
235 batch_out(brw
, name
, offset
, 8, "u16 ba\n");
236 batch_out(brw
, name
, offset
, 9, "s16 rg\n");
237 batch_out(brw
, name
, offset
, 10, "s16 ba\n");
238 batch_out(brw
, name
, offset
, 11, "s8 rgba\n");
240 struct brw_sampler_default_color
*sdc
= (brw
->batch
.bo
->virtual +
242 batch_out(brw
, name
, offset
, 0, "r %f\n", sdc
->color
[0]);
243 batch_out(brw
, name
, offset
, 1, "g %f\n", sdc
->color
[1]);
244 batch_out(brw
, name
, offset
, 2, "b %f\n", sdc
->color
[2]);
245 batch_out(brw
, name
, offset
, 3, "a %f\n", sdc
->color
[3]);
249 static void dump_sampler_state(struct brw_context
*brw
,
250 uint32_t offset
, uint32_t size
)
252 struct intel_context
*intel
= &brw
->intel
;
254 struct brw_sampler_state
*samp
= brw
->batch
.bo
->virtual + offset
;
256 assert(intel
->gen
< 7);
258 for (i
= 0; i
< size
/ sizeof(*samp
); i
++) {
261 sprintf(name
, "WM SAMP%d", i
);
262 batch_out(brw
, name
, offset
, 0, "filtering\n");
263 batch_out(brw
, name
, offset
, 1, "wrapping, lod\n");
264 batch_out(brw
, name
, offset
, 2, "default color pointer\n");
265 batch_out(brw
, name
, offset
, 3, "chroma key, aniso\n");
268 offset
+= sizeof(*samp
);
272 static void dump_gen7_sampler_state(struct brw_context
*brw
,
273 uint32_t offset
, uint32_t size
)
275 struct intel_context
*intel
= &brw
->intel
;
276 struct gen7_sampler_state
*samp
= brw
->batch
.bo
->virtual + offset
;
279 assert(intel
->gen
>= 7);
281 for (i
= 0; i
< size
/ sizeof(*samp
); i
++) {
284 sprintf(name
, "WM SAMP%d", i
);
285 batch_out(brw
, name
, offset
, 0, "filtering\n");
286 batch_out(brw
, name
, offset
, 1, "wrapping, lod\n");
287 batch_out(brw
, name
, offset
, 2, "default color pointer\n");
288 batch_out(brw
, name
, offset
, 3, "chroma key, aniso\n");
291 offset
+= sizeof(*samp
);
296 static void dump_sf_viewport_state(struct brw_context
*brw
,
299 struct intel_context
*intel
= &brw
->intel
;
300 const char *name
= "SF VP";
301 struct brw_sf_viewport
*vp
= brw
->batch
.bo
->virtual + offset
;
303 assert(intel
->gen
< 7);
305 batch_out(brw
, name
, offset
, 0, "m00 = %f\n", vp
->viewport
.m00
);
306 batch_out(brw
, name
, offset
, 1, "m11 = %f\n", vp
->viewport
.m11
);
307 batch_out(brw
, name
, offset
, 2, "m22 = %f\n", vp
->viewport
.m22
);
308 batch_out(brw
, name
, offset
, 3, "m30 = %f\n", vp
->viewport
.m30
);
309 batch_out(brw
, name
, offset
, 4, "m31 = %f\n", vp
->viewport
.m31
);
310 batch_out(brw
, name
, offset
, 5, "m32 = %f\n", vp
->viewport
.m32
);
312 batch_out(brw
, name
, offset
, 6, "top left = %d,%d\n",
313 vp
->scissor
.xmin
, vp
->scissor
.ymin
);
314 batch_out(brw
, name
, offset
, 7, "bottom right = %d,%d\n",
315 vp
->scissor
.xmax
, vp
->scissor
.ymax
);
318 static void dump_clip_viewport_state(struct brw_context
*brw
,
321 struct intel_context
*intel
= &brw
->intel
;
322 const char *name
= "CLIP VP";
323 struct brw_clipper_viewport
*vp
= brw
->batch
.bo
->virtual + offset
;
325 assert(intel
->gen
< 7);
327 batch_out(brw
, name
, offset
, 0, "xmin = %f\n", vp
->xmin
);
328 batch_out(brw
, name
, offset
, 1, "xmax = %f\n", vp
->xmax
);
329 batch_out(brw
, name
, offset
, 2, "ymin = %f\n", vp
->ymin
);
330 batch_out(brw
, name
, offset
, 3, "ymax = %f\n", vp
->ymax
);
333 static void dump_sf_clip_viewport_state(struct brw_context
*brw
,
336 struct intel_context
*intel
= &brw
->intel
;
337 const char *name
= "SF_CLIP VP";
338 struct gen7_sf_clip_viewport
*vp
= brw
->batch
.bo
->virtual + offset
;
340 assert(intel
->gen
>= 7);
342 batch_out(brw
, name
, offset
, 0, "m00 = %f\n", vp
->viewport
.m00
);
343 batch_out(brw
, name
, offset
, 1, "m11 = %f\n", vp
->viewport
.m11
);
344 batch_out(brw
, name
, offset
, 2, "m22 = %f\n", vp
->viewport
.m22
);
345 batch_out(brw
, name
, offset
, 3, "m30 = %f\n", vp
->viewport
.m30
);
346 batch_out(brw
, name
, offset
, 4, "m31 = %f\n", vp
->viewport
.m31
);
347 batch_out(brw
, name
, offset
, 5, "m32 = %f\n", vp
->viewport
.m32
);
348 batch_out(brw
, name
, offset
, 6, "guardband xmin = %f\n", vp
->guardband
.xmin
);
349 batch_out(brw
, name
, offset
, 7, "guardband xmax = %f\n", vp
->guardband
.xmax
);
350 batch_out(brw
, name
, offset
, 8, "guardband ymin = %f\n", vp
->guardband
.ymin
);
351 batch_out(brw
, name
, offset
, 9, "guardband ymax = %f\n", vp
->guardband
.ymax
);
355 static void dump_cc_viewport_state(struct brw_context
*brw
, uint32_t offset
)
357 const char *name
= "CC VP";
358 struct brw_cc_viewport
*vp
= brw
->batch
.bo
->virtual + offset
;
360 batch_out(brw
, name
, offset
, 0, "min_depth = %f\n", vp
->min_depth
);
361 batch_out(brw
, name
, offset
, 1, "max_depth = %f\n", vp
->max_depth
);
364 static void dump_depth_stencil_state(struct brw_context
*brw
, uint32_t offset
)
366 const char *name
= "D_S";
367 struct gen6_depth_stencil_state
*ds
= brw
->batch
.bo
->virtual + offset
;
369 batch_out(brw
, name
, offset
, 0,
370 "stencil %sable, func %d, write %sable\n",
371 ds
->ds0
.stencil_enable
? "en" : "dis",
372 ds
->ds0
.stencil_func
,
373 ds
->ds0
.stencil_write_enable
? "en" : "dis");
374 batch_out(brw
, name
, offset
, 1,
375 "stencil test mask 0x%x, write mask 0x%x\n",
376 ds
->ds1
.stencil_test_mask
, ds
->ds1
.stencil_write_mask
);
377 batch_out(brw
, name
, offset
, 2,
378 "depth test %sable, func %d, write %sable\n",
379 ds
->ds2
.depth_test_enable
? "en" : "dis",
380 ds
->ds2
.depth_test_func
,
381 ds
->ds2
.depth_write_enable
? "en" : "dis");
384 static void dump_cc_state_gen4(struct brw_context
*brw
, uint32_t offset
)
386 const char *name
= "CC";
388 batch_out(brw
, name
, offset
, 0, "cc0\n");
389 batch_out(brw
, name
, offset
, 1, "cc1\n");
390 batch_out(brw
, name
, offset
, 2, "cc2\n");
391 batch_out(brw
, name
, offset
, 3, "cc3\n");
392 batch_out(brw
, name
, offset
, 4, "cc4: viewport offset\n");
393 batch_out(brw
, name
, offset
, 5, "cc5\n");
394 batch_out(brw
, name
, offset
, 6, "cc6\n");
395 batch_out(brw
, name
, offset
, 7, "cc7\n");
398 static void dump_cc_state_gen6(struct brw_context
*brw
, uint32_t offset
)
400 const char *name
= "CC";
401 struct gen6_color_calc_state
*cc
= brw
->batch
.bo
->virtual + offset
;
403 batch_out(brw
, name
, offset
, 0,
404 "alpha test format %s, round disable %d, stencil ref %d, "
405 "bf stencil ref %d\n",
406 cc
->cc0
.alpha_test_format
? "FLOAT32" : "UNORM8",
407 cc
->cc0
.round_disable
,
409 cc
->cc0
.bf_stencil_ref
);
410 batch_out(brw
, name
, offset
, 1, "\n");
411 batch_out(brw
, name
, offset
, 2, "constant red %f\n", cc
->constant_r
);
412 batch_out(brw
, name
, offset
, 3, "constant green %f\n", cc
->constant_g
);
413 batch_out(brw
, name
, offset
, 4, "constant blue %f\n", cc
->constant_b
);
414 batch_out(brw
, name
, offset
, 5, "constant alpha %f\n", cc
->constant_a
);
417 static void dump_blend_state(struct brw_context
*brw
, uint32_t offset
)
419 const char *name
= "BLEND";
421 batch_out(brw
, name
, offset
, 0, "\n");
422 batch_out(brw
, name
, offset
, 1, "\n");
426 dump_scissor(struct brw_context
*brw
, uint32_t offset
)
428 const char *name
= "SCISSOR";
429 struct gen6_scissor_rect
*scissor
= brw
->batch
.bo
->virtual + offset
;
431 batch_out(brw
, name
, offset
, 0, "xmin %d, ymin %d\n",
432 scissor
->xmin
, scissor
->ymin
);
433 batch_out(brw
, name
, offset
, 1, "xmax %d, ymax %d\n",
434 scissor
->xmax
, scissor
->ymax
);
438 dump_vs_constants(struct brw_context
*brw
, uint32_t offset
, uint32_t size
)
440 const char *name
= "VS_CONST";
441 uint32_t *as_uint
= brw
->batch
.bo
->virtual + offset
;
442 float *as_float
= brw
->batch
.bo
->virtual + offset
;
445 for (i
= 0; i
< size
/ 4; i
+= 4) {
446 batch_out(brw
, name
, offset
, i
, "%3d: (% f % f % f % f) (0x%08x 0x%08x 0x%08x 0x%08x)\n",
448 as_float
[i
], as_float
[i
+ 1], as_float
[i
+ 2], as_float
[i
+ 3],
449 as_uint
[i
], as_uint
[i
+ 1], as_uint
[i
+ 2], as_uint
[i
+ 3]);
454 dump_wm_constants(struct brw_context
*brw
, uint32_t offset
, uint32_t size
)
456 const char *name
= "WM_CONST";
457 uint32_t *as_uint
= brw
->batch
.bo
->virtual + offset
;
458 float *as_float
= brw
->batch
.bo
->virtual + offset
;
461 for (i
= 0; i
< size
/ 4; i
+= 4) {
462 batch_out(brw
, name
, offset
, i
, "%3d: (% f % f % f % f) (0x%08x 0x%08x 0x%08x 0x%08x)\n",
464 as_float
[i
], as_float
[i
+ 1], as_float
[i
+ 2], as_float
[i
+ 3],
465 as_uint
[i
], as_uint
[i
+ 1], as_uint
[i
+ 2], as_uint
[i
+ 3]);
469 static void dump_binding_table(struct brw_context
*brw
, uint32_t offset
,
474 uint32_t *data
= brw
->batch
.bo
->virtual + offset
;
476 for (i
= 0; i
< size
/ 4; i
++) {
480 sprintf(name
, "BIND%d", i
);
481 batch_out(brw
, name
, offset
, i
, "surface state address\n");
486 dump_prog_cache(struct brw_context
*brw
)
488 struct intel_context
*intel
= &brw
->intel
;
489 struct brw_cache
*cache
= &brw
->cache
;
493 drm_intel_bo_map(brw
->cache
.bo
, false);
495 for (b
= 0; b
< cache
->size
; b
++) {
496 struct brw_cache_item
*item
;
498 for (item
= cache
->items
[b
]; item
; item
= item
->next
) {
500 uint32_t offset
= item
->offset
;
502 data
= brw
->cache
.bo
->virtual + item
->offset
;
504 switch (item
->cache_id
) {
512 name
= "CLIP kernel";
525 for (i
= 0; i
< item
->size
/ 4 / 4; i
++) {
526 fprintf(stderr
, "0x%08x: %8s: 0x%08x 0x%08x 0x%08x 0x%08x ",
529 data
[i
* 4], data
[i
* 4 + 1], data
[i
* 4 + 2], data
[i
* 4 + 3]);
531 brw_disasm(stderr
, (void *)(data
+ i
* 4), intel
->gen
);
536 drm_intel_bo_unmap(brw
->cache
.bo
);
540 dump_state_batch(struct brw_context
*brw
)
542 struct intel_context
*intel
= &brw
->intel
;
545 for (i
= 0; i
< brw
->state_batch_count
; i
++) {
546 uint32_t offset
= brw
->state_batch_list
[i
].offset
;
547 uint32_t size
= brw
->state_batch_list
[i
].size
;
549 switch (brw
->state_batch_list
[i
].type
) {
550 case AUB_TRACE_VS_STATE
:
551 dump_vs_state(brw
, offset
);
553 case AUB_TRACE_GS_STATE
:
554 dump_gs_state(brw
, offset
);
556 case AUB_TRACE_CLIP_STATE
:
557 dump_clip_state(brw
, offset
);
559 case AUB_TRACE_SF_STATE
:
560 dump_sf_state(brw
, offset
);
562 case AUB_TRACE_WM_STATE
:
563 dump_wm_state(brw
, offset
);
565 case AUB_TRACE_CLIP_VP_STATE
:
566 dump_clip_viewport_state(brw
, offset
);
568 case AUB_TRACE_SF_VP_STATE
:
569 if (intel
->gen
>= 7) {
570 dump_sf_clip_viewport_state(brw
, offset
);
572 dump_sf_viewport_state(brw
, offset
);
575 case AUB_TRACE_CC_VP_STATE
:
576 dump_cc_viewport_state(brw
, offset
);
578 case AUB_TRACE_DEPTH_STENCIL_STATE
:
579 dump_depth_stencil_state(brw
, offset
);
581 case AUB_TRACE_CC_STATE
:
583 dump_cc_state_gen6(brw
, offset
);
585 dump_cc_state_gen4(brw
, offset
);
587 case AUB_TRACE_BLEND_STATE
:
588 dump_blend_state(brw
, offset
);
590 case AUB_TRACE_BINDING_TABLE
:
591 dump_binding_table(brw
, offset
, size
);
593 case AUB_TRACE_SURFACE_STATE
:
594 if (intel
->gen
< 7) {
595 dump_surface_state(brw
, offset
);
597 dump_gen7_surface_state(brw
, offset
);
600 case AUB_TRACE_SAMPLER_STATE
:
601 if (intel
->gen
< 7) {
602 dump_sampler_state(brw
, offset
, size
);
604 dump_gen7_sampler_state(brw
, offset
, size
);
607 case AUB_TRACE_SAMPLER_DEFAULT_COLOR
:
608 dump_sdc(brw
, offset
);
610 case AUB_TRACE_SCISSOR_STATE
:
611 dump_scissor(brw
, offset
);
613 case AUB_TRACE_VS_CONSTANTS
:
614 dump_vs_constants(brw
, offset
, size
);
616 case AUB_TRACE_WM_CONSTANTS
:
617 dump_wm_constants(brw
, offset
, size
);
626 * Print additional debug information associated with the batchbuffer
627 * when DEBUG_BATCH is set.
629 * For 965, this means mapping the state buffers that would have been referenced
630 * by the batchbuffer and dumping them.
632 * The buffer offsets printed rely on the buffer containing the last offset
633 * it was validated at.
635 void brw_debug_batch(struct brw_context
*brw
)
637 drm_intel_bo_map(brw
->batch
.bo
, false);
638 dump_state_batch(brw
);
639 drm_intel_bo_unmap(brw
->batch
.bo
);
642 dump_prog_cache(brw
);