Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline
[mesa.git] / src / mesa / drivers / dri / i965 / brw_state_pool.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_state.h"
34 #include "imports.h"
35
36 #include "intel_ioctl.h"
37 #include "bufmgr.h"
38
39 GLboolean brw_pool_alloc( struct brw_mem_pool *pool,
40 GLuint size,
41 GLuint align,
42 GLuint *offset_return)
43 {
44 GLuint align_mask = (1<<align)-1;
45 GLuint fixup = ((pool->offset + align_mask) & ~align_mask) - pool->offset;
46
47 size = (size + 3) & ~3;
48
49 if (pool->offset + fixup + size >= pool->size) {
50 _mesa_printf("%s failed\n", __FUNCTION__);
51 assert(0);
52 exit(0);
53 }
54
55 pool->offset += fixup;
56 *offset_return = pool->offset;
57 pool->offset += size;
58
59 return GL_TRUE;
60 }
61
62 static
63 void brw_invalidate_pool( struct intel_context *intel,
64 struct brw_mem_pool *pool )
65 {
66 if (INTEL_DEBUG & DEBUG_STATE)
67 _mesa_printf("\n\n\n %s \n\n\n", __FUNCTION__);
68
69 bmBufferData(intel,
70 pool->buffer,
71 pool->size,
72 NULL,
73 0);
74
75 pool->offset = 0;
76
77 brw_clear_all_caches(pool->brw);
78 }
79
80 static void brw_invalidate_pool_cb( struct intel_context *intel, void *ptr )
81 {
82 struct brw_mem_pool *pool = (struct brw_mem_pool *) ptr;
83
84 pool->offset = 0;
85 brw_clear_all_caches(pool->brw);
86 }
87
88
89
90 static void brw_init_pool( struct brw_context *brw,
91 GLuint pool_id,
92 GLuint size )
93 {
94 struct brw_mem_pool *pool = &brw->pool[pool_id];
95
96 pool->size = size;
97 pool->brw = brw;
98
99 bmGenBuffers(&brw->intel, "pool", 1, &pool->buffer, 12);
100
101 /* Also want to say not to wait on fences when data is presented
102 */
103 bmBufferSetInvalidateCB(&brw->intel, pool->buffer,
104 brw_invalidate_pool_cb,
105 pool,
106 GL_TRUE);
107
108 bmBufferData(&brw->intel,
109 pool->buffer,
110 pool->size,
111 NULL,
112 0);
113
114 }
115
116 static void brw_destroy_pool( struct brw_context *brw,
117 GLuint pool_id )
118 {
119 struct brw_mem_pool *pool = &brw->pool[pool_id];
120
121 bmDeleteBuffers(&brw->intel, 1, &pool->buffer);
122 }
123
124
125 void brw_pool_check_wrap( struct brw_context *brw,
126 struct brw_mem_pool *pool )
127 {
128 if (pool->offset > (pool->size * 3) / 4) {
129 if (brw->intel.aub_file)
130 brw->intel.aub_wrap = 1;
131 else
132 brw->state.dirty.brw |= BRW_NEW_CONTEXT;
133 }
134
135 }
136
137 void brw_init_pools( struct brw_context *brw )
138 {
139 brw_init_pool(brw, BRW_GS_POOL, 0x80000);
140 brw_init_pool(brw, BRW_SS_POOL, 0x80000);
141 }
142
143 void brw_destroy_pools( struct brw_context *brw )
144 {
145 brw_destroy_pool(brw, BRW_GS_POOL);
146 brw_destroy_pool(brw, BRW_SS_POOL);
147 }
148
149
150 void brw_invalidate_pools( struct brw_context *brw )
151 {
152 brw_invalidate_pool(&brw->intel, &brw->pool[BRW_GS_POOL]);
153 brw_invalidate_pool(&brw->intel, &brw->pool[BRW_SS_POOL]);
154 }