2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "drivers/common/meta.h"
37 #include "intel_batchbuffer.h"
38 #include "intel_buffers.h"
40 #include "brw_ff_gs.h"
44 static const struct brw_tracked_state
*gen4_atoms
[] =
46 &brw_interpolation_map
,
48 &brw_clip_prog
, /* must do before state base address */
49 &brw_sf_prog
, /* must do before state base address */
51 /* Once all the programs are done, we know how large urb entry
52 * sizes need to be and can decide if we need to change the urb
56 &brw_recalculate_urb_fence
,
61 /* Surface state setup. Must come before the VS/WM unit. The binding
62 * table upload must be last.
64 &brw_vs_pull_constants
,
65 &brw_wm_pull_constants
,
66 &brw_renderbuffer_surfaces
,
67 &brw_texture_surfaces
,
68 &brw_vs_binding_table
,
69 &brw_wm_binding_table
,
74 /* These set up state for brw_psp_urb_cbs */
78 &brw_vs_unit
, /* always required, enabled or not */
85 &brw_state_base_address
,
87 &brw_binding_table_pointers
,
88 &brw_blend_constant_color
,
93 &brw_polygon_stipple_offset
,
96 &brw_aa_line_parameters
,
101 &brw_indices
, /* must come before brw_vertices */
108 static const struct brw_tracked_state
*gen6_atoms
[] =
113 /* Command packets: */
115 /* must do before binding table pointers, cc state ptrs */
116 &brw_state_base_address
,
119 &gen6_viewport_state
, /* must do after *_vp stages */
122 &gen6_blend_state
, /* must do before cc unit */
123 &gen6_color_calc_state
, /* must do before cc unit */
124 &gen6_depth_stencil_state
, /* must do before cc unit */
126 &gen6_vs_push_constants
, /* Before vs_state */
127 &gen6_gs_push_constants
, /* Before gs_state */
128 &gen6_wm_push_constants
, /* Before wm_state */
130 /* Surface state setup. Must come before the VS/WM unit. The binding
131 * table upload must be last.
133 &brw_vs_pull_constants
,
134 &brw_vs_ubo_surfaces
,
135 &brw_gs_pull_constants
,
136 &brw_gs_ubo_surfaces
,
137 &brw_wm_pull_constants
,
138 &brw_wm_ubo_surfaces
,
139 &gen6_renderbuffer_surfaces
,
140 &brw_texture_surfaces
,
142 &brw_vs_binding_table
,
143 &gen6_gs_binding_table
,
144 &brw_wm_binding_table
,
150 &gen6_multisample_state
,
160 &gen6_binding_table_pointers
,
164 &brw_polygon_stipple
,
165 &brw_polygon_stipple_offset
,
168 &brw_aa_line_parameters
,
172 &brw_indices
, /* must come before brw_vertices */
177 static const struct brw_tracked_state
*gen7_atoms
[] =
179 /* Command packets: */
181 /* must do before binding table pointers, cc state ptrs */
182 &brw_state_base_address
,
185 &gen7_sf_clip_viewport
,
187 &gen7_push_constant_space
,
189 &gen6_blend_state
, /* must do before cc unit */
190 &gen6_color_calc_state
, /* must do before cc unit */
191 &gen6_depth_stencil_state
, /* must do before cc unit */
193 &gen6_vs_push_constants
, /* Before vs_state */
194 &gen6_gs_push_constants
, /* Before gs_state */
195 &gen6_wm_push_constants
, /* Before wm_surfaces and constant_buffer */
197 /* Surface state setup. Must come before the VS/WM unit. The binding
198 * table upload must be last.
200 &brw_vs_pull_constants
,
201 &brw_vs_ubo_surfaces
,
202 &brw_vs_abo_surfaces
,
203 &brw_gs_pull_constants
,
204 &brw_gs_ubo_surfaces
,
205 &brw_gs_abo_surfaces
,
206 &brw_wm_pull_constants
,
207 &brw_wm_ubo_surfaces
,
208 &brw_wm_abo_surfaces
,
209 &gen6_renderbuffer_surfaces
,
210 &brw_texture_surfaces
,
211 &brw_vs_binding_table
,
212 &brw_gs_binding_table
,
213 &brw_wm_binding_table
,
218 &gen6_multisample_state
,
220 &gen7_disable_stages
,
234 &brw_polygon_stipple
,
235 &brw_polygon_stipple_offset
,
238 &brw_aa_line_parameters
,
242 &brw_indices
, /* must come before brw_vertices */
249 static const struct brw_tracked_state
*gen8_atoms
[] =
251 /* Command packets: */
252 &gen8_state_base_address
,
255 &gen8_sf_clip_viewport
,
257 &gen7_push_constant_space
,
260 &gen6_color_calc_state
,
262 &gen6_vs_push_constants
, /* Before vs_state */
263 &gen6_gs_push_constants
, /* Before gs_state */
264 &gen6_wm_push_constants
, /* Before wm_surfaces and constant_buffer */
266 /* Surface state setup. Must come before the VS/WM unit. The binding
267 * table upload must be last.
269 &brw_vs_pull_constants
,
270 &brw_vs_ubo_surfaces
,
271 &brw_vs_abo_surfaces
,
272 &brw_gs_pull_constants
,
273 &brw_gs_ubo_surfaces
,
274 &brw_gs_abo_surfaces
,
275 &brw_wm_pull_constants
,
276 &brw_wm_ubo_surfaces
,
277 &brw_wm_abo_surfaces
,
278 &gen6_renderbuffer_surfaces
,
279 &brw_texture_surfaces
,
280 &brw_vs_binding_table
,
281 &brw_gs_binding_table
,
282 &brw_wm_binding_table
,
287 &gen8_multisample_state
,
289 &gen8_disable_stages
,
300 &gen8_wm_depth_stencil
,
307 &brw_polygon_stipple
,
308 &brw_polygon_stipple_offset
,
311 &brw_aa_line_parameters
,
326 brw_upload_initial_gpu_state(struct brw_context
*brw
)
328 /* On platforms with hardware contexts, we can set our initial GPU state
329 * right away rather than doing it via state atoms. This saves a small
330 * amount of overhead on every draw call.
336 intel_emit_post_sync_nonzero_flush(brw
);
338 brw_upload_invariant_state(brw
);
341 gen8_emit_3dstate_sample_pattern(brw
);
345 void brw_init_state( struct brw_context
*brw
)
347 struct gl_context
*ctx
= &brw
->ctx
;
348 const struct brw_tracked_state
**atoms
;
351 STATIC_ASSERT(ARRAY_SIZE(gen4_atoms
) <= ARRAY_SIZE(brw
->atoms
));
352 STATIC_ASSERT(ARRAY_SIZE(gen6_atoms
) <= ARRAY_SIZE(brw
->atoms
));
353 STATIC_ASSERT(ARRAY_SIZE(gen7_atoms
) <= ARRAY_SIZE(brw
->atoms
));
354 STATIC_ASSERT(ARRAY_SIZE(gen8_atoms
) <= ARRAY_SIZE(brw
->atoms
));
356 brw_init_caches(brw
);
360 num_atoms
= ARRAY_SIZE(gen8_atoms
);
361 } else if (brw
->gen
== 7) {
363 num_atoms
= ARRAY_SIZE(gen7_atoms
);
364 } else if (brw
->gen
== 6) {
366 num_atoms
= ARRAY_SIZE(gen6_atoms
);
369 num_atoms
= ARRAY_SIZE(gen4_atoms
);
372 brw
->num_atoms
= num_atoms
;
374 /* This is to work around brw_context::atoms being declared const. We want
375 * it to be const, but it needs to be initialized somehow!
377 struct brw_tracked_state
*context_atoms
=
378 (struct brw_tracked_state
*) &brw
->atoms
[0];
380 for (int i
= 0; i
< num_atoms
; i
++)
381 context_atoms
[i
] = *atoms
[i
];
383 while (num_atoms
--) {
384 assert((*atoms
)->dirty
.mesa
| (*atoms
)->dirty
.brw
);
385 assert((*atoms
)->emit
);
389 brw_upload_initial_gpu_state(brw
);
391 brw
->state
.dirty
.mesa
= ~0;
392 brw
->state
.dirty
.brw
= ~0ull;
394 /* ~0 is a nonsensical value which won't match anything we program, so
395 * the programming will take effect on the first time around.
397 brw
->pma_stall_bits
= ~0;
399 /* Make sure that brw->state.dirty.brw has enough bits to hold all possible
402 STATIC_ASSERT(BRW_NUM_STATE_BITS
<= 8 * sizeof(brw
->state
.dirty
.brw
));
404 ctx
->DriverFlags
.NewTransformFeedback
= BRW_NEW_TRANSFORM_FEEDBACK
;
405 ctx
->DriverFlags
.NewTransformFeedbackProg
= BRW_NEW_TRANSFORM_FEEDBACK
;
406 ctx
->DriverFlags
.NewRasterizerDiscard
= BRW_NEW_RASTERIZER_DISCARD
;
407 ctx
->DriverFlags
.NewUniformBuffer
= BRW_NEW_UNIFORM_BUFFER
;
408 ctx
->DriverFlags
.NewTextureBuffer
= BRW_NEW_TEXTURE_BUFFER
;
409 ctx
->DriverFlags
.NewAtomicBuffer
= BRW_NEW_ATOMIC_BUFFER
;
413 void brw_destroy_state( struct brw_context
*brw
)
415 brw_destroy_caches(brw
);
418 /***********************************************************************
422 check_state(const struct brw_state_flags
*a
, const struct brw_state_flags
*b
)
424 return ((a
->mesa
& b
->mesa
) | (a
->brw
& b
->brw
)) != 0;
427 static void accumulate_state( struct brw_state_flags
*a
,
428 const struct brw_state_flags
*b
)
435 static void xor_states( struct brw_state_flags
*result
,
436 const struct brw_state_flags
*a
,
437 const struct brw_state_flags
*b
)
439 result
->mesa
= a
->mesa
^ b
->mesa
;
440 result
->brw
= a
->brw
^ b
->brw
;
443 struct dirty_bit_map
{
449 #define DEFINE_BIT(name) {name, #name, 0}
451 static struct dirty_bit_map mesa_bits
[] = {
452 DEFINE_BIT(_NEW_MODELVIEW
),
453 DEFINE_BIT(_NEW_PROJECTION
),
454 DEFINE_BIT(_NEW_TEXTURE_MATRIX
),
455 DEFINE_BIT(_NEW_COLOR
),
456 DEFINE_BIT(_NEW_DEPTH
),
457 DEFINE_BIT(_NEW_EVAL
),
458 DEFINE_BIT(_NEW_FOG
),
459 DEFINE_BIT(_NEW_HINT
),
460 DEFINE_BIT(_NEW_LIGHT
),
461 DEFINE_BIT(_NEW_LINE
),
462 DEFINE_BIT(_NEW_PIXEL
),
463 DEFINE_BIT(_NEW_POINT
),
464 DEFINE_BIT(_NEW_POLYGON
),
465 DEFINE_BIT(_NEW_POLYGONSTIPPLE
),
466 DEFINE_BIT(_NEW_SCISSOR
),
467 DEFINE_BIT(_NEW_STENCIL
),
468 DEFINE_BIT(_NEW_TEXTURE
),
469 DEFINE_BIT(_NEW_TRANSFORM
),
470 DEFINE_BIT(_NEW_VIEWPORT
),
471 DEFINE_BIT(_NEW_ARRAY
),
472 DEFINE_BIT(_NEW_RENDERMODE
),
473 DEFINE_BIT(_NEW_BUFFERS
),
474 DEFINE_BIT(_NEW_CURRENT_ATTRIB
),
475 DEFINE_BIT(_NEW_MULTISAMPLE
),
476 DEFINE_BIT(_NEW_TRACK_MATRIX
),
477 DEFINE_BIT(_NEW_PROGRAM
),
478 DEFINE_BIT(_NEW_PROGRAM_CONSTANTS
),
479 DEFINE_BIT(_NEW_BUFFER_OBJECT
),
480 DEFINE_BIT(_NEW_FRAG_CLAMP
),
481 /* Avoid sign extension problems. */
482 {(unsigned) _NEW_VARYING_VP_INPUTS
, "_NEW_VARYING_VP_INPUTS", 0},
486 static struct dirty_bit_map brw_bits
[] = {
487 DEFINE_BIT(BRW_NEW_FS_PROG_DATA
),
488 DEFINE_BIT(BRW_NEW_BLORP_BLIT_PROG_DATA
),
489 DEFINE_BIT(BRW_NEW_SF_PROG_DATA
),
490 DEFINE_BIT(BRW_NEW_VS_PROG_DATA
),
491 DEFINE_BIT(BRW_NEW_FF_GS_PROG_DATA
),
492 DEFINE_BIT(BRW_NEW_GS_PROG_DATA
),
493 DEFINE_BIT(BRW_NEW_CLIP_PROG_DATA
),
494 DEFINE_BIT(BRW_NEW_URB_FENCE
),
495 DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM
),
496 DEFINE_BIT(BRW_NEW_GEOMETRY_PROGRAM
),
497 DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM
),
498 DEFINE_BIT(BRW_NEW_CURBE_OFFSETS
),
499 DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE
),
500 DEFINE_BIT(BRW_NEW_PRIMITIVE
),
501 DEFINE_BIT(BRW_NEW_CONTEXT
),
502 DEFINE_BIT(BRW_NEW_PSP
),
503 DEFINE_BIT(BRW_NEW_SURFACES
),
504 DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE
),
505 DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE
),
506 DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE
),
507 DEFINE_BIT(BRW_NEW_INDICES
),
508 DEFINE_BIT(BRW_NEW_VERTICES
),
509 DEFINE_BIT(BRW_NEW_BATCH
),
510 DEFINE_BIT(BRW_NEW_INDEX_BUFFER
),
511 DEFINE_BIT(BRW_NEW_VS_CONSTBUF
),
512 DEFINE_BIT(BRW_NEW_GS_CONSTBUF
),
513 DEFINE_BIT(BRW_NEW_PROGRAM_CACHE
),
514 DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS
),
515 DEFINE_BIT(BRW_NEW_VUE_MAP_VS
),
516 DEFINE_BIT(BRW_NEW_VUE_MAP_GEOM_OUT
),
517 DEFINE_BIT(BRW_NEW_TRANSFORM_FEEDBACK
),
518 DEFINE_BIT(BRW_NEW_RASTERIZER_DISCARD
),
519 DEFINE_BIT(BRW_NEW_STATS_WM
),
520 DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER
),
521 DEFINE_BIT(BRW_NEW_ATOMIC_BUFFER
),
522 DEFINE_BIT(BRW_NEW_META_IN_PROGRESS
),
523 DEFINE_BIT(BRW_NEW_INTERPOLATION_MAP
),
524 DEFINE_BIT(BRW_NEW_PUSH_CONSTANT_ALLOCATION
),
525 DEFINE_BIT(BRW_NEW_NUM_SAMPLES
),
526 DEFINE_BIT(BRW_NEW_TEXTURE_BUFFER
),
527 DEFINE_BIT(BRW_NEW_GEN4_UNIT_STATE
),
528 DEFINE_BIT(BRW_NEW_CC_VP
),
529 DEFINE_BIT(BRW_NEW_SF_VP
),
530 DEFINE_BIT(BRW_NEW_CLIP_VP
),
531 DEFINE_BIT(BRW_NEW_SAMPLER_STATE_TABLE
),
532 DEFINE_BIT(BRW_NEW_VS_ATTRIB_WORKAROUNDS
),
537 brw_update_dirty_count(struct dirty_bit_map
*bit_map
, uint64_t bits
)
539 for (int i
= 0; bit_map
[i
].bit
!= 0; i
++) {
540 if (bit_map
[i
].bit
& bits
)
546 brw_print_dirty_count(struct dirty_bit_map
*bit_map
)
548 for (int i
= 0; bit_map
[i
].bit
!= 0; i
++) {
549 if (bit_map
[i
].count
> 1) {
550 fprintf(stderr
, "0x%016lx: %12d (%s)\n",
551 bit_map
[i
].bit
, bit_map
[i
].count
, bit_map
[i
].name
);
557 brw_upload_programs(struct brw_context
*brw
)
559 brw_upload_vs_prog(brw
);
562 brw_upload_ff_gs_prog(brw
);
564 brw_upload_gs_prog(brw
);
566 brw_upload_wm_prog(brw
);
569 /***********************************************************************
572 void brw_upload_state(struct brw_context
*brw
)
574 struct gl_context
*ctx
= &brw
->ctx
;
575 struct brw_state_flags
*state
= &brw
->state
.dirty
;
577 static int dirty_count
= 0;
579 state
->mesa
|= brw
->NewGLState
;
582 state
->brw
|= ctx
->NewDriverState
;
583 ctx
->NewDriverState
= 0;
586 /* Always re-emit all state. */
591 if (brw
->fragment_program
!= ctx
->FragmentProgram
._Current
) {
592 brw
->fragment_program
= ctx
->FragmentProgram
._Current
;
593 brw
->state
.dirty
.brw
|= BRW_NEW_FRAGMENT_PROGRAM
;
596 if (brw
->geometry_program
!= ctx
->GeometryProgram
._Current
) {
597 brw
->geometry_program
= ctx
->GeometryProgram
._Current
;
598 brw
->state
.dirty
.brw
|= BRW_NEW_GEOMETRY_PROGRAM
;
601 if (brw
->vertex_program
!= ctx
->VertexProgram
._Current
) {
602 brw
->vertex_program
= ctx
->VertexProgram
._Current
;
603 brw
->state
.dirty
.brw
|= BRW_NEW_VERTEX_PROGRAM
;
606 if (brw
->meta_in_progress
!= _mesa_meta_in_progress(ctx
)) {
607 brw
->meta_in_progress
= _mesa_meta_in_progress(ctx
);
608 brw
->state
.dirty
.brw
|= BRW_NEW_META_IN_PROGRESS
;
611 if (brw
->num_samples
!= ctx
->DrawBuffer
->Visual
.samples
) {
612 brw
->num_samples
= ctx
->DrawBuffer
->Visual
.samples
;
613 brw
->state
.dirty
.brw
|= BRW_NEW_NUM_SAMPLES
;
616 if ((state
->mesa
| state
->brw
) == 0)
619 /* Emit Sandybridge workaround flushes on every primitive, for safety. */
621 intel_emit_post_sync_nonzero_flush(brw
);
623 brw_upload_programs(brw
);
625 if (unlikely(INTEL_DEBUG
)) {
626 /* Debug version which enforces various sanity checks on the
627 * state flags which are generated and checked to help ensure
628 * state atoms are ordered correctly in the list.
630 struct brw_state_flags examined
, prev
;
631 memset(&examined
, 0, sizeof(examined
));
634 for (i
= 0; i
< brw
->num_atoms
; i
++) {
635 const struct brw_tracked_state
*atom
= &brw
->atoms
[i
];
636 struct brw_state_flags generated
;
638 if (check_state(state
, &atom
->dirty
)) {
642 accumulate_state(&examined
, &atom
->dirty
);
644 /* generated = (prev ^ state)
645 * if (examined & generated)
648 xor_states(&generated
, &prev
, state
);
649 assert(!check_state(&examined
, &generated
));
654 for (i
= 0; i
< brw
->num_atoms
; i
++) {
655 const struct brw_tracked_state
*atom
= &brw
->atoms
[i
];
657 if (check_state(state
, &atom
->dirty
)) {
663 if (unlikely(INTEL_DEBUG
& DEBUG_STATE
)) {
664 STATIC_ASSERT(ARRAY_SIZE(brw_bits
) == BRW_NUM_STATE_BITS
+ 1);
666 brw_update_dirty_count(mesa_bits
, state
->mesa
);
667 brw_update_dirty_count(brw_bits
, state
->brw
);
668 if (dirty_count
++ % 1000 == 0) {
669 brw_print_dirty_count(mesa_bits
);
670 brw_print_dirty_count(brw_bits
);
671 fprintf(stderr
, "\n");
678 * Clear dirty bits to account for the fact that the state emitted by
679 * brw_upload_state() has been committed to the hardware. This is a separate
680 * call from brw_upload_state() because it's possible that after the call to
681 * brw_upload_state(), we will discover that we've run out of aperture space,
682 * and need to rewind the batch buffer to the state it had before the
683 * brw_upload_state() call.
686 brw_clear_dirty_bits(struct brw_context
*brw
)
688 struct brw_state_flags
*state
= &brw
->state
.dirty
;
689 memset(state
, 0, sizeof(*state
));