2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "drivers/common/meta.h"
37 #include "intel_batchbuffer.h"
38 #include "intel_buffers.h"
40 static const struct brw_tracked_state
*gen4_atoms
[] =
42 &brw_vs_prog
, /* must do before GS prog, state base address. */
43 &brw_ff_gs_prog
, /* must do before state base address */
45 &brw_interpolation_map
,
47 &brw_clip_prog
, /* must do before state base address */
48 &brw_sf_prog
, /* must do before state base address */
49 &brw_wm_prog
, /* must do before state base address */
51 /* Once all the programs are done, we know how large urb entry
52 * sizes need to be and can decide if we need to change the urb
56 &brw_recalculate_urb_fence
,
61 /* Surface state setup. Must come before the VS/WM unit. The binding
62 * table upload must be last.
64 &brw_vs_pull_constants
,
65 &brw_wm_pull_constants
,
66 &brw_renderbuffer_surfaces
,
67 &brw_texture_surfaces
,
68 &brw_vs_binding_table
,
69 &brw_wm_binding_table
,
74 /* These set up state for brw_psp_urb_cbs */
78 &brw_vs_unit
, /* always required, enabled or not */
85 &brw_state_base_address
,
87 &brw_binding_table_pointers
,
88 &brw_blend_constant_color
,
93 &brw_polygon_stipple_offset
,
96 &brw_aa_line_parameters
,
108 static const struct brw_tracked_state
*gen6_atoms
[] =
110 &brw_vs_prog
, /* must do before state base address */
111 &brw_ff_gs_prog
, /* must do before state base address */
112 &brw_wm_prog
, /* must do before state base address */
117 /* Command packets: */
119 /* must do before binding table pointers, cc state ptrs */
120 &brw_state_base_address
,
123 &gen6_viewport_state
, /* must do after *_vp stages */
126 &gen6_blend_state
, /* must do before cc unit */
127 &gen6_color_calc_state
, /* must do before cc unit */
128 &gen6_depth_stencil_state
, /* must do before cc unit */
130 &gen6_vs_push_constants
, /* Before vs_state */
131 &gen6_wm_push_constants
, /* Before wm_state */
133 /* Surface state setup. Must come before the VS/WM unit. The binding
134 * table upload must be last.
136 &brw_vs_pull_constants
,
137 &brw_vs_ubo_surfaces
,
138 &brw_wm_pull_constants
,
139 &brw_wm_ubo_surfaces
,
140 &gen6_renderbuffer_surfaces
,
141 &brw_texture_surfaces
,
143 &brw_vs_binding_table
,
144 &gen6_gs_binding_table
,
145 &brw_wm_binding_table
,
150 &gen6_multisample_state
,
160 &gen6_binding_table_pointers
,
164 &brw_polygon_stipple
,
165 &brw_polygon_stipple_offset
,
168 &brw_aa_line_parameters
,
177 static const struct brw_tracked_state
*gen7_atoms
[] =
183 /* Command packets: */
185 /* must do before binding table pointers, cc state ptrs */
186 &brw_state_base_address
,
189 &gen7_cc_viewport_state_pointer
, /* must do after brw_cc_vp */
190 &gen7_sf_clip_viewport
,
192 &gen7_push_constant_space
,
194 &gen6_blend_state
, /* must do before cc unit */
195 &gen6_color_calc_state
, /* must do before cc unit */
196 &gen6_depth_stencil_state
, /* must do before cc unit */
198 &gen6_vs_push_constants
, /* Before vs_state */
199 &gen7_gs_push_constants
, /* Before gs_state */
200 &gen6_wm_push_constants
, /* Before wm_surfaces and constant_buffer */
202 /* Surface state setup. Must come before the VS/WM unit. The binding
203 * table upload must be last.
205 &brw_vs_pull_constants
,
206 &brw_vs_ubo_surfaces
,
207 &brw_vs_abo_surfaces
,
208 &brw_gs_pull_constants
,
209 &brw_gs_ubo_surfaces
,
210 &brw_gs_abo_surfaces
,
211 &brw_wm_pull_constants
,
212 &brw_wm_ubo_surfaces
,
213 &brw_wm_abo_surfaces
,
214 &gen6_renderbuffer_surfaces
,
215 &brw_texture_surfaces
,
216 &brw_vs_binding_table
,
217 &brw_gs_binding_table
,
218 &brw_wm_binding_table
,
223 &gen6_multisample_state
,
225 &gen7_disable_stages
,
239 &brw_polygon_stipple
,
240 &brw_polygon_stipple_offset
,
243 &brw_aa_line_parameters
,
254 static const struct brw_tracked_state
*gen8_atoms
[] =
260 /* Command packets: */
261 &gen8_state_base_address
,
264 &gen7_cc_viewport_state_pointer
, /* must do after brw_cc_vp */
265 &gen8_sf_clip_viewport
,
267 &gen7_push_constant_space
,
270 &gen6_color_calc_state
,
272 &gen6_vs_push_constants
, /* Before vs_state */
273 &gen7_gs_push_constants
, /* Before gs_state */
274 &gen6_wm_push_constants
, /* Before wm_surfaces and constant_buffer */
276 /* Surface state setup. Must come before the VS/WM unit. The binding
277 * table upload must be last.
279 &brw_vs_pull_constants
,
280 &brw_vs_ubo_surfaces
,
281 &brw_vs_abo_surfaces
,
282 &brw_gs_pull_constants
,
283 &brw_gs_ubo_surfaces
,
284 &brw_gs_abo_surfaces
,
285 &brw_wm_pull_constants
,
286 &brw_wm_ubo_surfaces
,
287 &brw_wm_abo_surfaces
,
288 &gen6_renderbuffer_surfaces
,
289 &brw_texture_surfaces
,
290 &brw_vs_binding_table
,
291 &brw_gs_binding_table
,
292 &brw_wm_binding_table
,
297 &gen8_multisample_state
,
299 &gen8_disable_stages
,
310 &gen8_wm_depth_stencil
,
317 &brw_polygon_stipple
,
318 &brw_polygon_stipple_offset
,
321 &brw_aa_line_parameters
,
335 brw_upload_initial_gpu_state(struct brw_context
*brw
)
337 /* On platforms with hardware contexts, we can set our initial GPU state
338 * right away rather than doing it via state atoms. This saves a small
339 * amount of overhead on every draw call.
344 brw_upload_invariant_state(brw
);
347 gen8_emit_3dstate_sample_pattern(brw
);
351 void brw_init_state( struct brw_context
*brw
)
353 struct gl_context
*ctx
= &brw
->ctx
;
354 const struct brw_tracked_state
**atoms
;
357 brw_init_caches(brw
);
361 num_atoms
= ARRAY_SIZE(gen8_atoms
);
362 } else if (brw
->gen
== 7) {
364 num_atoms
= ARRAY_SIZE(gen7_atoms
);
365 } else if (brw
->gen
== 6) {
367 num_atoms
= ARRAY_SIZE(gen6_atoms
);
370 num_atoms
= ARRAY_SIZE(gen4_atoms
);
374 brw
->num_atoms
= num_atoms
;
376 while (num_atoms
--) {
377 assert((*atoms
)->dirty
.mesa
|
378 (*atoms
)->dirty
.brw
|
379 (*atoms
)->dirty
.cache
);
380 assert((*atoms
)->emit
);
384 brw_upload_initial_gpu_state(brw
);
386 brw
->state
.dirty
.mesa
= ~0;
387 brw
->state
.dirty
.brw
= ~0;
389 /* Make sure that brw->state.dirty.brw has enough bits to hold all possible
392 STATIC_ASSERT(BRW_NUM_STATE_BITS
<= 8 * sizeof(brw
->state
.dirty
.brw
));
394 ctx
->DriverFlags
.NewTransformFeedback
= BRW_NEW_TRANSFORM_FEEDBACK
;
395 ctx
->DriverFlags
.NewTransformFeedbackProg
= BRW_NEW_TRANSFORM_FEEDBACK
;
396 ctx
->DriverFlags
.NewRasterizerDiscard
= BRW_NEW_RASTERIZER_DISCARD
;
397 ctx
->DriverFlags
.NewUniformBuffer
= BRW_NEW_UNIFORM_BUFFER
;
398 ctx
->DriverFlags
.NewAtomicBuffer
= BRW_NEW_ATOMIC_BUFFER
;
402 void brw_destroy_state( struct brw_context
*brw
)
404 brw_destroy_caches(brw
);
407 /***********************************************************************
411 check_state(const struct brw_state_flags
*a
, const struct brw_state_flags
*b
)
413 return ((a
->mesa
& b
->mesa
) |
415 (a
->cache
& b
->cache
)) != 0;
418 static void accumulate_state( struct brw_state_flags
*a
,
419 const struct brw_state_flags
*b
)
423 a
->cache
|= b
->cache
;
427 static void xor_states( struct brw_state_flags
*result
,
428 const struct brw_state_flags
*a
,
429 const struct brw_state_flags
*b
)
431 result
->mesa
= a
->mesa
^ b
->mesa
;
432 result
->brw
= a
->brw
^ b
->brw
;
433 result
->cache
= a
->cache
^ b
->cache
;
436 struct dirty_bit_map
{
442 #define DEFINE_BIT(name) {name, #name, 0}
444 static struct dirty_bit_map mesa_bits
[] = {
445 DEFINE_BIT(_NEW_MODELVIEW
),
446 DEFINE_BIT(_NEW_PROJECTION
),
447 DEFINE_BIT(_NEW_TEXTURE_MATRIX
),
448 DEFINE_BIT(_NEW_COLOR
),
449 DEFINE_BIT(_NEW_DEPTH
),
450 DEFINE_BIT(_NEW_EVAL
),
451 DEFINE_BIT(_NEW_FOG
),
452 DEFINE_BIT(_NEW_HINT
),
453 DEFINE_BIT(_NEW_LIGHT
),
454 DEFINE_BIT(_NEW_LINE
),
455 DEFINE_BIT(_NEW_PIXEL
),
456 DEFINE_BIT(_NEW_POINT
),
457 DEFINE_BIT(_NEW_POLYGON
),
458 DEFINE_BIT(_NEW_POLYGONSTIPPLE
),
459 DEFINE_BIT(_NEW_SCISSOR
),
460 DEFINE_BIT(_NEW_STENCIL
),
461 DEFINE_BIT(_NEW_TEXTURE
),
462 DEFINE_BIT(_NEW_TRANSFORM
),
463 DEFINE_BIT(_NEW_VIEWPORT
),
464 DEFINE_BIT(_NEW_ARRAY
),
465 DEFINE_BIT(_NEW_RENDERMODE
),
466 DEFINE_BIT(_NEW_BUFFERS
),
467 DEFINE_BIT(_NEW_CURRENT_ATTRIB
),
468 DEFINE_BIT(_NEW_MULTISAMPLE
),
469 DEFINE_BIT(_NEW_TRACK_MATRIX
),
470 DEFINE_BIT(_NEW_PROGRAM
),
471 DEFINE_BIT(_NEW_PROGRAM_CONSTANTS
),
472 DEFINE_BIT(_NEW_BUFFER_OBJECT
),
473 DEFINE_BIT(_NEW_FRAG_CLAMP
),
474 DEFINE_BIT(_NEW_VARYING_VP_INPUTS
),
478 static struct dirty_bit_map brw_bits
[] = {
479 DEFINE_BIT(BRW_NEW_URB_FENCE
),
480 DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM
),
481 DEFINE_BIT(BRW_NEW_GEOMETRY_PROGRAM
),
482 DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM
),
483 DEFINE_BIT(BRW_NEW_CURBE_OFFSETS
),
484 DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE
),
485 DEFINE_BIT(BRW_NEW_PRIMITIVE
),
486 DEFINE_BIT(BRW_NEW_CONTEXT
),
487 DEFINE_BIT(BRW_NEW_PSP
),
488 DEFINE_BIT(BRW_NEW_SURFACES
),
489 DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE
),
490 DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE
),
491 DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE
),
492 DEFINE_BIT(BRW_NEW_INDICES
),
493 DEFINE_BIT(BRW_NEW_VERTICES
),
494 DEFINE_BIT(BRW_NEW_BATCH
),
495 DEFINE_BIT(BRW_NEW_INDEX_BUFFER
),
496 DEFINE_BIT(BRW_NEW_VS_CONSTBUF
),
497 DEFINE_BIT(BRW_NEW_GS_CONSTBUF
),
498 DEFINE_BIT(BRW_NEW_PROGRAM_CACHE
),
499 DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS
),
500 DEFINE_BIT(BRW_NEW_VUE_MAP_VS
),
501 DEFINE_BIT(BRW_NEW_VUE_MAP_GEOM_OUT
),
502 DEFINE_BIT(BRW_NEW_TRANSFORM_FEEDBACK
),
503 DEFINE_BIT(BRW_NEW_RASTERIZER_DISCARD
),
504 DEFINE_BIT(BRW_NEW_STATS_WM
),
505 DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER
),
506 DEFINE_BIT(BRW_NEW_ATOMIC_BUFFER
),
507 DEFINE_BIT(BRW_NEW_META_IN_PROGRESS
),
508 DEFINE_BIT(BRW_NEW_INTERPOLATION_MAP
),
509 DEFINE_BIT(BRW_NEW_PUSH_CONSTANT_ALLOCATION
),
513 static struct dirty_bit_map cache_bits
[] = {
514 DEFINE_BIT(CACHE_NEW_CC_VP
),
515 DEFINE_BIT(CACHE_NEW_CC_UNIT
),
516 DEFINE_BIT(CACHE_NEW_WM_PROG
),
517 DEFINE_BIT(CACHE_NEW_BLORP_BLIT_PROG
),
518 DEFINE_BIT(CACHE_NEW_BLORP_CONST_COLOR_PROG
),
519 DEFINE_BIT(CACHE_NEW_SAMPLER
),
520 DEFINE_BIT(CACHE_NEW_WM_UNIT
),
521 DEFINE_BIT(CACHE_NEW_SF_PROG
),
522 DEFINE_BIT(CACHE_NEW_SF_VP
),
523 DEFINE_BIT(CACHE_NEW_SF_UNIT
),
524 DEFINE_BIT(CACHE_NEW_VS_UNIT
),
525 DEFINE_BIT(CACHE_NEW_VS_PROG
),
526 DEFINE_BIT(CACHE_NEW_FF_GS_UNIT
),
527 DEFINE_BIT(CACHE_NEW_FF_GS_PROG
),
528 DEFINE_BIT(CACHE_NEW_GS_PROG
),
529 DEFINE_BIT(CACHE_NEW_CLIP_VP
),
530 DEFINE_BIT(CACHE_NEW_CLIP_UNIT
),
531 DEFINE_BIT(CACHE_NEW_CLIP_PROG
),
537 brw_update_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
541 for (i
= 0; i
< 32; i
++) {
542 if (bit_map
[i
].bit
== 0)
545 if (bit_map
[i
].bit
& bits
)
551 brw_print_dirty_count(struct dirty_bit_map
*bit_map
)
555 for (i
= 0; i
< 32; i
++) {
556 if (bit_map
[i
].bit
== 0)
559 fprintf(stderr
, "0x%08x: %12d (%s)\n",
560 bit_map
[i
].bit
, bit_map
[i
].count
, bit_map
[i
].name
);
564 /***********************************************************************
567 void brw_upload_state(struct brw_context
*brw
)
569 struct gl_context
*ctx
= &brw
->ctx
;
570 struct brw_state_flags
*state
= &brw
->state
.dirty
;
572 static int dirty_count
= 0;
574 state
->mesa
|= brw
->NewGLState
;
577 state
->brw
|= ctx
->NewDriverState
;
578 ctx
->NewDriverState
= 0;
581 /* Always re-emit all state. */
587 if (brw
->fragment_program
!= ctx
->FragmentProgram
._Current
) {
588 brw
->fragment_program
= ctx
->FragmentProgram
._Current
;
589 brw
->state
.dirty
.brw
|= BRW_NEW_FRAGMENT_PROGRAM
;
592 if (brw
->geometry_program
!= ctx
->GeometryProgram
._Current
) {
593 brw
->geometry_program
= ctx
->GeometryProgram
._Current
;
594 brw
->state
.dirty
.brw
|= BRW_NEW_GEOMETRY_PROGRAM
;
597 if (brw
->vertex_program
!= ctx
->VertexProgram
._Current
) {
598 brw
->vertex_program
= ctx
->VertexProgram
._Current
;
599 brw
->state
.dirty
.brw
|= BRW_NEW_VERTEX_PROGRAM
;
602 if (brw
->meta_in_progress
!= _mesa_meta_in_progress(ctx
)) {
603 brw
->meta_in_progress
= _mesa_meta_in_progress(ctx
);
604 brw
->state
.dirty
.brw
|= BRW_NEW_META_IN_PROGRESS
;
607 if ((state
->mesa
| state
->cache
| state
->brw
) == 0)
610 intel_check_front_buffer_rendering(brw
);
612 if (unlikely(INTEL_DEBUG
)) {
613 /* Debug version which enforces various sanity checks on the
614 * state flags which are generated and checked to help ensure
615 * state atoms are ordered correctly in the list.
617 struct brw_state_flags examined
, prev
;
618 memset(&examined
, 0, sizeof(examined
));
621 for (i
= 0; i
< brw
->num_atoms
; i
++) {
622 const struct brw_tracked_state
*atom
= brw
->atoms
[i
];
623 struct brw_state_flags generated
;
625 if (check_state(state
, &atom
->dirty
)) {
629 accumulate_state(&examined
, &atom
->dirty
);
631 /* generated = (prev ^ state)
632 * if (examined & generated)
635 xor_states(&generated
, &prev
, state
);
636 assert(!check_state(&examined
, &generated
));
641 for (i
= 0; i
< brw
->num_atoms
; i
++) {
642 const struct brw_tracked_state
*atom
= brw
->atoms
[i
];
644 if (check_state(state
, &atom
->dirty
)) {
650 if (unlikely(INTEL_DEBUG
& DEBUG_STATE
)) {
651 STATIC_ASSERT(ARRAY_SIZE(brw_bits
) == BRW_NUM_STATE_BITS
+ 1);
652 STATIC_ASSERT(ARRAY_SIZE(cache_bits
) == BRW_MAX_CACHE
+ 1);
654 brw_update_dirty_count(mesa_bits
, state
->mesa
);
655 brw_update_dirty_count(brw_bits
, state
->brw
);
656 brw_update_dirty_count(cache_bits
, state
->cache
);
657 if (dirty_count
++ % 1000 == 0) {
658 brw_print_dirty_count(mesa_bits
);
659 brw_print_dirty_count(brw_bits
);
660 brw_print_dirty_count(cache_bits
);
661 fprintf(stderr
, "\n");
668 * Clear dirty bits to account for the fact that the state emitted by
669 * brw_upload_state() has been committed to the hardware. This is a separate
670 * call from brw_upload_state() because it's possible that after the call to
671 * brw_upload_state(), we will discover that we've run out of aperture space,
672 * and need to rewind the batch buffer to the state it had before the
673 * brw_upload_state() call.
676 brw_clear_dirty_bits(struct brw_context
*brw
)
678 struct brw_state_flags
*state
= &brw
->state
.dirty
;
679 memset(state
, 0, sizeof(*state
));