2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "intel_batchbuffer.h"
37 #include "intel_buffers.h"
39 /* This is used to initialize brw->state.atoms[]. We could use this
40 * list directly except for a single atom, brw_constant_buffer, which
41 * has a .dirty value which changes according to the parameters of the
42 * current fragment and vertex programs, and so cannot be a static
45 static const struct brw_tracked_state
*gen4_atoms
[] =
56 /* Once all the programs are done, we know how large urb entry
57 * sizes need to be and can decide if we need to change the urb
61 &brw_recalculate_urb_fence
,
65 &brw_vs_constants
, /* Before vs_surfaces and constant_buffer */
66 &brw_wm_constants
, /* Before wm_surfaces and constant_buffer */
68 &brw_vs_surfaces
, /* must do before unit */
69 &brw_wm_constant_surface
, /* must do before wm surfaces/bind bo */
70 &brw_wm_surfaces
, /* must do before samplers and unit */
71 &brw_wm_binding_table
,
77 &brw_vs_unit
, /* always required, enabled or not */
84 &brw_state_base_address
,
86 &brw_binding_table_pointers
,
87 &brw_blend_constant_color
,
92 &brw_polygon_stipple_offset
,
95 &brw_aa_line_parameters
,
107 const struct brw_tracked_state
*gen6_atoms
[] =
119 /* Command packets: */
120 &brw_invarient_state
,
122 &gen6_viewport_state
, /* must do after *_vp stages */
125 &gen6_blend_state
, /* must do before cc unit */
126 &gen6_color_calc_state
, /* must do before cc unit */
127 &gen6_depth_stencil_state
, /* must do before cc unit */
128 &gen6_cc_state_pointers
,
130 &brw_vs_constants
, /* Before vs_surfaces and constant_buffer */
131 &brw_wm_constants
, /* Before wm_surfaces and constant_buffer */
132 &gen6_wm_constants
, /* Before wm_state */
134 &brw_vs_surfaces
, /* must do before unit */
135 &brw_wm_constant_surface
, /* must do before wm surfaces/bind bo */
136 &brw_wm_surfaces
, /* must do before samplers and unit */
137 &brw_wm_binding_table
,
149 &gen6_scissor_state_pointers
,
151 &brw_state_base_address
,
153 &gen6_binding_table_pointers
,
157 &brw_polygon_stipple
,
158 &brw_polygon_stipple_offset
,
161 &brw_aa_line_parameters
,
170 void brw_init_state( struct brw_context
*brw
)
172 brw_init_caches(brw
);
176 void brw_destroy_state( struct brw_context
*brw
)
178 brw_destroy_caches(brw
);
181 /***********************************************************************
184 static GLuint
check_state( const struct brw_state_flags
*a
,
185 const struct brw_state_flags
*b
)
187 return ((a
->mesa
& b
->mesa
) |
189 (a
->cache
& b
->cache
));
192 static void accumulate_state( struct brw_state_flags
*a
,
193 const struct brw_state_flags
*b
)
197 a
->cache
|= b
->cache
;
201 static void xor_states( struct brw_state_flags
*result
,
202 const struct brw_state_flags
*a
,
203 const struct brw_state_flags
*b
)
205 result
->mesa
= a
->mesa
^ b
->mesa
;
206 result
->brw
= a
->brw
^ b
->brw
;
207 result
->cache
= a
->cache
^ b
->cache
;
211 brw_clear_validated_bos(struct brw_context
*brw
)
215 /* Clear the last round of validated bos */
216 for (i
= 0; i
< brw
->state
.validated_bo_count
; i
++) {
217 drm_intel_bo_unreference(brw
->state
.validated_bos
[i
]);
218 brw
->state
.validated_bos
[i
] = NULL
;
220 brw
->state
.validated_bo_count
= 0;
223 struct dirty_bit_map
{
229 #define DEFINE_BIT(name) {name, #name, 0}
231 static struct dirty_bit_map mesa_bits
[] = {
232 DEFINE_BIT(_NEW_MODELVIEW
),
233 DEFINE_BIT(_NEW_PROJECTION
),
234 DEFINE_BIT(_NEW_TEXTURE_MATRIX
),
235 DEFINE_BIT(_NEW_COLOR
),
236 DEFINE_BIT(_NEW_DEPTH
),
237 DEFINE_BIT(_NEW_EVAL
),
238 DEFINE_BIT(_NEW_FOG
),
239 DEFINE_BIT(_NEW_HINT
),
240 DEFINE_BIT(_NEW_LIGHT
),
241 DEFINE_BIT(_NEW_LINE
),
242 DEFINE_BIT(_NEW_PIXEL
),
243 DEFINE_BIT(_NEW_POINT
),
244 DEFINE_BIT(_NEW_POLYGON
),
245 DEFINE_BIT(_NEW_POLYGONSTIPPLE
),
246 DEFINE_BIT(_NEW_SCISSOR
),
247 DEFINE_BIT(_NEW_STENCIL
),
248 DEFINE_BIT(_NEW_TEXTURE
),
249 DEFINE_BIT(_NEW_TRANSFORM
),
250 DEFINE_BIT(_NEW_VIEWPORT
),
251 DEFINE_BIT(_NEW_PACKUNPACK
),
252 DEFINE_BIT(_NEW_ARRAY
),
253 DEFINE_BIT(_NEW_RENDERMODE
),
254 DEFINE_BIT(_NEW_BUFFERS
),
255 DEFINE_BIT(_NEW_MULTISAMPLE
),
256 DEFINE_BIT(_NEW_TRACK_MATRIX
),
257 DEFINE_BIT(_NEW_PROGRAM
),
258 DEFINE_BIT(_NEW_PROGRAM_CONSTANTS
),
262 static struct dirty_bit_map brw_bits
[] = {
263 DEFINE_BIT(BRW_NEW_URB_FENCE
),
264 DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM
),
265 DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM
),
266 DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS
),
267 DEFINE_BIT(BRW_NEW_CURBE_OFFSETS
),
268 DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE
),
269 DEFINE_BIT(BRW_NEW_PRIMITIVE
),
270 DEFINE_BIT(BRW_NEW_CONTEXT
),
271 DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS
),
272 DEFINE_BIT(BRW_NEW_PSP
),
273 DEFINE_BIT(BRW_NEW_WM_SURFACES
),
274 DEFINE_BIT(BRW_NEW_BINDING_TABLE
),
275 DEFINE_BIT(BRW_NEW_INDICES
),
276 DEFINE_BIT(BRW_NEW_INDEX_BUFFER
),
277 DEFINE_BIT(BRW_NEW_VERTICES
),
278 DEFINE_BIT(BRW_NEW_BATCH
),
279 DEFINE_BIT(BRW_NEW_DEPTH_BUFFER
),
280 DEFINE_BIT(BRW_NEW_NR_WM_SURFACES
),
281 DEFINE_BIT(BRW_NEW_NR_VS_SURFACES
),
282 DEFINE_BIT(BRW_NEW_VS_CONSTBUF
),
283 DEFINE_BIT(BRW_NEW_WM_CONSTBUF
),
287 static struct dirty_bit_map cache_bits
[] = {
288 DEFINE_BIT(CACHE_NEW_BLEND_STATE
),
289 DEFINE_BIT(CACHE_NEW_CC_VP
),
290 DEFINE_BIT(CACHE_NEW_CC_UNIT
),
291 DEFINE_BIT(CACHE_NEW_WM_PROG
),
292 DEFINE_BIT(CACHE_NEW_SAMPLER_DEFAULT_COLOR
),
293 DEFINE_BIT(CACHE_NEW_SAMPLER
),
294 DEFINE_BIT(CACHE_NEW_WM_UNIT
),
295 DEFINE_BIT(CACHE_NEW_SF_PROG
),
296 DEFINE_BIT(CACHE_NEW_SF_VP
),
297 DEFINE_BIT(CACHE_NEW_SF_UNIT
),
298 DEFINE_BIT(CACHE_NEW_VS_UNIT
),
299 DEFINE_BIT(CACHE_NEW_VS_PROG
),
300 DEFINE_BIT(CACHE_NEW_GS_UNIT
),
301 DEFINE_BIT(CACHE_NEW_GS_PROG
),
302 DEFINE_BIT(CACHE_NEW_CLIP_VP
),
303 DEFINE_BIT(CACHE_NEW_CLIP_UNIT
),
304 DEFINE_BIT(CACHE_NEW_CLIP_PROG
),
310 brw_update_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
314 for (i
= 0; i
< 32; i
++) {
315 if (bit_map
[i
].bit
== 0)
318 if (bit_map
[i
].bit
& bits
)
324 brw_print_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
328 for (i
= 0; i
< 32; i
++) {
329 if (bit_map
[i
].bit
== 0)
332 fprintf(stderr
, "0x%08x: %12d (%s)\n",
333 bit_map
[i
].bit
, bit_map
[i
].count
, bit_map
[i
].name
);
337 /***********************************************************************
340 void brw_validate_state( struct brw_context
*brw
)
342 struct gl_context
*ctx
= &brw
->intel
.ctx
;
343 struct intel_context
*intel
= &brw
->intel
;
344 struct brw_state_flags
*state
= &brw
->state
.dirty
;
346 const struct brw_tracked_state
**atoms
;
349 brw_clear_validated_bos(brw
);
351 state
->mesa
|= brw
->intel
.NewGLState
;
352 brw
->intel
.NewGLState
= 0;
354 brw_add_validated_bo(brw
, intel
->batch
.bo
);
356 if (intel
->gen
>= 6) {
358 num_atoms
= ARRAY_SIZE(gen6_atoms
);
361 num_atoms
= ARRAY_SIZE(gen4_atoms
);
364 if (brw
->emit_state_always
) {
370 if (brw
->fragment_program
!= ctx
->FragmentProgram
._Current
) {
371 brw
->fragment_program
= ctx
->FragmentProgram
._Current
;
372 brw
->state
.dirty
.brw
|= BRW_NEW_FRAGMENT_PROGRAM
;
375 if (brw
->vertex_program
!= ctx
->VertexProgram
._Current
) {
376 brw
->vertex_program
= ctx
->VertexProgram
._Current
;
377 brw
->state
.dirty
.brw
|= BRW_NEW_VERTEX_PROGRAM
;
380 if ((state
->mesa
| state
->cache
| state
->brw
) == 0)
383 brw
->intel
.Fallback
= GL_FALSE
; /* boolean, not bitfield */
385 /* do prepare stage for all atoms */
386 for (i
= 0; i
< num_atoms
; i
++) {
387 const struct brw_tracked_state
*atom
= atoms
[i
];
389 if (brw
->intel
.Fallback
)
392 if (check_state(state
, &atom
->dirty
)) {
399 intel_check_front_buffer_rendering(intel
);
401 /* Make sure that the textures which are referenced by the current
402 * brw fragment program are actually present/valid.
403 * If this fails, we can experience GPU lock-ups.
406 const struct brw_fragment_program
*fp
;
407 fp
= brw_fragment_program_const(brw
->fragment_program
);
409 assert((fp
->tex_units_used
& ctx
->Texture
._EnabledUnits
)
410 == fp
->tex_units_used
);
416 void brw_upload_state(struct brw_context
*brw
)
418 struct intel_context
*intel
= &brw
->intel
;
419 struct brw_state_flags
*state
= &brw
->state
.dirty
;
421 static int dirty_count
= 0;
422 const struct brw_tracked_state
**atoms
;
425 if (intel
->gen
>= 6) {
427 num_atoms
= ARRAY_SIZE(gen6_atoms
);
430 num_atoms
= ARRAY_SIZE(gen4_atoms
);
433 brw_clear_validated_bos(brw
);
435 if (unlikely(INTEL_DEBUG
)) {
436 /* Debug version which enforces various sanity checks on the
437 * state flags which are generated and checked to help ensure
438 * state atoms are ordered correctly in the list.
440 struct brw_state_flags examined
, prev
;
441 memset(&examined
, 0, sizeof(examined
));
444 for (i
= 0; i
< num_atoms
; i
++) {
445 const struct brw_tracked_state
*atom
= atoms
[i
];
446 struct brw_state_flags generated
;
448 assert(atom
->dirty
.mesa
||
452 if (brw
->intel
.Fallback
)
455 if (check_state(state
, &atom
->dirty
)) {
461 accumulate_state(&examined
, &atom
->dirty
);
463 /* generated = (prev ^ state)
464 * if (examined & generated)
467 xor_states(&generated
, &prev
, state
);
468 assert(!check_state(&examined
, &generated
));
473 for (i
= 0; i
< num_atoms
; i
++) {
474 const struct brw_tracked_state
*atom
= atoms
[i
];
476 if (brw
->intel
.Fallback
)
479 if (check_state(state
, &atom
->dirty
)) {
487 if (unlikely(INTEL_DEBUG
& DEBUG_STATE
)) {
488 brw_update_dirty_count(mesa_bits
, state
->mesa
);
489 brw_update_dirty_count(brw_bits
, state
->brw
);
490 brw_update_dirty_count(cache_bits
, state
->cache
);
491 if (dirty_count
++ % 1000 == 0) {
492 brw_print_dirty_count(mesa_bits
, state
->mesa
);
493 brw_print_dirty_count(brw_bits
, state
->brw
);
494 brw_print_dirty_count(cache_bits
, state
->cache
);
495 fprintf(stderr
, "\n");
499 if (!brw
->intel
.Fallback
)
500 memset(state
, 0, sizeof(*state
));