2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "drivers/common/meta.h"
37 #include "intel_batchbuffer.h"
38 #include "intel_buffers.h"
40 static const struct brw_tracked_state
*gen4_atoms
[] =
42 &brw_vs_prog
, /* must do before GS prog, state base address. */
43 &brw_ff_gs_prog
, /* must do before state base address */
45 &brw_interpolation_map
,
47 &brw_clip_prog
, /* must do before state base address */
48 &brw_sf_prog
, /* must do before state base address */
49 &brw_wm_prog
, /* must do before state base address */
51 /* Once all the programs are done, we know how large urb entry
52 * sizes need to be and can decide if we need to change the urb
56 &brw_recalculate_urb_fence
,
61 /* Surface state setup. Must come before the VS/WM unit. The binding
62 * table upload must be last.
64 &brw_vs_pull_constants
,
65 &brw_wm_pull_constants
,
66 &brw_renderbuffer_surfaces
,
67 &brw_texture_surfaces
,
68 &brw_vs_binding_table
,
69 &brw_wm_binding_table
,
74 /* These set up state for brw_psp_urb_cbs */
78 &brw_vs_unit
, /* always required, enabled or not */
85 &brw_state_base_address
,
87 &brw_binding_table_pointers
,
88 &brw_blend_constant_color
,
93 &brw_polygon_stipple_offset
,
96 &brw_aa_line_parameters
,
108 static const struct brw_tracked_state
*gen6_atoms
[] =
110 &brw_vs_prog
, /* must do before state base address */
111 &brw_ff_gs_prog
, /* must do before state base address */
112 &brw_wm_prog
, /* must do before state base address */
117 /* Command packets: */
119 /* must do before binding table pointers, cc state ptrs */
120 &brw_state_base_address
,
123 &gen6_viewport_state
, /* must do after *_vp stages */
126 &gen6_blend_state
, /* must do before cc unit */
127 &gen6_color_calc_state
, /* must do before cc unit */
128 &gen6_depth_stencil_state
, /* must do before cc unit */
130 &gen6_vs_push_constants
, /* Before vs_state */
131 &gen6_wm_push_constants
, /* Before wm_state */
133 /* Surface state setup. Must come before the VS/WM unit. The binding
134 * table upload must be last.
136 &brw_vs_pull_constants
,
137 &brw_vs_ubo_surfaces
,
138 &brw_wm_pull_constants
,
139 &brw_wm_ubo_surfaces
,
140 &gen6_renderbuffer_surfaces
,
141 &brw_texture_surfaces
,
143 &brw_vs_binding_table
,
144 &gen6_gs_binding_table
,
145 &brw_wm_binding_table
,
150 &gen6_multisample_state
,
160 &gen6_binding_table_pointers
,
164 &brw_polygon_stipple
,
165 &brw_polygon_stipple_offset
,
168 &brw_aa_line_parameters
,
177 static const struct brw_tracked_state
*gen7_atoms
[] =
183 /* Command packets: */
185 /* must do before binding table pointers, cc state ptrs */
186 &brw_state_base_address
,
189 &gen7_cc_viewport_state_pointer
, /* must do after brw_cc_vp */
190 &gen7_sf_clip_viewport
,
192 &gen7_push_constant_space
,
194 &gen6_blend_state
, /* must do before cc unit */
195 &gen6_color_calc_state
, /* must do before cc unit */
196 &gen6_depth_stencil_state
, /* must do before cc unit */
198 &gen6_vs_push_constants
, /* Before vs_state */
199 &gen6_wm_push_constants
, /* Before wm_surfaces and constant_buffer */
201 /* Surface state setup. Must come before the VS/WM unit. The binding
202 * table upload must be last.
204 &brw_vs_pull_constants
,
205 &brw_vs_ubo_surfaces
,
206 &brw_gs_pull_constants
,
207 &brw_gs_ubo_surfaces
,
208 &brw_wm_pull_constants
,
209 &brw_wm_ubo_surfaces
,
210 &gen6_renderbuffer_surfaces
,
211 &brw_texture_surfaces
,
212 &brw_vs_binding_table
,
213 &brw_gs_binding_table
,
214 &brw_wm_binding_table
,
219 &gen6_multisample_state
,
221 &gen7_disable_stages
,
234 &brw_polygon_stipple
,
235 &brw_polygon_stipple_offset
,
238 &brw_aa_line_parameters
,
250 brw_upload_initial_gpu_state(struct brw_context
*brw
)
252 /* On platforms with hardware contexts, we can set our initial GPU state
253 * right away rather than doing it via state atoms. This saves a small
254 * amount of overhead on every draw call.
259 brw_upload_invariant_state(brw
);
262 void brw_init_state( struct brw_context
*brw
)
264 const struct brw_tracked_state
**atoms
;
267 brw_init_caches(brw
);
271 num_atoms
= ARRAY_SIZE(gen7_atoms
);
272 } else if (brw
->gen
== 6) {
274 num_atoms
= ARRAY_SIZE(gen6_atoms
);
277 num_atoms
= ARRAY_SIZE(gen4_atoms
);
281 brw
->num_atoms
= num_atoms
;
283 while (num_atoms
--) {
284 assert((*atoms
)->dirty
.mesa
|
285 (*atoms
)->dirty
.brw
|
286 (*atoms
)->dirty
.cache
);
287 assert((*atoms
)->emit
);
291 brw_upload_initial_gpu_state(brw
);
295 void brw_destroy_state( struct brw_context
*brw
)
297 brw_destroy_caches(brw
);
300 /***********************************************************************
304 check_state(const struct brw_state_flags
*a
, const struct brw_state_flags
*b
)
306 return ((a
->mesa
& b
->mesa
) |
308 (a
->cache
& b
->cache
)) != 0;
311 static void accumulate_state( struct brw_state_flags
*a
,
312 const struct brw_state_flags
*b
)
316 a
->cache
|= b
->cache
;
320 static void xor_states( struct brw_state_flags
*result
,
321 const struct brw_state_flags
*a
,
322 const struct brw_state_flags
*b
)
324 result
->mesa
= a
->mesa
^ b
->mesa
;
325 result
->brw
= a
->brw
^ b
->brw
;
326 result
->cache
= a
->cache
^ b
->cache
;
329 struct dirty_bit_map
{
335 #define DEFINE_BIT(name) {name, #name, 0}
337 static struct dirty_bit_map mesa_bits
[] = {
338 DEFINE_BIT(_NEW_MODELVIEW
),
339 DEFINE_BIT(_NEW_PROJECTION
),
340 DEFINE_BIT(_NEW_TEXTURE_MATRIX
),
341 DEFINE_BIT(_NEW_COLOR
),
342 DEFINE_BIT(_NEW_DEPTH
),
343 DEFINE_BIT(_NEW_EVAL
),
344 DEFINE_BIT(_NEW_FOG
),
345 DEFINE_BIT(_NEW_HINT
),
346 DEFINE_BIT(_NEW_LIGHT
),
347 DEFINE_BIT(_NEW_LINE
),
348 DEFINE_BIT(_NEW_PIXEL
),
349 DEFINE_BIT(_NEW_POINT
),
350 DEFINE_BIT(_NEW_POLYGON
),
351 DEFINE_BIT(_NEW_POLYGONSTIPPLE
),
352 DEFINE_BIT(_NEW_SCISSOR
),
353 DEFINE_BIT(_NEW_STENCIL
),
354 DEFINE_BIT(_NEW_TEXTURE
),
355 DEFINE_BIT(_NEW_TRANSFORM
),
356 DEFINE_BIT(_NEW_VIEWPORT
),
357 DEFINE_BIT(_NEW_ARRAY
),
358 DEFINE_BIT(_NEW_RENDERMODE
),
359 DEFINE_BIT(_NEW_BUFFERS
),
360 DEFINE_BIT(_NEW_MULTISAMPLE
),
361 DEFINE_BIT(_NEW_TRACK_MATRIX
),
362 DEFINE_BIT(_NEW_PROGRAM
),
363 DEFINE_BIT(_NEW_PROGRAM_CONSTANTS
),
364 DEFINE_BIT(_NEW_BUFFER_OBJECT
),
365 DEFINE_BIT(_NEW_FRAG_CLAMP
),
366 DEFINE_BIT(_NEW_VARYING_VP_INPUTS
),
370 static struct dirty_bit_map brw_bits
[] = {
371 DEFINE_BIT(BRW_NEW_URB_FENCE
),
372 DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM
),
373 DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM
),
374 DEFINE_BIT(BRW_NEW_CURBE_OFFSETS
),
375 DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE
),
376 DEFINE_BIT(BRW_NEW_PRIMITIVE
),
377 DEFINE_BIT(BRW_NEW_CONTEXT
),
378 DEFINE_BIT(BRW_NEW_PSP
),
379 DEFINE_BIT(BRW_NEW_SURFACES
),
380 DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE
),
381 DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE
),
382 DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE
),
383 DEFINE_BIT(BRW_NEW_INDICES
),
384 DEFINE_BIT(BRW_NEW_VERTICES
),
385 DEFINE_BIT(BRW_NEW_BATCH
),
386 DEFINE_BIT(BRW_NEW_INDEX_BUFFER
),
387 DEFINE_BIT(BRW_NEW_VS_CONSTBUF
),
388 DEFINE_BIT(BRW_NEW_PROGRAM_CACHE
),
389 DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS
),
390 DEFINE_BIT(BRW_NEW_VUE_MAP_GEOM_OUT
),
391 DEFINE_BIT(BRW_NEW_TRANSFORM_FEEDBACK
),
392 DEFINE_BIT(BRW_NEW_RASTERIZER_DISCARD
),
393 DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER
),
394 DEFINE_BIT(BRW_NEW_META_IN_PROGRESS
),
395 DEFINE_BIT(BRW_NEW_INTERPOLATION_MAP
),
399 static struct dirty_bit_map cache_bits
[] = {
400 DEFINE_BIT(CACHE_NEW_CC_VP
),
401 DEFINE_BIT(CACHE_NEW_CC_UNIT
),
402 DEFINE_BIT(CACHE_NEW_WM_PROG
),
403 DEFINE_BIT(CACHE_NEW_SAMPLER
),
404 DEFINE_BIT(CACHE_NEW_WM_UNIT
),
405 DEFINE_BIT(CACHE_NEW_SF_PROG
),
406 DEFINE_BIT(CACHE_NEW_SF_VP
),
407 DEFINE_BIT(CACHE_NEW_SF_UNIT
),
408 DEFINE_BIT(CACHE_NEW_VS_UNIT
),
409 DEFINE_BIT(CACHE_NEW_VS_PROG
),
410 DEFINE_BIT(CACHE_NEW_FF_GS_UNIT
),
411 DEFINE_BIT(CACHE_NEW_FF_GS_PROG
),
412 DEFINE_BIT(CACHE_NEW_CLIP_VP
),
413 DEFINE_BIT(CACHE_NEW_CLIP_UNIT
),
414 DEFINE_BIT(CACHE_NEW_CLIP_PROG
),
420 brw_update_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
424 for (i
= 0; i
< 32; i
++) {
425 if (bit_map
[i
].bit
== 0)
428 if (bit_map
[i
].bit
& bits
)
434 brw_print_dirty_count(struct dirty_bit_map
*bit_map
)
438 for (i
= 0; i
< 32; i
++) {
439 if (bit_map
[i
].bit
== 0)
442 fprintf(stderr
, "0x%08x: %12d (%s)\n",
443 bit_map
[i
].bit
, bit_map
[i
].count
, bit_map
[i
].name
);
447 /***********************************************************************
450 void brw_upload_state(struct brw_context
*brw
)
452 struct gl_context
*ctx
= &brw
->ctx
;
453 struct brw_state_flags
*state
= &brw
->state
.dirty
;
455 static int dirty_count
= 0;
457 state
->mesa
|= brw
->NewGLState
;
460 state
->brw
|= ctx
->NewDriverState
;
461 ctx
->NewDriverState
= 0;
463 if (brw
->emit_state_always
) {
469 if (brw
->fragment_program
!= ctx
->FragmentProgram
._Current
) {
470 brw
->fragment_program
= ctx
->FragmentProgram
._Current
;
471 brw
->state
.dirty
.brw
|= BRW_NEW_FRAGMENT_PROGRAM
;
474 if (brw
->geometry_program
!= ctx
->GeometryProgram
._Current
) {
475 brw
->geometry_program
= ctx
->GeometryProgram
._Current
;
476 brw
->state
.dirty
.brw
|= BRW_NEW_GEOMETRY_PROGRAM
;
479 if (brw
->vertex_program
!= ctx
->VertexProgram
._Current
) {
480 brw
->vertex_program
= ctx
->VertexProgram
._Current
;
481 brw
->state
.dirty
.brw
|= BRW_NEW_VERTEX_PROGRAM
;
484 if (brw
->meta_in_progress
!= _mesa_meta_in_progress(ctx
)) {
485 brw
->meta_in_progress
= _mesa_meta_in_progress(ctx
);
486 brw
->state
.dirty
.brw
|= BRW_NEW_META_IN_PROGRESS
;
489 if ((state
->mesa
| state
->cache
| state
->brw
) == 0)
492 intel_check_front_buffer_rendering(brw
);
494 if (unlikely(INTEL_DEBUG
)) {
495 /* Debug version which enforces various sanity checks on the
496 * state flags which are generated and checked to help ensure
497 * state atoms are ordered correctly in the list.
499 struct brw_state_flags examined
, prev
;
500 memset(&examined
, 0, sizeof(examined
));
503 for (i
= 0; i
< brw
->num_atoms
; i
++) {
504 const struct brw_tracked_state
*atom
= brw
->atoms
[i
];
505 struct brw_state_flags generated
;
507 if (check_state(state
, &atom
->dirty
)) {
511 accumulate_state(&examined
, &atom
->dirty
);
513 /* generated = (prev ^ state)
514 * if (examined & generated)
517 xor_states(&generated
, &prev
, state
);
518 assert(!check_state(&examined
, &generated
));
523 for (i
= 0; i
< brw
->num_atoms
; i
++) {
524 const struct brw_tracked_state
*atom
= brw
->atoms
[i
];
526 if (check_state(state
, &atom
->dirty
)) {
532 if (unlikely(INTEL_DEBUG
& DEBUG_STATE
)) {
533 brw_update_dirty_count(mesa_bits
, state
->mesa
);
534 brw_update_dirty_count(brw_bits
, state
->brw
);
535 brw_update_dirty_count(cache_bits
, state
->cache
);
536 if (dirty_count
++ % 1000 == 0) {
537 brw_print_dirty_count(mesa_bits
);
538 brw_print_dirty_count(brw_bits
);
539 brw_print_dirty_count(cache_bits
);
540 fprintf(stderr
, "\n");
544 memset(state
, 0, sizeof(*state
));