2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "intel_batchbuffer.h"
37 #include "intel_buffers.h"
39 /* This is used to initialize brw->state.atoms[]. We could use this
40 * list directly except for a single atom, brw_constant_buffer, which
41 * has a .dirty value which changes according to the parameters of the
42 * current fragment and vertex programs, and so cannot be a static
45 static const struct brw_tracked_state
*gen4_atoms
[] =
50 &brw_vs_prog
, /* must do before GS prog, state base address. */
51 &brw_gs_prog
, /* must do before state base address */
52 &brw_clip_prog
, /* must do before state base address */
53 &brw_sf_prog
, /* must do before state base address */
54 &brw_wm_prog
, /* must do before state base address */
56 /* Once all the programs are done, we know how large urb entry
57 * sizes need to be and can decide if we need to change the urb
61 &brw_recalculate_urb_fence
,
66 &brw_vs_constants
, /* Before vs_surfaces and constant_buffer */
67 &brw_wm_pull_constants
, /* Before brw_wm_binding_table */
69 &brw_vs_surfaces
, /* must do before unit */
70 &brw_renderbuffer_surfaces
, /* must do before unit */
71 &brw_texture_surfaces
, /* must do before unit */
72 &brw_wm_binding_table
,
75 /* These set up state for brw_psp_urb_cbs */
79 &brw_vs_unit
, /* always required, enabled or not */
86 &brw_state_base_address
,
88 &brw_binding_table_pointers
,
89 &brw_blend_constant_color
,
94 &brw_polygon_stipple_offset
,
97 &brw_aa_line_parameters
,
109 static const struct brw_tracked_state
*gen6_atoms
[] =
114 &brw_vs_prog
, /* must do before state base address */
115 &brw_gs_prog
, /* must do before state base address */
116 &brw_wm_prog
, /* must do before state base address */
121 /* Command packets: */
122 &brw_invarient_state
,
124 /* must do before binding table pointers, cc state ptrs */
125 &brw_state_base_address
,
128 &gen6_viewport_state
, /* must do after *_vp stages */
131 &gen6_blend_state
, /* must do before cc unit */
132 &gen6_color_calc_state
, /* must do before cc unit */
133 &gen6_depth_stencil_state
, /* must do before cc unit */
134 &gen6_cc_state_pointers
,
136 &brw_vs_constants
, /* Before vs_surfaces and constant_buffer */
137 &brw_wm_pull_constants
, /* Before brw_wm_binding_table */
138 &gen6_vs_push_constants
, /* Before vs_state */
139 &gen6_wm_push_constants
, /* Before wm_state */
141 &brw_vs_surfaces
, /* must do before unit */
142 &brw_renderbuffer_surfaces
, /* must do before unit */
143 &brw_texture_surfaces
, /* must do before unit */
144 &brw_wm_binding_table
,
157 &gen6_binding_table_pointers
,
161 &brw_polygon_stipple
,
162 &brw_polygon_stipple_offset
,
165 &brw_aa_line_parameters
,
174 const struct brw_tracked_state
*gen7_atoms
[] =
183 /* Command packets: */
184 &brw_invarient_state
,
186 /* must do before binding table pointers, cc state ptrs */
187 &brw_state_base_address
,
190 &gen7_cc_viewport_state_pointer
, /* must do after brw_cc_vp */
191 &gen7_sf_clip_viewport
,
194 &gen6_blend_state
, /* must do before cc unit */
195 &gen6_color_calc_state
, /* must do before cc unit */
196 &gen6_depth_stencil_state
, /* must do before cc unit */
197 &gen7_blend_state_pointer
,
198 &gen7_cc_state_pointer
,
199 &gen7_depth_stencil_state_pointer
,
201 &brw_vs_constants
, /* Before vs_surfaces and constant_buffer */
202 &brw_wm_pull_constants
, /* Before brw_wm_binding_table */
203 &gen6_vs_push_constants
, /* Before vs_state */
204 &gen6_wm_push_constants
, /* Before wm_surfaces and constant_buffer */
206 &brw_vs_surfaces
, /* must do before unit */
207 &brw_renderbuffer_surfaces
, /* must do before unit */
208 &brw_texture_surfaces
, /* must do before unit */
209 &brw_wm_binding_table
,
213 &gen7_disable_stages
,
225 &brw_polygon_stipple
,
226 &brw_polygon_stipple_offset
,
229 &brw_aa_line_parameters
,
239 void brw_init_state( struct brw_context
*brw
)
241 const struct brw_tracked_state
**atoms
;
244 brw_init_caches(brw
);
246 if (brw
->intel
.gen
>= 7) {
248 num_atoms
= ARRAY_SIZE(gen7_atoms
);
249 } else if (brw
->intel
.gen
== 6) {
251 num_atoms
= ARRAY_SIZE(gen6_atoms
);
254 num_atoms
= ARRAY_SIZE(gen4_atoms
);
258 brw
->num_atoms
= num_atoms
;
260 while (num_atoms
--) {
261 assert((*atoms
)->dirty
.mesa
|
262 (*atoms
)->dirty
.brw
|
263 (*atoms
)->dirty
.cache
);
264 assert((*atoms
)->emit
);
270 void brw_destroy_state( struct brw_context
*brw
)
272 brw_destroy_caches(brw
);
275 /***********************************************************************
278 static GLuint
check_state( const struct brw_state_flags
*a
,
279 const struct brw_state_flags
*b
)
281 return ((a
->mesa
& b
->mesa
) |
283 (a
->cache
& b
->cache
)) != 0;
286 static void accumulate_state( struct brw_state_flags
*a
,
287 const struct brw_state_flags
*b
)
291 a
->cache
|= b
->cache
;
295 static void xor_states( struct brw_state_flags
*result
,
296 const struct brw_state_flags
*a
,
297 const struct brw_state_flags
*b
)
299 result
->mesa
= a
->mesa
^ b
->mesa
;
300 result
->brw
= a
->brw
^ b
->brw
;
301 result
->cache
= a
->cache
^ b
->cache
;
304 struct dirty_bit_map
{
310 #define DEFINE_BIT(name) {name, #name, 0}
312 static struct dirty_bit_map mesa_bits
[] = {
313 DEFINE_BIT(_NEW_MODELVIEW
),
314 DEFINE_BIT(_NEW_PROJECTION
),
315 DEFINE_BIT(_NEW_TEXTURE_MATRIX
),
316 DEFINE_BIT(_NEW_COLOR
),
317 DEFINE_BIT(_NEW_DEPTH
),
318 DEFINE_BIT(_NEW_EVAL
),
319 DEFINE_BIT(_NEW_FOG
),
320 DEFINE_BIT(_NEW_HINT
),
321 DEFINE_BIT(_NEW_LIGHT
),
322 DEFINE_BIT(_NEW_LINE
),
323 DEFINE_BIT(_NEW_PIXEL
),
324 DEFINE_BIT(_NEW_POINT
),
325 DEFINE_BIT(_NEW_POLYGON
),
326 DEFINE_BIT(_NEW_POLYGONSTIPPLE
),
327 DEFINE_BIT(_NEW_SCISSOR
),
328 DEFINE_BIT(_NEW_STENCIL
),
329 DEFINE_BIT(_NEW_TEXTURE
),
330 DEFINE_BIT(_NEW_TRANSFORM
),
331 DEFINE_BIT(_NEW_VIEWPORT
),
332 DEFINE_BIT(_NEW_PACKUNPACK
),
333 DEFINE_BIT(_NEW_ARRAY
),
334 DEFINE_BIT(_NEW_RENDERMODE
),
335 DEFINE_BIT(_NEW_BUFFERS
),
336 DEFINE_BIT(_NEW_MULTISAMPLE
),
337 DEFINE_BIT(_NEW_TRACK_MATRIX
),
338 DEFINE_BIT(_NEW_PROGRAM
),
339 DEFINE_BIT(_NEW_PROGRAM_CONSTANTS
),
343 static struct dirty_bit_map brw_bits
[] = {
344 DEFINE_BIT(BRW_NEW_URB_FENCE
),
345 DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM
),
346 DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM
),
347 DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS
),
348 DEFINE_BIT(BRW_NEW_CURBE_OFFSETS
),
349 DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE
),
350 DEFINE_BIT(BRW_NEW_PRIMITIVE
),
351 DEFINE_BIT(BRW_NEW_CONTEXT
),
352 DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS
),
353 DEFINE_BIT(BRW_NEW_PROGRAM_CACHE
),
354 DEFINE_BIT(BRW_NEW_PSP
),
355 DEFINE_BIT(BRW_NEW_WM_SURFACES
),
356 DEFINE_BIT(BRW_NEW_INDICES
),
357 DEFINE_BIT(BRW_NEW_INDEX_BUFFER
),
358 DEFINE_BIT(BRW_NEW_VERTICES
),
359 DEFINE_BIT(BRW_NEW_BATCH
),
360 DEFINE_BIT(BRW_NEW_VS_CONSTBUF
),
361 DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE
),
362 DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE
),
363 DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE
),
364 DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS
),
368 static struct dirty_bit_map cache_bits
[] = {
369 DEFINE_BIT(CACHE_NEW_BLEND_STATE
),
370 DEFINE_BIT(CACHE_NEW_CC_VP
),
371 DEFINE_BIT(CACHE_NEW_CC_UNIT
),
372 DEFINE_BIT(CACHE_NEW_WM_PROG
),
373 DEFINE_BIT(CACHE_NEW_SAMPLER
),
374 DEFINE_BIT(CACHE_NEW_WM_UNIT
),
375 DEFINE_BIT(CACHE_NEW_SF_PROG
),
376 DEFINE_BIT(CACHE_NEW_SF_VP
),
377 DEFINE_BIT(CACHE_NEW_SF_UNIT
),
378 DEFINE_BIT(CACHE_NEW_VS_UNIT
),
379 DEFINE_BIT(CACHE_NEW_VS_PROG
),
380 DEFINE_BIT(CACHE_NEW_GS_UNIT
),
381 DEFINE_BIT(CACHE_NEW_GS_PROG
),
382 DEFINE_BIT(CACHE_NEW_CLIP_VP
),
383 DEFINE_BIT(CACHE_NEW_CLIP_UNIT
),
384 DEFINE_BIT(CACHE_NEW_CLIP_PROG
),
390 brw_update_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
394 for (i
= 0; i
< 32; i
++) {
395 if (bit_map
[i
].bit
== 0)
398 if (bit_map
[i
].bit
& bits
)
404 brw_print_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
408 for (i
= 0; i
< 32; i
++) {
409 if (bit_map
[i
].bit
== 0)
412 fprintf(stderr
, "0x%08x: %12d (%s)\n",
413 bit_map
[i
].bit
, bit_map
[i
].count
, bit_map
[i
].name
);
417 /***********************************************************************
420 void brw_upload_state(struct brw_context
*brw
)
422 struct gl_context
*ctx
= &brw
->intel
.ctx
;
423 struct intel_context
*intel
= &brw
->intel
;
424 struct brw_state_flags
*state
= &brw
->state
.dirty
;
426 static int dirty_count
= 0;
428 state
->mesa
|= brw
->intel
.NewGLState
;
429 brw
->intel
.NewGLState
= 0;
431 if (brw
->emit_state_always
) {
437 if (brw
->fragment_program
!= ctx
->FragmentProgram
._Current
) {
438 brw
->fragment_program
= ctx
->FragmentProgram
._Current
;
439 brw
->state
.dirty
.brw
|= BRW_NEW_FRAGMENT_PROGRAM
;
442 if (brw
->vertex_program
!= ctx
->VertexProgram
._Current
) {
443 brw
->vertex_program
= ctx
->VertexProgram
._Current
;
444 brw
->state
.dirty
.brw
|= BRW_NEW_VERTEX_PROGRAM
;
447 if ((state
->mesa
| state
->cache
| state
->brw
) == 0)
450 brw
->intel
.Fallback
= false; /* boolean, not bitfield */
452 intel_check_front_buffer_rendering(intel
);
454 if (unlikely(INTEL_DEBUG
)) {
455 /* Debug version which enforces various sanity checks on the
456 * state flags which are generated and checked to help ensure
457 * state atoms are ordered correctly in the list.
459 struct brw_state_flags examined
, prev
;
460 memset(&examined
, 0, sizeof(examined
));
463 for (i
= 0; i
< brw
->num_atoms
; i
++) {
464 const struct brw_tracked_state
*atom
= brw
->atoms
[i
];
465 struct brw_state_flags generated
;
467 if (brw
->intel
.Fallback
)
470 if (check_state(state
, &atom
->dirty
)) {
474 accumulate_state(&examined
, &atom
->dirty
);
476 /* generated = (prev ^ state)
477 * if (examined & generated)
480 xor_states(&generated
, &prev
, state
);
481 assert(!check_state(&examined
, &generated
));
486 for (i
= 0; i
< brw
->num_atoms
; i
++) {
487 const struct brw_tracked_state
*atom
= brw
->atoms
[i
];
489 if (brw
->intel
.Fallback
)
492 if (check_state(state
, &atom
->dirty
)) {
498 if (unlikely(INTEL_DEBUG
& DEBUG_STATE
)) {
499 brw_update_dirty_count(mesa_bits
, state
->mesa
);
500 brw_update_dirty_count(brw_bits
, state
->brw
);
501 brw_update_dirty_count(cache_bits
, state
->cache
);
502 if (dirty_count
++ % 1000 == 0) {
503 brw_print_dirty_count(mesa_bits
, state
->mesa
);
504 brw_print_dirty_count(brw_bits
, state
->brw
);
505 brw_print_dirty_count(cache_bits
, state
->cache
);
506 fprintf(stderr
, "\n");
510 if (!brw
->intel
.Fallback
)
511 memset(state
, 0, sizeof(*state
));