2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "intel_batchbuffer.h"
38 /* This is used to initialize brw->state.atoms[]. We could use this
39 * list directly except for a single atom, brw_constant_buffer, which
40 * has a .dirty value which changes according to the parameters of the
41 * current fragment and vertex programs, and so cannot be a static
44 const struct brw_tracked_state
*atoms
[] =
55 /* Once all the programs are done, we know how large urb entry
56 * sizes need to be and can decide if we need to change the urb
60 &brw_recalculate_urb_fence
,
65 &brw_vs_surfaces
, /* must do before unit */
66 &brw_wm_constant_surface
, /* must do before wm surfaces/bind bo */
67 &brw_wm_surfaces
, /* must do before samplers and unit */
73 &brw_vs_unit
, /* always required, enabled or not */
80 &brw_state_base_address
,
82 &brw_binding_table_pointers
,
83 &brw_blend_constant_color
,
88 &brw_polygon_stipple_offset
,
91 &brw_aa_line_parameters
,
104 void brw_init_state( struct brw_context
*brw
)
106 brw_init_caches(brw
);
110 void brw_destroy_state( struct brw_context
*brw
)
112 brw_destroy_caches(brw
);
113 brw_destroy_batch_cache(brw
);
116 /***********************************************************************
119 static GLboolean
check_state( const struct brw_state_flags
*a
,
120 const struct brw_state_flags
*b
)
122 return ((a
->mesa
& b
->mesa
) ||
124 (a
->cache
& b
->cache
));
127 static void accumulate_state( struct brw_state_flags
*a
,
128 const struct brw_state_flags
*b
)
132 a
->cache
|= b
->cache
;
136 static void xor_states( struct brw_state_flags
*result
,
137 const struct brw_state_flags
*a
,
138 const struct brw_state_flags
*b
)
140 result
->mesa
= a
->mesa
^ b
->mesa
;
141 result
->brw
= a
->brw
^ b
->brw
;
142 result
->cache
= a
->cache
^ b
->cache
;
146 brw_clear_validated_bos(struct brw_context
*brw
)
150 /* Clear the last round of validated bos */
151 for (i
= 0; i
< brw
->state
.validated_bo_count
; i
++) {
152 dri_bo_unreference(brw
->state
.validated_bos
[i
]);
153 brw
->state
.validated_bos
[i
] = NULL
;
155 brw
->state
.validated_bo_count
= 0;
158 struct dirty_bit_map
{
164 #define DEFINE_BIT(name) {name, #name, 0}
166 static struct dirty_bit_map mesa_bits
[] = {
167 DEFINE_BIT(_NEW_MODELVIEW
),
168 DEFINE_BIT(_NEW_PROJECTION
),
169 DEFINE_BIT(_NEW_TEXTURE_MATRIX
),
170 DEFINE_BIT(_NEW_COLOR_MATRIX
),
171 DEFINE_BIT(_NEW_ACCUM
),
172 DEFINE_BIT(_NEW_COLOR
),
173 DEFINE_BIT(_NEW_DEPTH
),
174 DEFINE_BIT(_NEW_EVAL
),
175 DEFINE_BIT(_NEW_FOG
),
176 DEFINE_BIT(_NEW_HINT
),
177 DEFINE_BIT(_NEW_LIGHT
),
178 DEFINE_BIT(_NEW_LINE
),
179 DEFINE_BIT(_NEW_PIXEL
),
180 DEFINE_BIT(_NEW_POINT
),
181 DEFINE_BIT(_NEW_POLYGON
),
182 DEFINE_BIT(_NEW_POLYGONSTIPPLE
),
183 DEFINE_BIT(_NEW_SCISSOR
),
184 DEFINE_BIT(_NEW_STENCIL
),
185 DEFINE_BIT(_NEW_TEXTURE
),
186 DEFINE_BIT(_NEW_TRANSFORM
),
187 DEFINE_BIT(_NEW_VIEWPORT
),
188 DEFINE_BIT(_NEW_PACKUNPACK
),
189 DEFINE_BIT(_NEW_ARRAY
),
190 DEFINE_BIT(_NEW_RENDERMODE
),
191 DEFINE_BIT(_NEW_BUFFERS
),
192 DEFINE_BIT(_NEW_MULTISAMPLE
),
193 DEFINE_BIT(_NEW_TRACK_MATRIX
),
194 DEFINE_BIT(_NEW_PROGRAM
),
195 DEFINE_BIT(_NEW_PROGRAM_CONSTANTS
),
199 static struct dirty_bit_map brw_bits
[] = {
200 DEFINE_BIT(BRW_NEW_URB_FENCE
),
201 DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM
),
202 DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM
),
203 DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS
),
204 DEFINE_BIT(BRW_NEW_CURBE_OFFSETS
),
205 DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE
),
206 DEFINE_BIT(BRW_NEW_PRIMITIVE
),
207 DEFINE_BIT(BRW_NEW_CONTEXT
),
208 DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS
),
209 DEFINE_BIT(BRW_NEW_PSP
),
210 DEFINE_BIT(BRW_NEW_FENCE
),
211 DEFINE_BIT(BRW_NEW_INDICES
),
212 DEFINE_BIT(BRW_NEW_INDEX_BUFFER
),
213 DEFINE_BIT(BRW_NEW_VERTICES
),
214 DEFINE_BIT(BRW_NEW_BATCH
),
215 DEFINE_BIT(BRW_NEW_DEPTH_BUFFER
),
219 static struct dirty_bit_map cache_bits
[] = {
220 DEFINE_BIT(CACHE_NEW_CC_VP
),
221 DEFINE_BIT(CACHE_NEW_CC_UNIT
),
222 DEFINE_BIT(CACHE_NEW_WM_PROG
),
223 DEFINE_BIT(CACHE_NEW_SAMPLER_DEFAULT_COLOR
),
224 DEFINE_BIT(CACHE_NEW_SAMPLER
),
225 DEFINE_BIT(CACHE_NEW_WM_UNIT
),
226 DEFINE_BIT(CACHE_NEW_SF_PROG
),
227 DEFINE_BIT(CACHE_NEW_SF_VP
),
228 DEFINE_BIT(CACHE_NEW_SF_UNIT
),
229 DEFINE_BIT(CACHE_NEW_VS_UNIT
),
230 DEFINE_BIT(CACHE_NEW_VS_PROG
),
231 DEFINE_BIT(CACHE_NEW_GS_UNIT
),
232 DEFINE_BIT(CACHE_NEW_GS_PROG
),
233 DEFINE_BIT(CACHE_NEW_CLIP_VP
),
234 DEFINE_BIT(CACHE_NEW_CLIP_UNIT
),
235 DEFINE_BIT(CACHE_NEW_CLIP_PROG
),
236 DEFINE_BIT(CACHE_NEW_SURFACE
),
237 DEFINE_BIT(CACHE_NEW_SURF_BIND
),
243 brw_update_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
247 for (i
= 0; i
< 32; i
++) {
248 if (bit_map
[i
].bit
== 0)
251 if (bit_map
[i
].bit
& bits
)
257 brw_print_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
261 for (i
= 0; i
< 32; i
++) {
262 if (bit_map
[i
].bit
== 0)
265 fprintf(stderr
, "0x%08x: %12d (%s)\n",
266 bit_map
[i
].bit
, bit_map
[i
].count
, bit_map
[i
].name
);
270 /***********************************************************************
273 void brw_validate_state( struct brw_context
*brw
)
275 GLcontext
*ctx
= &brw
->intel
.ctx
;
276 struct intel_context
*intel
= &brw
->intel
;
277 struct brw_state_flags
*state
= &brw
->state
.dirty
;
280 brw_clear_validated_bos(brw
);
282 state
->mesa
|= brw
->intel
.NewGLState
;
283 brw
->intel
.NewGLState
= 0;
285 brw_add_validated_bo(brw
, intel
->batch
->buf
);
287 if (brw
->emit_state_always
) {
292 if (brw
->fragment_program
!= ctx
->FragmentProgram
._Current
) {
293 brw
->fragment_program
= ctx
->FragmentProgram
._Current
;
294 brw
->state
.dirty
.brw
|= BRW_NEW_FRAGMENT_PROGRAM
;
297 if (brw
->vertex_program
!= ctx
->VertexProgram
._Current
) {
298 brw
->vertex_program
= ctx
->VertexProgram
._Current
;
299 brw
->state
.dirty
.brw
|= BRW_NEW_VERTEX_PROGRAM
;
302 if (state
->mesa
== 0 &&
307 if (brw
->state
.dirty
.brw
& BRW_NEW_CONTEXT
)
308 brw_clear_batch_cache_flush(brw
);
310 brw
->intel
.Fallback
= 0;
312 /* do prepare stage for all atoms */
313 for (i
= 0; i
< Elements(atoms
); i
++) {
314 const struct brw_tracked_state
*atom
= atoms
[i
];
316 if (brw
->intel
.Fallback
)
319 if (check_state(state
, &atom
->dirty
)) {
328 void brw_upload_state(struct brw_context
*brw
)
330 struct brw_state_flags
*state
= &brw
->state
.dirty
;
332 static int dirty_count
= 0;
334 brw_clear_validated_bos(brw
);
337 /* Debug version which enforces various sanity checks on the
338 * state flags which are generated and checked to help ensure
339 * state atoms are ordered correctly in the list.
341 struct brw_state_flags examined
, prev
;
342 _mesa_memset(&examined
, 0, sizeof(examined
));
345 for (i
= 0; i
< Elements(atoms
); i
++) {
346 const struct brw_tracked_state
*atom
= atoms
[i
];
347 struct brw_state_flags generated
;
349 assert(atom
->dirty
.mesa
||
353 if (brw
->intel
.Fallback
)
356 if (check_state(state
, &atom
->dirty
)) {
362 accumulate_state(&examined
, &atom
->dirty
);
364 /* generated = (prev ^ state)
365 * if (examined & generated)
368 xor_states(&generated
, &prev
, state
);
369 assert(!check_state(&examined
, &generated
));
374 for (i
= 0; i
< Elements(atoms
); i
++) {
375 const struct brw_tracked_state
*atom
= atoms
[i
];
377 if (brw
->intel
.Fallback
)
380 if (check_state(state
, &atom
->dirty
)) {
388 if (INTEL_DEBUG
& DEBUG_STATE
) {
389 brw_update_dirty_count(mesa_bits
, state
->mesa
);
390 brw_update_dirty_count(brw_bits
, state
->brw
);
391 brw_update_dirty_count(cache_bits
, state
->cache
);
392 if (dirty_count
++ % 1000 == 0) {
393 brw_print_dirty_count(mesa_bits
, state
->mesa
);
394 brw_print_dirty_count(brw_bits
, state
->brw
);
395 brw_print_dirty_count(cache_bits
, state
->cache
);
396 fprintf(stderr
, "\n");
400 if (!brw
->intel
.Fallback
)
401 memset(state
, 0, sizeof(*state
));