2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "intel_batchbuffer.h"
37 #include "intel_buffers.h"
38 #include "intel_chipset.h"
40 /* This is used to initialize brw->state.atoms[]. We could use this
41 * list directly except for a single atom, brw_constant_buffer, which
42 * has a .dirty value which changes according to the parameters of the
43 * current fragment and vertex programs, and so cannot be a static
46 static const struct brw_tracked_state
*gen4_atoms
[] =
57 /* Once all the programs are done, we know how large urb entry
58 * sizes need to be and can decide if we need to change the urb
62 &brw_recalculate_urb_fence
,
67 &brw_vs_surfaces
, /* must do before unit */
68 &brw_wm_constant_surface
, /* must do before wm surfaces/bind bo */
69 &brw_wm_surfaces
, /* must do before samplers and unit */
75 &brw_vs_unit
, /* always required, enabled or not */
82 &brw_state_base_address
,
84 &brw_binding_table_pointers
,
85 &brw_blend_constant_color
,
90 &brw_polygon_stipple_offset
,
93 &brw_aa_line_parameters
,
105 const struct brw_tracked_state
*gen6_atoms
[] =
116 /* Once all the programs are done, we know how large urb entry
117 * sizes need to be and can decide if we need to change the urb
121 &brw_recalculate_urb_fence
,
126 &gen6_blend_state
, /* must do before cc unit */
127 &gen6_color_calc_state
, /* must do before cc unit */
128 &gen6_depth_stencil_state
, /* must do before cc unit */
129 &gen6_cc_state_pointers
,
131 &brw_vs_surfaces
, /* must do before unit */
132 &brw_wm_constant_surface
, /* must do before wm surfaces/bind bo */
133 &brw_wm_surfaces
, /* must do before samplers and unit */
147 &brw_invarient_state
,
148 &brw_state_base_address
,
150 &brw_binding_table_pointers
,
151 &brw_blend_constant_color
,
157 &brw_polygon_stipple
,
158 &brw_polygon_stipple_offset
,
161 &brw_aa_line_parameters
,
174 void brw_init_state( struct brw_context
*brw
)
176 brw_init_caches(brw
);
180 void brw_destroy_state( struct brw_context
*brw
)
182 brw_destroy_caches(brw
);
183 brw_destroy_batch_cache(brw
);
186 /***********************************************************************
189 static GLboolean
check_state( const struct brw_state_flags
*a
,
190 const struct brw_state_flags
*b
)
192 return ((a
->mesa
& b
->mesa
) ||
194 (a
->cache
& b
->cache
));
197 static void accumulate_state( struct brw_state_flags
*a
,
198 const struct brw_state_flags
*b
)
202 a
->cache
|= b
->cache
;
206 static void xor_states( struct brw_state_flags
*result
,
207 const struct brw_state_flags
*a
,
208 const struct brw_state_flags
*b
)
210 result
->mesa
= a
->mesa
^ b
->mesa
;
211 result
->brw
= a
->brw
^ b
->brw
;
212 result
->cache
= a
->cache
^ b
->cache
;
216 brw_clear_validated_bos(struct brw_context
*brw
)
220 /* Clear the last round of validated bos */
221 for (i
= 0; i
< brw
->state
.validated_bo_count
; i
++) {
222 dri_bo_unreference(brw
->state
.validated_bos
[i
]);
223 brw
->state
.validated_bos
[i
] = NULL
;
225 brw
->state
.validated_bo_count
= 0;
228 struct dirty_bit_map
{
234 #define DEFINE_BIT(name) {name, #name, 0}
236 static struct dirty_bit_map mesa_bits
[] = {
237 DEFINE_BIT(_NEW_MODELVIEW
),
238 DEFINE_BIT(_NEW_PROJECTION
),
239 DEFINE_BIT(_NEW_TEXTURE_MATRIX
),
240 DEFINE_BIT(_NEW_COLOR_MATRIX
),
241 DEFINE_BIT(_NEW_ACCUM
),
242 DEFINE_BIT(_NEW_COLOR
),
243 DEFINE_BIT(_NEW_DEPTH
),
244 DEFINE_BIT(_NEW_EVAL
),
245 DEFINE_BIT(_NEW_FOG
),
246 DEFINE_BIT(_NEW_HINT
),
247 DEFINE_BIT(_NEW_LIGHT
),
248 DEFINE_BIT(_NEW_LINE
),
249 DEFINE_BIT(_NEW_PIXEL
),
250 DEFINE_BIT(_NEW_POINT
),
251 DEFINE_BIT(_NEW_POLYGON
),
252 DEFINE_BIT(_NEW_POLYGONSTIPPLE
),
253 DEFINE_BIT(_NEW_SCISSOR
),
254 DEFINE_BIT(_NEW_STENCIL
),
255 DEFINE_BIT(_NEW_TEXTURE
),
256 DEFINE_BIT(_NEW_TRANSFORM
),
257 DEFINE_BIT(_NEW_VIEWPORT
),
258 DEFINE_BIT(_NEW_PACKUNPACK
),
259 DEFINE_BIT(_NEW_ARRAY
),
260 DEFINE_BIT(_NEW_RENDERMODE
),
261 DEFINE_BIT(_NEW_BUFFERS
),
262 DEFINE_BIT(_NEW_MULTISAMPLE
),
263 DEFINE_BIT(_NEW_TRACK_MATRIX
),
264 DEFINE_BIT(_NEW_PROGRAM
),
265 DEFINE_BIT(_NEW_PROGRAM_CONSTANTS
),
269 static struct dirty_bit_map brw_bits
[] = {
270 DEFINE_BIT(BRW_NEW_URB_FENCE
),
271 DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM
),
272 DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM
),
273 DEFINE_BIT(BRW_NEW_INPUT_DIMENSIONS
),
274 DEFINE_BIT(BRW_NEW_CURBE_OFFSETS
),
275 DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE
),
276 DEFINE_BIT(BRW_NEW_PRIMITIVE
),
277 DEFINE_BIT(BRW_NEW_CONTEXT
),
278 DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS
),
279 DEFINE_BIT(BRW_NEW_PSP
),
280 DEFINE_BIT(BRW_NEW_INDICES
),
281 DEFINE_BIT(BRW_NEW_INDEX_BUFFER
),
282 DEFINE_BIT(BRW_NEW_VERTICES
),
283 DEFINE_BIT(BRW_NEW_BATCH
),
284 DEFINE_BIT(BRW_NEW_DEPTH_BUFFER
),
288 static struct dirty_bit_map cache_bits
[] = {
289 DEFINE_BIT(CACHE_NEW_BLEND_STATE
),
290 DEFINE_BIT(CACHE_NEW_CC_VP
),
291 DEFINE_BIT(CACHE_NEW_CC_UNIT
),
292 DEFINE_BIT(CACHE_NEW_WM_PROG
),
293 DEFINE_BIT(CACHE_NEW_SAMPLER_DEFAULT_COLOR
),
294 DEFINE_BIT(CACHE_NEW_SAMPLER
),
295 DEFINE_BIT(CACHE_NEW_WM_UNIT
),
296 DEFINE_BIT(CACHE_NEW_SF_PROG
),
297 DEFINE_BIT(CACHE_NEW_SF_VP
),
298 DEFINE_BIT(CACHE_NEW_SF_UNIT
),
299 DEFINE_BIT(CACHE_NEW_VS_UNIT
),
300 DEFINE_BIT(CACHE_NEW_VS_PROG
),
301 DEFINE_BIT(CACHE_NEW_GS_UNIT
),
302 DEFINE_BIT(CACHE_NEW_GS_PROG
),
303 DEFINE_BIT(CACHE_NEW_CLIP_VP
),
304 DEFINE_BIT(CACHE_NEW_CLIP_UNIT
),
305 DEFINE_BIT(CACHE_NEW_CLIP_PROG
),
306 DEFINE_BIT(CACHE_NEW_SURFACE
),
307 DEFINE_BIT(CACHE_NEW_SURF_BIND
),
313 brw_update_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
317 for (i
= 0; i
< 32; i
++) {
318 if (bit_map
[i
].bit
== 0)
321 if (bit_map
[i
].bit
& bits
)
327 brw_print_dirty_count(struct dirty_bit_map
*bit_map
, int32_t bits
)
331 for (i
= 0; i
< 32; i
++) {
332 if (bit_map
[i
].bit
== 0)
335 fprintf(stderr
, "0x%08x: %12d (%s)\n",
336 bit_map
[i
].bit
, bit_map
[i
].count
, bit_map
[i
].name
);
340 /***********************************************************************
343 void brw_validate_state( struct brw_context
*brw
)
345 GLcontext
*ctx
= &brw
->intel
.ctx
;
346 struct intel_context
*intel
= &brw
->intel
;
347 struct brw_state_flags
*state
= &brw
->state
.dirty
;
349 const struct brw_tracked_state
**atoms
;
352 brw_clear_validated_bos(brw
);
354 state
->mesa
|= brw
->intel
.NewGLState
;
355 brw
->intel
.NewGLState
= 0;
357 brw_add_validated_bo(brw
, intel
->batch
->buf
);
359 if (IS_GEN6(intel
->intelScreen
->deviceID
)) {
361 num_atoms
= ARRAY_SIZE(gen6_atoms
);
364 num_atoms
= ARRAY_SIZE(gen4_atoms
);
367 if (brw
->emit_state_always
) {
373 if (brw
->fragment_program
!= ctx
->FragmentProgram
._Current
) {
374 brw
->fragment_program
= ctx
->FragmentProgram
._Current
;
375 brw
->state
.dirty
.brw
|= BRW_NEW_FRAGMENT_PROGRAM
;
378 if (brw
->vertex_program
!= ctx
->VertexProgram
._Current
) {
379 brw
->vertex_program
= ctx
->VertexProgram
._Current
;
380 brw
->state
.dirty
.brw
|= BRW_NEW_VERTEX_PROGRAM
;
383 if (state
->mesa
== 0 &&
388 if (brw
->state
.dirty
.brw
& BRW_NEW_CONTEXT
)
389 brw_clear_batch_cache(brw
);
391 brw
->intel
.Fallback
= GL_FALSE
; /* boolean, not bitfield */
393 /* do prepare stage for all atoms */
394 for (i
= 0; i
< num_atoms
; i
++) {
395 const struct brw_tracked_state
*atom
= atoms
[i
];
397 if (brw
->intel
.Fallback
)
400 if (check_state(state
, &atom
->dirty
)) {
407 intel_check_front_buffer_rendering(intel
);
409 /* Make sure that the textures which are referenced by the current
410 * brw fragment program are actually present/valid.
411 * If this fails, we can experience GPU lock-ups.
414 const struct brw_fragment_program
*fp
;
415 fp
= brw_fragment_program_const(brw
->fragment_program
);
417 assert((fp
->tex_units_used
& ctx
->Texture
._EnabledUnits
)
418 == fp
->tex_units_used
);
424 void brw_upload_state(struct brw_context
*brw
)
426 struct intel_context
*intel
= &brw
->intel
;
427 struct brw_state_flags
*state
= &brw
->state
.dirty
;
429 static int dirty_count
= 0;
430 const struct brw_tracked_state
**atoms
;
433 if (IS_GEN6(intel
->intelScreen
->deviceID
)) {
435 num_atoms
= ARRAY_SIZE(gen6_atoms
);
438 num_atoms
= ARRAY_SIZE(gen4_atoms
);
441 brw_clear_validated_bos(brw
);
444 /* Debug version which enforces various sanity checks on the
445 * state flags which are generated and checked to help ensure
446 * state atoms are ordered correctly in the list.
448 struct brw_state_flags examined
, prev
;
449 memset(&examined
, 0, sizeof(examined
));
452 for (i
= 0; i
< num_atoms
; i
++) {
453 const struct brw_tracked_state
*atom
= atoms
[i
];
454 struct brw_state_flags generated
;
456 assert(atom
->dirty
.mesa
||
460 if (brw
->intel
.Fallback
)
463 if (check_state(state
, &atom
->dirty
)) {
469 accumulate_state(&examined
, &atom
->dirty
);
471 /* generated = (prev ^ state)
472 * if (examined & generated)
475 xor_states(&generated
, &prev
, state
);
476 assert(!check_state(&examined
, &generated
));
481 for (i
= 0; i
< num_atoms
; i
++) {
482 const struct brw_tracked_state
*atom
= atoms
[i
];
484 if (brw
->intel
.Fallback
)
487 if (check_state(state
, &atom
->dirty
)) {
495 if (INTEL_DEBUG
& DEBUG_STATE
) {
496 brw_update_dirty_count(mesa_bits
, state
->mesa
);
497 brw_update_dirty_count(brw_bits
, state
->brw
);
498 brw_update_dirty_count(cache_bits
, state
->cache
);
499 if (dirty_count
++ % 1000 == 0) {
500 brw_print_dirty_count(mesa_bits
, state
->mesa
);
501 brw_print_dirty_count(brw_bits
, state
->brw
);
502 brw_print_dirty_count(cache_bits
, state
->cache
);
503 fprintf(stderr
, "\n");
507 if (!brw
->intel
.Fallback
)
508 memset(state
, 0, sizeof(*state
));