Minor r200 vertex program cleanups. Remove disabled leftovers from r300 vertex progra...
[mesa.git] / src / mesa / drivers / dri / i965 / brw_structs.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #ifndef BRW_STRUCTS_H
34 #define BRW_STRUCTS_H
35
36 /* Command packets:
37 */
38 struct header
39 {
40 GLuint length:16;
41 GLuint opcode:16;
42 };
43
44
45 union header_union
46 {
47 struct header bits;
48 GLuint dword;
49 };
50
51 struct brw_3d_control
52 {
53 struct
54 {
55 GLuint length:8;
56 GLuint notify_enable:1;
57 GLuint pad:3;
58 GLuint wc_flush_enable:1;
59 GLuint depth_stall_enable:1;
60 GLuint operation:2;
61 GLuint opcode:16;
62 } header;
63
64 struct
65 {
66 GLuint pad:2;
67 GLuint dest_addr_type:1;
68 GLuint dest_addr:29;
69 } dest;
70
71 GLuint dword2;
72 GLuint dword3;
73 };
74
75
76 struct brw_3d_primitive
77 {
78 struct
79 {
80 GLuint length:8;
81 GLuint pad:2;
82 GLuint topology:5;
83 GLuint indexed:1;
84 GLuint opcode:16;
85 } header;
86
87 GLuint verts_per_instance;
88 GLuint start_vert_location;
89 GLuint instance_count;
90 GLuint start_instance_location;
91 GLuint base_vert_location;
92 };
93
94 /* These seem to be passed around as function args, so it works out
95 * better to keep them as #defines:
96 */
97 #define BRW_FLUSH_READ_CACHE 0x1
98 #define BRW_FLUSH_STATE_CACHE 0x2
99 #define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4
100 #define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8
101
102 struct brw_mi_flush
103 {
104 GLuint flags:4;
105 GLuint pad:12;
106 GLuint opcode:16;
107 };
108
109 struct brw_vf_statistics
110 {
111 GLuint statistics_enable:1;
112 GLuint pad:15;
113 GLuint opcode:16;
114 };
115
116
117
118 struct brw_binding_table_pointers
119 {
120 struct header header;
121 GLuint vs;
122 GLuint gs;
123 GLuint clp;
124 GLuint sf;
125 GLuint wm;
126 };
127
128
129 struct brw_blend_constant_color
130 {
131 struct header header;
132 GLfloat blend_constant_color[4];
133 };
134
135
136 struct brw_depthbuffer
137 {
138 union header_union header;
139
140 union {
141 struct {
142 GLuint pitch:18;
143 GLuint format:3;
144 GLuint pad:4;
145 GLuint depth_offset_disable:1;
146 GLuint tile_walk:1;
147 GLuint tiled_surface:1;
148 GLuint pad2:1;
149 GLuint surface_type:3;
150 } bits;
151 GLuint dword;
152 } dword1;
153
154 GLuint dword2_base_addr;
155
156 union {
157 struct {
158 GLuint pad:1;
159 GLuint mipmap_layout:1;
160 GLuint lod:4;
161 GLuint width:13;
162 GLuint height:13;
163 } bits;
164 GLuint dword;
165 } dword3;
166
167 union {
168 struct {
169 GLuint pad:12;
170 GLuint min_array_element:9;
171 GLuint depth:11;
172 } bits;
173 GLuint dword;
174 } dword4;
175 };
176
177 struct brw_drawrect
178 {
179 struct header header;
180 GLuint xmin:16;
181 GLuint ymin:16;
182 GLuint xmax:16;
183 GLuint ymax:16;
184 GLuint xorg:16;
185 GLuint yorg:16;
186 };
187
188
189
190
191 struct brw_global_depth_offset_clamp
192 {
193 struct header header;
194 GLfloat depth_offset_clamp;
195 };
196
197 struct brw_indexbuffer
198 {
199 union {
200 struct
201 {
202 GLuint length:8;
203 GLuint index_format:2;
204 GLuint cut_index_enable:1;
205 GLuint pad:5;
206 GLuint opcode:16;
207 } bits;
208 GLuint dword;
209
210 } header;
211
212 GLuint buffer_start;
213 GLuint buffer_end;
214 };
215
216
217 struct brw_line_stipple
218 {
219 struct header header;
220
221 struct
222 {
223 GLuint pattern:16;
224 GLuint pad:16;
225 } bits0;
226
227 struct
228 {
229 GLuint repeat_count:9;
230 GLuint pad:7;
231 GLuint inverse_repeat_count:16;
232 } bits1;
233 };
234
235
236 struct brw_pipelined_state_pointers
237 {
238 struct header header;
239
240 struct {
241 GLuint pad:5;
242 GLuint offset:27;
243 } vs;
244
245 struct
246 {
247 GLuint enable:1;
248 GLuint pad:4;
249 GLuint offset:27;
250 } gs;
251
252 struct
253 {
254 GLuint enable:1;
255 GLuint pad:4;
256 GLuint offset:27;
257 } clp;
258
259 struct
260 {
261 GLuint pad:5;
262 GLuint offset:27;
263 } sf;
264
265 struct
266 {
267 GLuint pad:5;
268 GLuint offset:27;
269 } wm;
270
271 struct
272 {
273 GLuint pad:5;
274 GLuint offset:27; /* KW: check me! */
275 } cc;
276 };
277
278
279 struct brw_polygon_stipple_offset
280 {
281 struct header header;
282
283 struct {
284 GLuint y_offset:5;
285 GLuint pad:3;
286 GLuint x_offset:5;
287 GLuint pad0:19;
288 } bits0;
289 };
290
291
292
293 struct brw_polygon_stipple
294 {
295 struct header header;
296 GLuint stipple[32];
297 };
298
299
300
301 struct brw_pipeline_select
302 {
303 struct
304 {
305 GLuint pipeline_select:1;
306 GLuint pad:15;
307 GLuint opcode:16;
308 } header;
309 };
310
311
312 struct brw_pipe_control
313 {
314 struct
315 {
316 GLuint length:8;
317 GLuint notify_enable:1;
318 GLuint pad:2;
319 GLuint instruction_state_cache_flush_enable:1;
320 GLuint write_cache_flush_enable:1;
321 GLuint depth_stall_enable:1;
322 GLuint post_sync_operation:2;
323
324 GLuint opcode:16;
325 } header;
326
327 struct
328 {
329 GLuint pad:2;
330 GLuint dest_addr_type:1;
331 GLuint dest_addr:29;
332 } bits1;
333
334 GLuint data0;
335 GLuint data1;
336 };
337
338
339 struct brw_urb_fence
340 {
341 struct
342 {
343 GLuint length:8;
344 GLuint vs_realloc:1;
345 GLuint gs_realloc:1;
346 GLuint clp_realloc:1;
347 GLuint sf_realloc:1;
348 GLuint vfe_realloc:1;
349 GLuint cs_realloc:1;
350 GLuint pad:2;
351 GLuint opcode:16;
352 } header;
353
354 struct
355 {
356 GLuint vs_fence:10;
357 GLuint gs_fence:10;
358 GLuint clp_fence:10;
359 GLuint pad:2;
360 } bits0;
361
362 struct
363 {
364 GLuint sf_fence:10;
365 GLuint vf_fence:10;
366 GLuint cs_fence:10;
367 GLuint pad:2;
368 } bits1;
369 };
370
371 struct brw_constant_buffer_state /* previously brw_command_streamer */
372 {
373 struct header header;
374
375 struct
376 {
377 GLuint nr_urb_entries:3;
378 GLuint pad:1;
379 GLuint urb_entry_size:5;
380 GLuint pad0:23;
381 } bits0;
382 };
383
384 struct brw_constant_buffer
385 {
386 struct
387 {
388 GLuint length:8;
389 GLuint valid:1;
390 GLuint pad:7;
391 GLuint opcode:16;
392 } header;
393
394 struct
395 {
396 GLuint buffer_length:6;
397 GLuint buffer_address:26;
398 } bits0;
399 };
400
401 struct brw_state_base_address
402 {
403 struct header header;
404
405 struct
406 {
407 GLuint modify_enable:1;
408 GLuint pad:4;
409 GLuint general_state_address:27;
410 } bits0;
411
412 struct
413 {
414 GLuint modify_enable:1;
415 GLuint pad:4;
416 GLuint surface_state_address:27;
417 } bits1;
418
419 struct
420 {
421 GLuint modify_enable:1;
422 GLuint pad:4;
423 GLuint indirect_object_state_address:27;
424 } bits2;
425
426 struct
427 {
428 GLuint modify_enable:1;
429 GLuint pad:11;
430 GLuint general_state_upper_bound:20;
431 } bits3;
432
433 struct
434 {
435 GLuint modify_enable:1;
436 GLuint pad:11;
437 GLuint indirect_object_state_upper_bound:20;
438 } bits4;
439 };
440
441 struct brw_state_prefetch
442 {
443 struct header header;
444
445 struct
446 {
447 GLuint prefetch_count:3;
448 GLuint pad:3;
449 GLuint prefetch_pointer:26;
450 } bits0;
451 };
452
453 struct brw_system_instruction_pointer
454 {
455 struct header header;
456
457 struct
458 {
459 GLuint pad:4;
460 GLuint system_instruction_pointer:28;
461 } bits0;
462 };
463
464
465
466
467 /* State structs for the various fixed function units:
468 */
469
470
471 struct thread0
472 {
473 GLuint pad0:1;
474 GLuint grf_reg_count:3;
475 GLuint pad1:2;
476 GLuint kernel_start_pointer:26;
477 };
478
479 struct thread1
480 {
481 GLuint ext_halt_exception_enable:1;
482 GLuint sw_exception_enable:1;
483 GLuint mask_stack_exception_enable:1;
484 GLuint timeout_exception_enable:1;
485 GLuint illegal_op_exception_enable:1;
486 GLuint pad0:3;
487 GLuint depth_coef_urb_read_offset:6; /* WM only */
488 GLuint pad1:2;
489 GLuint floating_point_mode:1;
490 GLuint thread_priority:1;
491 GLuint binding_table_entry_count:8;
492 GLuint pad3:5;
493 GLuint single_program_flow:1;
494 };
495
496 struct thread2
497 {
498 GLuint per_thread_scratch_space:4;
499 GLuint pad0:6;
500 GLuint scratch_space_base_pointer:22;
501 };
502
503
504 struct thread3
505 {
506 GLuint dispatch_grf_start_reg:4;
507 GLuint urb_entry_read_offset:6;
508 GLuint pad0:1;
509 GLuint urb_entry_read_length:6;
510 GLuint pad1:1;
511 GLuint const_urb_entry_read_offset:6;
512 GLuint pad2:1;
513 GLuint const_urb_entry_read_length:6;
514 GLuint pad3:1;
515 };
516
517
518
519 struct brw_clip_unit_state
520 {
521 struct thread0 thread0;
522 struct thread1 thread1;
523 struct thread2 thread2;
524 struct thread3 thread3;
525
526 struct
527 {
528 GLuint pad0:9;
529 GLuint gs_output_stats:1; /* not always */
530 GLuint stats_enable:1;
531 GLuint nr_urb_entries:7;
532 GLuint pad1:1;
533 GLuint urb_entry_allocation_size:5;
534 GLuint pad2:1;
535 GLuint max_threads:6; /* may be less */
536 GLuint pad3:1;
537 } thread4;
538
539 struct
540 {
541 GLuint pad0:13;
542 GLuint clip_mode:3;
543 GLuint userclip_enable_flags:8;
544 GLuint userclip_must_clip:1;
545 GLuint pad1:1;
546 GLuint guard_band_enable:1;
547 GLuint viewport_z_clip_enable:1;
548 GLuint viewport_xy_clip_enable:1;
549 GLuint vertex_position_space:1;
550 GLuint api_mode:1;
551 GLuint pad2:1;
552 } clip5;
553
554 struct
555 {
556 GLuint pad0:5;
557 GLuint clipper_viewport_state_ptr:27;
558 } clip6;
559
560
561 GLfloat viewport_xmin;
562 GLfloat viewport_xmax;
563 GLfloat viewport_ymin;
564 GLfloat viewport_ymax;
565 };
566
567
568
569 struct brw_cc_unit_state
570 {
571 struct
572 {
573 GLuint pad0:3;
574 GLuint bf_stencil_pass_depth_pass_op:3;
575 GLuint bf_stencil_pass_depth_fail_op:3;
576 GLuint bf_stencil_fail_op:3;
577 GLuint bf_stencil_func:3;
578 GLuint bf_stencil_enable:1;
579 GLuint pad1:2;
580 GLuint stencil_write_enable:1;
581 GLuint stencil_pass_depth_pass_op:3;
582 GLuint stencil_pass_depth_fail_op:3;
583 GLuint stencil_fail_op:3;
584 GLuint stencil_func:3;
585 GLuint stencil_enable:1;
586 } cc0;
587
588
589 struct
590 {
591 GLuint bf_stencil_ref:8;
592 GLuint stencil_write_mask:8;
593 GLuint stencil_test_mask:8;
594 GLuint stencil_ref:8;
595 } cc1;
596
597
598 struct
599 {
600 GLuint logicop_enable:1;
601 GLuint pad0:10;
602 GLuint depth_write_enable:1;
603 GLuint depth_test_function:3;
604 GLuint depth_test:1;
605 GLuint bf_stencil_write_mask:8;
606 GLuint bf_stencil_test_mask:8;
607 } cc2;
608
609
610 struct
611 {
612 GLuint pad0:8;
613 GLuint alpha_test_func:3;
614 GLuint alpha_test:1;
615 GLuint blend_enable:1;
616 GLuint ia_blend_enable:1;
617 GLuint pad1:1;
618 GLuint alpha_test_format:1;
619 GLuint pad2:16;
620 } cc3;
621
622 struct
623 {
624 GLuint pad0:5;
625 GLuint cc_viewport_state_offset:27;
626 } cc4;
627
628 struct
629 {
630 GLuint pad0:2;
631 GLuint ia_dest_blend_factor:5;
632 GLuint ia_src_blend_factor:5;
633 GLuint ia_blend_function:3;
634 GLuint statistics_enable:1;
635 GLuint logicop_func:4;
636 GLuint pad1:11;
637 GLuint dither_enable:1;
638 } cc5;
639
640 struct
641 {
642 GLuint clamp_post_alpha_blend:1;
643 GLuint clamp_pre_alpha_blend:1;
644 GLuint clamp_range:2;
645 GLuint pad0:11;
646 GLuint y_dither_offset:2;
647 GLuint x_dither_offset:2;
648 GLuint dest_blend_factor:5;
649 GLuint src_blend_factor:5;
650 GLuint blend_function:3;
651 } cc6;
652
653 struct {
654 union {
655 GLfloat f;
656 GLubyte ub[4];
657 } alpha_ref;
658 } cc7;
659 };
660
661
662
663 struct brw_sf_unit_state
664 {
665 struct thread0 thread0;
666 struct thread1 thread1;
667 struct thread2 thread2;
668 struct thread3 thread3;
669
670 struct
671 {
672 GLuint pad0:10;
673 GLuint stats_enable:1;
674 GLuint nr_urb_entries:7;
675 GLuint pad1:1;
676 GLuint urb_entry_allocation_size:5;
677 GLuint pad2:1;
678 GLuint max_threads:6;
679 GLuint pad3:1;
680 } thread4;
681
682 struct
683 {
684 GLuint front_winding:1;
685 GLuint viewport_transform:1;
686 GLuint pad0:3;
687 GLuint sf_viewport_state_offset:27;
688 } sf5;
689
690 struct
691 {
692 GLuint pad0:9;
693 GLuint dest_org_vbias:4;
694 GLuint dest_org_hbias:4;
695 GLuint scissor:1;
696 GLuint disable_2x2_trifilter:1;
697 GLuint disable_zero_pix_trifilter:1;
698 GLuint point_rast_rule:2;
699 GLuint line_endcap_aa_region_width:2;
700 GLuint line_width:4;
701 GLuint fast_scissor_disable:1;
702 GLuint cull_mode:2;
703 GLuint aa_enable:1;
704 } sf6;
705
706 struct
707 {
708 GLuint point_size:11;
709 GLuint use_point_size_state:1;
710 GLuint subpixel_precision:1;
711 GLuint sprite_point:1;
712 GLuint pad0:11;
713 GLuint trifan_pv:2;
714 GLuint linestrip_pv:2;
715 GLuint tristrip_pv:2;
716 GLuint line_last_pixel_enable:1;
717 } sf7;
718
719 };
720
721
722 struct brw_gs_unit_state
723 {
724 struct thread0 thread0;
725 struct thread1 thread1;
726 struct thread2 thread2;
727 struct thread3 thread3;
728
729 struct
730 {
731 GLuint pad0:10;
732 GLuint stats_enable:1;
733 GLuint nr_urb_entries:7;
734 GLuint pad1:1;
735 GLuint urb_entry_allocation_size:5;
736 GLuint pad2:1;
737 GLuint max_threads:1;
738 GLuint pad3:6;
739 } thread4;
740
741 struct
742 {
743 GLuint sampler_count:3;
744 GLuint pad0:2;
745 GLuint sampler_state_pointer:27;
746 } gs5;
747
748
749 struct
750 {
751 GLuint max_vp_index:4;
752 GLuint pad0:26;
753 GLuint reorder_enable:1;
754 GLuint pad1:1;
755 } gs6;
756 };
757
758
759 struct brw_vs_unit_state
760 {
761 struct thread0 thread0;
762 struct thread1 thread1;
763 struct thread2 thread2;
764 struct thread3 thread3;
765
766 struct
767 {
768 GLuint pad0:10;
769 GLuint stats_enable:1;
770 GLuint nr_urb_entries:7;
771 GLuint pad1:1;
772 GLuint urb_entry_allocation_size:5;
773 GLuint pad2:1;
774 GLuint max_threads:4;
775 GLuint pad3:3;
776 } thread4;
777
778 struct
779 {
780 GLuint sampler_count:3;
781 GLuint pad0:2;
782 GLuint sampler_state_pointer:27;
783 } vs5;
784
785 struct
786 {
787 GLuint vs_enable:1;
788 GLuint vert_cache_disable:1;
789 GLuint pad0:30;
790 } vs6;
791 };
792
793
794 struct brw_wm_unit_state
795 {
796 struct thread0 thread0;
797 struct thread1 thread1;
798 struct thread2 thread2;
799 struct thread3 thread3;
800
801 struct {
802 GLuint stats_enable:1;
803 GLuint pad0:1;
804 GLuint sampler_count:3;
805 GLuint sampler_state_pointer:27;
806 } wm4;
807
808 struct
809 {
810 GLuint enable_8_pix:1;
811 GLuint enable_16_pix:1;
812 GLuint enable_32_pix:1;
813 GLuint pad0:7;
814 GLuint legacy_global_depth_bias:1;
815 GLuint line_stipple:1;
816 GLuint depth_offset:1;
817 GLuint polygon_stipple:1;
818 GLuint line_aa_region_width:2;
819 GLuint line_endcap_aa_region_width:2;
820 GLuint early_depth_test:1;
821 GLuint thread_dispatch_enable:1;
822 GLuint program_uses_depth:1;
823 GLuint program_computes_depth:1;
824 GLuint program_uses_killpixel:1;
825 GLuint legacy_line_rast: 1;
826 GLuint pad1:1;
827 GLuint max_threads:6;
828 GLuint pad2:1;
829 } wm5;
830
831 GLfloat global_depth_offset_constant;
832 GLfloat global_depth_offset_scale;
833 };
834
835 struct brw_sampler_default_color {
836 GLfloat color[4];
837 };
838
839 struct brw_sampler_state
840 {
841
842 struct
843 {
844 GLuint shadow_function:3;
845 GLuint lod_bias:11;
846 GLuint min_filter:3;
847 GLuint mag_filter:3;
848 GLuint mip_filter:2;
849 GLuint base_level:5;
850 GLuint pad:1;
851 GLuint lod_preclamp:1;
852 GLuint default_color_mode:1;
853 GLuint pad0:1;
854 GLuint disable:1;
855 } ss0;
856
857 struct
858 {
859 GLuint r_wrap_mode:3;
860 GLuint t_wrap_mode:3;
861 GLuint s_wrap_mode:3;
862 GLuint pad:3;
863 GLuint max_lod:10;
864 GLuint min_lod:10;
865 } ss1;
866
867
868 struct
869 {
870 GLuint pad:5;
871 GLuint default_color_pointer:27;
872 } ss2;
873
874 struct
875 {
876 GLuint pad:19;
877 GLuint max_aniso:3;
878 GLuint chroma_key_mode:1;
879 GLuint chroma_key_index:2;
880 GLuint chroma_key_enable:1;
881 GLuint monochrome_filter_width:3;
882 GLuint monochrome_filter_height:3;
883 } ss3;
884 };
885
886
887 struct brw_clipper_viewport
888 {
889 GLfloat xmin;
890 GLfloat xmax;
891 GLfloat ymin;
892 GLfloat ymax;
893 };
894
895 struct brw_cc_viewport
896 {
897 GLfloat min_depth;
898 GLfloat max_depth;
899 };
900
901 struct brw_sf_viewport
902 {
903 struct {
904 GLfloat m00;
905 GLfloat m11;
906 GLfloat m22;
907 GLfloat m30;
908 GLfloat m31;
909 GLfloat m32;
910 } viewport;
911
912 struct {
913 GLshort xmin;
914 GLshort ymin;
915 GLshort xmax;
916 GLshort ymax;
917 } scissor;
918 };
919
920 /* Documented in the subsystem/shared-functions/sampler chapter...
921 */
922 struct brw_surface_state
923 {
924 struct {
925 GLuint cube_pos_z:1;
926 GLuint cube_neg_z:1;
927 GLuint cube_pos_y:1;
928 GLuint cube_neg_y:1;
929 GLuint cube_pos_x:1;
930 GLuint cube_neg_x:1;
931 GLuint pad:4;
932 GLuint mipmap_layout_mode:1;
933 GLuint vert_line_stride_ofs:1;
934 GLuint vert_line_stride:1;
935 GLuint color_blend:1;
936 GLuint writedisable_blue:1;
937 GLuint writedisable_green:1;
938 GLuint writedisable_red:1;
939 GLuint writedisable_alpha:1;
940 GLuint surface_format:9;
941 GLuint data_return_format:1;
942 GLuint pad0:1;
943 GLuint surface_type:3;
944 } ss0;
945
946 struct {
947 GLuint base_addr;
948 } ss1;
949
950 struct {
951 GLuint pad:2;
952 GLuint mip_count:4;
953 GLuint width:13;
954 GLuint height:13;
955 } ss2;
956
957 struct {
958 GLuint tile_walk:1;
959 GLuint tiled_surface:1;
960 GLuint pad:1;
961 GLuint pitch:18;
962 GLuint depth:11;
963 } ss3;
964
965 struct {
966 GLuint pad:19;
967 GLuint min_array_elt:9;
968 GLuint min_lod:4;
969 } ss4;
970 };
971
972
973
974 struct brw_vertex_buffer_state
975 {
976 struct {
977 GLuint pitch:11;
978 GLuint pad:15;
979 GLuint access_type:1;
980 GLuint vb_index:5;
981 } vb0;
982
983 GLuint start_addr;
984 GLuint max_index;
985 #if 1
986 GLuint instance_data_step_rate; /* not included for sequential/random vertices? */
987 #endif
988 };
989
990 #define BRW_VBP_MAX 17
991
992 struct brw_vb_array_state {
993 struct header header;
994 struct brw_vertex_buffer_state vb[BRW_VBP_MAX];
995 };
996
997
998 struct brw_vertex_element_state
999 {
1000 struct
1001 {
1002 GLuint src_offset:11;
1003 GLuint pad:5;
1004 GLuint src_format:9;
1005 GLuint pad0:1;
1006 GLuint valid:1;
1007 GLuint vertex_buffer_index:5;
1008 } ve0;
1009
1010 struct
1011 {
1012 GLuint dst_offset:8;
1013 GLuint pad:8;
1014 GLuint vfcomponent3:4;
1015 GLuint vfcomponent2:4;
1016 GLuint vfcomponent1:4;
1017 GLuint vfcomponent0:4;
1018 } ve1;
1019 };
1020
1021 #define BRW_VEP_MAX 18
1022
1023 struct brw_vertex_element_packet {
1024 struct header header;
1025 struct brw_vertex_element_state ve[BRW_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */
1026 };
1027
1028
1029 struct brw_urb_immediate {
1030 GLuint opcode:4;
1031 GLuint offset:6;
1032 GLuint swizzle_control:2;
1033 GLuint pad:1;
1034 GLuint allocate:1;
1035 GLuint used:1;
1036 GLuint complete:1;
1037 GLuint response_length:4;
1038 GLuint msg_length:4;
1039 GLuint msg_target:4;
1040 GLuint pad1:3;
1041 GLuint end_of_thread:1;
1042 };
1043
1044 /* Instruction format for the execution units:
1045 */
1046
1047 struct brw_instruction
1048 {
1049 struct
1050 {
1051 GLuint opcode:7;
1052 GLuint pad:1;
1053 GLuint access_mode:1;
1054 GLuint mask_control:1;
1055 GLuint dependency_control:2;
1056 GLuint compression_control:2;
1057 GLuint thread_control:2;
1058 GLuint predicate_control:4;
1059 GLuint predicate_inverse:1;
1060 GLuint execution_size:3;
1061 GLuint destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */
1062 GLuint pad0:2;
1063 GLuint debug_control:1;
1064 GLuint saturate:1;
1065 } header;
1066
1067 union {
1068 struct
1069 {
1070 GLuint dest_reg_file:2;
1071 GLuint dest_reg_type:3;
1072 GLuint src0_reg_file:2;
1073 GLuint src0_reg_type:3;
1074 GLuint src1_reg_file:2;
1075 GLuint src1_reg_type:3;
1076 GLuint pad:1;
1077 GLuint dest_subreg_nr:5;
1078 GLuint dest_reg_nr:8;
1079 GLuint dest_horiz_stride:2;
1080 GLuint dest_address_mode:1;
1081 } da1;
1082
1083 struct
1084 {
1085 GLuint dest_reg_file:2;
1086 GLuint dest_reg_type:3;
1087 GLuint src0_reg_file:2;
1088 GLuint src0_reg_type:3;
1089 GLuint pad:6;
1090 GLint dest_indirect_offset:10; /* offset against the deref'd address reg */
1091 GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */
1092 GLuint dest_horiz_stride:2;
1093 GLuint dest_address_mode:1;
1094 } ia1;
1095
1096 struct
1097 {
1098 GLuint dest_reg_file:2;
1099 GLuint dest_reg_type:3;
1100 GLuint src0_reg_file:2;
1101 GLuint src0_reg_type:3;
1102 GLuint src1_reg_file:2;
1103 GLuint src1_reg_type:3;
1104 GLuint pad0:1;
1105 GLuint dest_writemask:4;
1106 GLuint dest_subreg_nr:1;
1107 GLuint dest_reg_nr:8;
1108 GLuint pad1:2;
1109 GLuint dest_address_mode:1;
1110 } da16;
1111
1112 struct
1113 {
1114 GLuint dest_reg_file:2;
1115 GLuint dest_reg_type:3;
1116 GLuint src0_reg_file:2;
1117 GLuint src0_reg_type:3;
1118 GLuint pad0:6;
1119 GLuint dest_writemask:4;
1120 GLint dest_indirect_offset:6;
1121 GLuint dest_subreg_nr:3;
1122 GLuint pad1:2;
1123 GLuint dest_address_mode:1;
1124 } ia16;
1125 } bits1;
1126
1127
1128 union {
1129 struct
1130 {
1131 GLuint src0_subreg_nr:5;
1132 GLuint src0_reg_nr:8;
1133 GLuint src0_abs:1;
1134 GLuint src0_negate:1;
1135 GLuint src0_address_mode:1;
1136 GLuint src0_horiz_stride:2;
1137 GLuint src0_width:3;
1138 GLuint src0_vert_stride:4;
1139 GLuint flag_reg_nr:1;
1140 GLuint pad:6;
1141 } da1;
1142
1143 struct
1144 {
1145 GLint src0_indirect_offset:10;
1146 GLuint src0_subreg_nr:3;
1147 GLuint src0_abs:1;
1148 GLuint src0_negate:1;
1149 GLuint src0_address_mode:1;
1150 GLuint src0_horiz_stride:2;
1151 GLuint src0_width:3;
1152 GLuint src0_vert_stride:4;
1153 GLuint flag_reg_nr:1;
1154 GLuint pad:6;
1155 } ia1;
1156
1157 struct
1158 {
1159 GLuint src0_swz_x:2;
1160 GLuint src0_swz_y:2;
1161 GLuint src0_subreg_nr:1;
1162 GLuint src0_reg_nr:8;
1163 GLuint src0_abs:1;
1164 GLuint src0_negate:1;
1165 GLuint src0_address_mode:1;
1166 GLuint src0_swz_z:2;
1167 GLuint src0_swz_w:2;
1168 GLuint pad0:1;
1169 GLuint src0_vert_stride:4;
1170 GLuint flag_reg_nr:1;
1171 GLuint pad1:6;
1172 } da16;
1173
1174 struct
1175 {
1176 GLuint src0_swz_x:2;
1177 GLuint src0_swz_y:2;
1178 GLint src0_indirect_offset:6;
1179 GLuint src0_subreg_nr:3;
1180 GLuint src0_abs:1;
1181 GLuint src0_negate:1;
1182 GLuint src0_address_mode:1;
1183 GLuint src0_swz_z:2;
1184 GLuint src0_swz_w:2;
1185 GLuint pad0:1;
1186 GLuint src0_vert_stride:4;
1187 GLuint flag_reg_nr:1;
1188 GLuint pad1:6;
1189 } ia16;
1190
1191 } bits2;
1192
1193 union
1194 {
1195 struct
1196 {
1197 GLuint src1_subreg_nr:5;
1198 GLuint src1_reg_nr:8;
1199 GLuint src1_abs:1;
1200 GLuint src1_negate:1;
1201 GLuint pad:1;
1202 GLuint src1_horiz_stride:2;
1203 GLuint src1_width:3;
1204 GLuint src1_vert_stride:4;
1205 GLuint pad0:7;
1206 } da1;
1207
1208 struct
1209 {
1210 GLuint src1_swz_x:2;
1211 GLuint src1_swz_y:2;
1212 GLuint src1_subreg_nr:1;
1213 GLuint src1_reg_nr:8;
1214 GLuint src1_abs:1;
1215 GLuint src1_negate:1;
1216 GLuint pad0:1;
1217 GLuint src1_swz_z:2;
1218 GLuint src1_swz_w:2;
1219 GLuint pad1:1;
1220 GLuint src1_vert_stride:4;
1221 GLuint pad2:7;
1222 } da16;
1223
1224 struct
1225 {
1226 GLint src1_indirect_offset:10;
1227 GLuint src1_subreg_nr:3;
1228 GLuint src1_abs:1;
1229 GLuint src1_negate:1;
1230 GLuint pad0:1;
1231 GLuint src1_horiz_stride:2;
1232 GLuint src1_width:3;
1233 GLuint src1_vert_stride:4;
1234 GLuint flag_reg_nr:1;
1235 GLuint pad1:6;
1236 } ia1;
1237
1238 struct
1239 {
1240 GLuint src1_swz_x:2;
1241 GLuint src1_swz_y:2;
1242 GLint src1_indirect_offset:6;
1243 GLuint src1_subreg_nr:3;
1244 GLuint src1_abs:1;
1245 GLuint src1_negate:1;
1246 GLuint pad0:1;
1247 GLuint src1_swz_z:2;
1248 GLuint src1_swz_w:2;
1249 GLuint pad1:1;
1250 GLuint src1_vert_stride:4;
1251 GLuint flag_reg_nr:1;
1252 GLuint pad2:6;
1253 } ia16;
1254
1255
1256 struct
1257 {
1258 GLint jump_count:16; /* note: signed */
1259 GLuint pop_count:4;
1260 GLuint pad0:12;
1261 } if_else;
1262
1263 struct {
1264 GLuint function:4;
1265 GLuint int_type:1;
1266 GLuint precision:1;
1267 GLuint saturate:1;
1268 GLuint data_type:1;
1269 GLuint pad0:8;
1270 GLuint response_length:4;
1271 GLuint msg_length:4;
1272 GLuint msg_target:4;
1273 GLuint pad1:3;
1274 GLuint end_of_thread:1;
1275 } math;
1276
1277 struct {
1278 GLuint binding_table_index:8;
1279 GLuint sampler:4;
1280 GLuint return_format:2;
1281 GLuint msg_type:2;
1282 GLuint response_length:4;
1283 GLuint msg_length:4;
1284 GLuint msg_target:4;
1285 GLuint pad1:3;
1286 GLuint end_of_thread:1;
1287 } sampler;
1288
1289 struct brw_urb_immediate urb;
1290
1291 struct {
1292 GLuint binding_table_index:8;
1293 GLuint msg_control:4;
1294 GLuint msg_type:2;
1295 GLuint target_cache:2;
1296 GLuint response_length:4;
1297 GLuint msg_length:4;
1298 GLuint msg_target:4;
1299 GLuint pad1:3;
1300 GLuint end_of_thread:1;
1301 } dp_read;
1302
1303 struct {
1304 GLuint binding_table_index:8;
1305 GLuint msg_control:3;
1306 GLuint pixel_scoreboard_clear:1;
1307 GLuint msg_type:3;
1308 GLuint send_commit_msg:1;
1309 GLuint response_length:4;
1310 GLuint msg_length:4;
1311 GLuint msg_target:4;
1312 GLuint pad1:3;
1313 GLuint end_of_thread:1;
1314 } dp_write;
1315
1316 struct {
1317 GLuint pad:16;
1318 GLuint response_length:4;
1319 GLuint msg_length:4;
1320 GLuint msg_target:4;
1321 GLuint pad1:3;
1322 GLuint end_of_thread:1;
1323 } generic;
1324
1325 GLuint ud;
1326 } bits3;
1327 };
1328
1329
1330 #endif