2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
41 unsigned vs_realloc
:1;
42 unsigned gs_realloc
:1;
43 unsigned clp_realloc
:1;
44 unsigned sf_realloc
:1;
45 unsigned vfe_realloc
:1;
46 unsigned cs_realloc
:1;
55 unsigned clp_fence
:10;
68 /* State structs for the various fixed function units:
75 unsigned grf_reg_count
:3;
77 unsigned kernel_start_pointer
:26; /* Offset from GENERAL_STATE_BASE */
82 unsigned ext_halt_exception_enable
:1;
83 unsigned sw_exception_enable
:1;
84 unsigned mask_stack_exception_enable
:1;
85 unsigned timeout_exception_enable
:1;
86 unsigned illegal_op_exception_enable
:1;
88 unsigned depth_coef_urb_read_offset
:6; /* WM only */
90 unsigned floating_point_mode
:1;
91 unsigned thread_priority
:1;
92 unsigned binding_table_entry_count
:8;
94 unsigned single_program_flow
:1;
99 unsigned per_thread_scratch_space
:4;
101 unsigned scratch_space_base_pointer
:22;
107 unsigned dispatch_grf_start_reg
:4;
108 unsigned urb_entry_read_offset
:6;
110 unsigned urb_entry_read_length
:6;
112 unsigned const_urb_entry_read_offset
:6;
114 unsigned const_urb_entry_read_length
:6;
120 struct brw_clip_unit_state
122 struct thread0 thread0
;
126 unsigned sw_exception_enable
:1;
128 unsigned mask_stack_exception_enable
:1;
130 unsigned illegal_op_exception_enable
:1;
132 unsigned floating_point_mode
:1;
133 unsigned thread_priority
:1;
134 unsigned binding_table_entry_count
:8;
136 unsigned single_program_flow
:1;
139 struct thread2 thread2
;
140 struct thread3 thread3
;
145 unsigned gs_output_stats
:1; /* not always */
146 unsigned stats_enable
:1;
147 unsigned nr_urb_entries
:7;
149 unsigned urb_entry_allocation_size
:5;
151 unsigned max_threads
:5; /* may be less */
158 unsigned clip_mode
:3;
159 unsigned userclip_enable_flags
:8;
160 unsigned userclip_must_clip
:1;
161 unsigned negative_w_clip_test
:1;
162 unsigned guard_band_enable
:1;
163 unsigned viewport_z_clip_enable
:1;
164 unsigned viewport_xy_clip_enable
:1;
165 unsigned vertex_position_space
:1;
173 unsigned clipper_viewport_state_ptr
:27;
183 struct gen6_blend_state
186 unsigned dest_blend_factor
:5;
187 unsigned source_blend_factor
:5;
189 unsigned blend_func
:3;
191 unsigned ia_dest_blend_factor
:5;
192 unsigned ia_source_blend_factor
:5;
194 unsigned ia_blend_func
:3;
196 unsigned ia_blend_enable
:1;
197 unsigned blend_enable
:1;
201 unsigned post_blend_clamp_enable
:1;
202 unsigned pre_blend_clamp_enable
:1;
203 unsigned clamp_range
:2;
205 unsigned x_dither_offset
:2;
206 unsigned y_dither_offset
:2;
207 unsigned dither_enable
:1;
208 unsigned alpha_test_func
:3;
209 unsigned alpha_test_enable
:1;
211 unsigned logic_op_func
:4;
212 unsigned logic_op_enable
:1;
214 unsigned write_disable_b
:1;
215 unsigned write_disable_g
:1;
216 unsigned write_disable_r
:1;
217 unsigned write_disable_a
:1;
219 unsigned alpha_to_coverage_dither
:1;
220 unsigned alpha_to_one
:1;
221 unsigned alpha_to_coverage
:1;
225 struct gen6_color_calc_state
228 unsigned alpha_test_format
:1;
230 unsigned round_disable
:1;
231 unsigned bf_stencil_ref
:8;
232 unsigned stencil_ref
:8;
249 struct gen6_depth_stencil_state
253 unsigned bf_stencil_pass_depth_pass_op
:3;
254 unsigned bf_stencil_pass_depth_fail_op
:3;
255 unsigned bf_stencil_fail_op
:3;
256 unsigned bf_stencil_func
:3;
257 unsigned bf_stencil_enable
:1;
259 unsigned stencil_write_enable
:1;
260 unsigned stencil_pass_depth_pass_op
:3;
261 unsigned stencil_pass_depth_fail_op
:3;
262 unsigned stencil_fail_op
:3;
263 unsigned stencil_func
:3;
264 unsigned stencil_enable
:1;
268 unsigned bf_stencil_write_mask
:8;
269 unsigned bf_stencil_test_mask
:8;
270 unsigned stencil_write_mask
:8;
271 unsigned stencil_test_mask
:8;
276 unsigned depth_write_enable
:1;
277 unsigned depth_test_func
:3;
279 unsigned depth_test_enable
:1;
283 struct brw_cc_unit_state
288 unsigned bf_stencil_pass_depth_pass_op
:3;
289 unsigned bf_stencil_pass_depth_fail_op
:3;
290 unsigned bf_stencil_fail_op
:3;
291 unsigned bf_stencil_func
:3;
292 unsigned bf_stencil_enable
:1;
294 unsigned stencil_write_enable
:1;
295 unsigned stencil_pass_depth_pass_op
:3;
296 unsigned stencil_pass_depth_fail_op
:3;
297 unsigned stencil_fail_op
:3;
298 unsigned stencil_func
:3;
299 unsigned stencil_enable
:1;
305 unsigned bf_stencil_ref
:8;
306 unsigned stencil_write_mask
:8;
307 unsigned stencil_test_mask
:8;
308 unsigned stencil_ref
:8;
314 unsigned logicop_enable
:1;
316 unsigned depth_write_enable
:1;
317 unsigned depth_test_function
:3;
318 unsigned depth_test
:1;
319 unsigned bf_stencil_write_mask
:8;
320 unsigned bf_stencil_test_mask
:8;
327 unsigned alpha_test_func
:3;
328 unsigned alpha_test
:1;
329 unsigned blend_enable
:1;
330 unsigned ia_blend_enable
:1;
332 unsigned alpha_test_format
:1;
339 unsigned cc_viewport_state_offset
:27; /* Offset from GENERAL_STATE_BASE */
345 unsigned ia_dest_blend_factor
:5;
346 unsigned ia_src_blend_factor
:5;
347 unsigned ia_blend_function
:3;
348 unsigned statistics_enable
:1;
349 unsigned logicop_func
:4;
351 unsigned dither_enable
:1;
356 unsigned clamp_post_alpha_blend
:1;
357 unsigned clamp_pre_alpha_blend
:1;
358 unsigned clamp_range
:2;
360 unsigned y_dither_offset
:2;
361 unsigned x_dither_offset
:2;
362 unsigned dest_blend_factor
:5;
363 unsigned src_blend_factor
:5;
364 unsigned blend_function
:3;
375 struct brw_sf_unit_state
377 struct thread0 thread0
;
378 struct thread1 thread1
;
379 struct thread2 thread2
;
380 struct thread3 thread3
;
385 unsigned stats_enable
:1;
386 unsigned nr_urb_entries
:7;
388 unsigned urb_entry_allocation_size
:5;
390 unsigned max_threads
:6;
396 unsigned front_winding
:1;
397 unsigned viewport_transform
:1;
399 unsigned sf_viewport_state_offset
:27; /* Offset from GENERAL_STATE_BASE */
405 unsigned dest_org_vbias
:4;
406 unsigned dest_org_hbias
:4;
408 unsigned disable_2x2_trifilter
:1;
409 unsigned disable_zero_pix_trifilter
:1;
410 unsigned point_rast_rule
:2;
411 unsigned line_endcap_aa_region_width
:2;
412 unsigned line_width
:4;
413 unsigned fast_scissor_disable
:1;
414 unsigned cull_mode
:2;
415 unsigned aa_enable
:1;
420 unsigned point_size
:11;
421 unsigned use_point_size_state
:1;
422 unsigned subpixel_precision
:1;
423 unsigned sprite_point
:1;
425 unsigned aa_line_distance_mode
:1;
426 unsigned trifan_pv
:2;
427 unsigned linestrip_pv
:2;
428 unsigned tristrip_pv
:2;
429 unsigned line_last_pixel_enable
:1;
434 struct gen6_scissor_rect
442 struct brw_gs_unit_state
444 struct thread0 thread0
;
445 struct thread1 thread1
;
446 struct thread2 thread2
;
447 struct thread3 thread3
;
452 unsigned rendering_enable
:1; /* for Ironlake */
454 unsigned stats_enable
:1;
455 unsigned nr_urb_entries
:7;
457 unsigned urb_entry_allocation_size
:5;
459 unsigned max_threads
:5;
465 unsigned sampler_count
:3;
467 unsigned sampler_state_pointer
:27;
473 unsigned max_vp_index
:4;
475 unsigned svbi_post_inc_value
:10;
477 unsigned svbi_post_inc_enable
:1;
478 unsigned svbi_payload
:1;
479 unsigned discard_adjaceny
:1;
480 unsigned reorder_enable
:1;
486 struct brw_vs_unit_state
488 struct thread0 thread0
;
489 struct thread1 thread1
;
490 struct thread2 thread2
;
491 struct thread3 thread3
;
496 unsigned stats_enable
:1;
497 unsigned nr_urb_entries
:7;
499 unsigned urb_entry_allocation_size
:5;
501 unsigned max_threads
:6;
507 unsigned sampler_count
:3;
509 unsigned sampler_state_pointer
:27;
514 unsigned vs_enable
:1;
515 unsigned vert_cache_disable
:1;
521 struct brw_wm_unit_state
523 struct thread0 thread0
;
524 struct thread1 thread1
;
525 struct thread2 thread2
;
526 struct thread3 thread3
;
529 unsigned stats_enable
:1;
530 unsigned depth_buffer_clear
:1;
531 unsigned sampler_count
:3;
532 unsigned sampler_state_pointer
:27;
537 unsigned enable_8_pix
:1;
538 unsigned enable_16_pix
:1;
539 unsigned enable_32_pix
:1;
540 unsigned enable_con_32_pix
:1;
541 unsigned enable_con_64_pix
:1;
544 /* These next four bits are for Ironlake+ */
545 unsigned fast_span_coverage_enable
:1;
546 unsigned depth_buffer_clear
:1;
547 unsigned depth_buffer_resolve_enable
:1;
548 unsigned hierarchical_depth_buffer_resolve_enable
:1;
550 unsigned legacy_global_depth_bias
:1;
551 unsigned line_stipple
:1;
552 unsigned depth_offset
:1;
553 unsigned polygon_stipple
:1;
554 unsigned line_aa_region_width
:2;
555 unsigned line_endcap_aa_region_width
:2;
556 unsigned early_depth_test
:1;
557 unsigned thread_dispatch_enable
:1;
558 unsigned program_uses_depth
:1;
559 unsigned program_computes_depth
:1;
560 unsigned program_uses_killpixel
:1;
561 unsigned legacy_line_rast
: 1;
562 unsigned transposed_urb_read_enable
:1;
563 unsigned max_threads
:7;
566 float global_depth_offset_constant
;
567 float global_depth_offset_scale
;
569 /* for Ironlake only */
572 unsigned grf_reg_count_1
:3;
574 unsigned kernel_start_pointer_1
:26;
579 unsigned grf_reg_count_2
:3;
581 unsigned kernel_start_pointer_2
:26;
586 unsigned grf_reg_count_3
:3;
588 unsigned kernel_start_pointer_3
:26;
592 struct gen5_sampler_default_color
{
601 struct brw_clipper_viewport
609 struct brw_cc_viewport
615 struct brw_sf_viewport
626 /* scissor coordinates are inclusive */
635 struct gen6_sf_viewport
{
646 struct gen7_sf_clip_viewport
{