src/mesa/drivers/dri/i965/brw_structs.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_STRUCTS_H
  34 #define BRW_STRUCTS_H
  35
  36 /* Command packets:
  37  */
  38 struct header
  39 {
  40    GLuint length:16;
  41    GLuint opcode:16;
  42 };
  43
  44
  45 union header_union
  46 {
  47    struct header bits;
  48    GLuint dword;
  49 };
  50
  51 struct brw_3d_control
  52 {
  53    struct
  54    {
  55       GLuint length:8;
  56       GLuint notify_enable:1;
  57       GLuint pad:3;
  58       GLuint wc_flush_enable:1;
  59       GLuint depth_stall_enable:1;
  60       GLuint operation:2;
  61       GLuint opcode:16;
  62    } header;
  63
  64    struct
  65    {
  66       GLuint pad:2;
  67       GLuint dest_addr_type:1;
  68       GLuint dest_addr:29;
  69    } dest;
  70
  71    GLuint dword2;
  72    GLuint dword3;
  73 };
  74
  75
  76 struct brw_3d_primitive
  77 {
  78    struct
  79    {
  80       GLuint length:8;
  81       GLuint pad:2;
  82       GLuint topology:5;
  83       GLuint indexed:1;
  84       GLuint opcode:16;
  85    } header;
  86
  87    GLuint verts_per_instance;
  88    GLuint start_vert_location;
  89    GLuint instance_count;
  90    GLuint start_instance_location;
  91    GLuint base_vert_location;
  92 };
  93
  94 /* These seem to be passed around as function args, so it works out
  95  * better to keep them as #defines:
  96  */
  97 #define BRW_FLUSH_READ_CACHE           0x1
  98 #define BRW_FLUSH_STATE_CACHE          0x2
  99 #define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4
 100 #define BRW_FLUSH_SNAPSHOT_COUNTERS    0x8
 101
 102 struct brw_mi_flush
 103 {
 104    GLuint flags:4;
 105    GLuint pad:12;
 106    GLuint opcode:16;
 107 };
 108
 109 struct brw_vf_statistics
 110 {
 111    GLuint statistics_enable:1;
 112    GLuint pad:15;
 113    GLuint opcode:16;
 114 };
 115
 116
 117
 118 struct brw_binding_table_pointers
 119 {
 120    struct header header;
 121    GLuint vs;
 122    GLuint gs;
 123    GLuint clp;
 124    GLuint sf;
 125    GLuint wm;
 126 };
 127
 128
 129 struct brw_blend_constant_color
 130 {
 131    struct header header;
 132    GLfloat blend_constant_color[4];
 133 };
 134
 135
 136 struct brw_depthbuffer
 137 {
 138    union header_union header;
 139
 140    union {
 141       struct {
 142          GLuint pitch:18;
 143          GLuint format:3;
 144          GLuint pad:2;
 145          GLuint software_tiled_rendering_mode:2;
 146          GLuint depth_offset_disable:1;
 147          GLuint tile_walk:1;
 148          GLuint tiled_surface:1;
 149          GLuint pad2:1;
 150          GLuint surface_type:3;
 151       } bits;
 152       GLuint dword;
 153    } dword1;
 154
 155    GLuint dword2_base_addr;
 156
 157    union {
 158       struct {
 159          GLuint pad:1;
 160          GLuint mipmap_layout:1;
 161          GLuint lod:4;
 162          GLuint width:13;
 163          GLuint height:13;
 164       } bits;
 165       GLuint dword;
 166    } dword3;
 167
 168    union {
 169       struct {
 170          GLuint pad:10;
 171          GLuint min_array_element:11;
 172          GLuint depth:11;
 173       } bits;
 174       GLuint dword;
 175    } dword4;
 176 };
 177
 178 struct brw_depthbuffer_g4x
 179 {
 180    union header_union header;
 181
 182    union {
 183       struct {
 184          GLuint pitch:18;
 185          GLuint format:3;
 186          GLuint pad:2;
 187          GLuint software_tiled_rendering_mode:2;
 188          GLuint depth_offset_disable:1;
 189          GLuint tile_walk:1;
 190          GLuint tiled_surface:1;
 191          GLuint pad2:1;
 192          GLuint surface_type:3;
 193       } bits;
 194       GLuint dword;
 195    } dword1;
 196
 197    GLuint dword2_base_addr;
 198
 199    union {
 200       struct {
 201          GLuint pad:1;
 202          GLuint mipmap_layout:1;
 203          GLuint lod:4;
 204          GLuint width:13;
 205          GLuint height:13;
 206       } bits;
 207       GLuint dword;
 208    } dword3;
 209
 210    union {
 211       struct {
 212          GLuint pad:10;
 213          GLuint min_array_element:11;
 214          GLuint depth:11;
 215       } bits;
 216       GLuint dword;
 217    } dword4;
 218
 219    union {
 220       struct {
 221          GLuint xoffset:16;
 222          GLuint yoffset:16;
 223       } bits;
 224       GLuint dword;
 225    } dword5;   /* NEW in Integrated Graphics Device */
 226 };
 227
 228 struct brw_drawrect
 229 {
 230    struct header header;
 231    GLuint xmin:16;
 232    GLuint ymin:16;
 233    GLuint xmax:16;
 234    GLuint ymax:16;
 235    GLuint xorg:16;
 236    GLuint yorg:16;
 237 };
 238
 239
 240
 241
 242 struct brw_global_depth_offset_clamp
 243 {
 244    struct header header;
 245    GLfloat depth_offset_clamp;
 246 };
 247
 248 struct brw_indexbuffer
 249 {
 250    union {
 251       struct
 252       {
 253          GLuint length:8;
 254          GLuint index_format:2;
 255          GLuint cut_index_enable:1;
 256          GLuint pad:5;
 257          GLuint opcode:16;
 258       } bits;
 259       GLuint dword;
 260
 261    } header;
 262
 263    GLuint buffer_start;
 264    GLuint buffer_end;
 265 };
 266
 267 /* NEW in Integrated Graphics Device */
 268 struct brw_aa_line_parameters
 269 {
 270    struct header header;
 271
 272    struct {
 273       GLuint aa_coverage_scope:8;
 274       GLuint pad0:8;
 275       GLuint aa_coverage_bias:8;
 276       GLuint pad1:8;
 277    } bits0;
 278
 279    struct {
 280       GLuint aa_coverage_endcap_slope:8;
 281       GLuint pad0:8;
 282       GLuint aa_coverage_endcap_bias:8;
 283       GLuint pad1:8;
 284    } bits1;
 285 };
 286
 287 struct brw_line_stipple
 288 {
 289    struct header header;
 290
 291    struct
 292    {
 293       GLuint pattern:16;
 294       GLuint pad:16;
 295    } bits0;
 296
 297    struct
 298    {
 299       GLuint repeat_count:9;
 300       GLuint pad:7;
 301       GLuint inverse_repeat_count:16;
 302    } bits1;
 303 };
 304
 305
 306 struct brw_pipelined_state_pointers
 307 {
 308    struct header header;
 309
 310    struct {
 311       GLuint pad:5;
 312       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 313    } vs;
 314
 315    struct
 316    {
 317       GLuint enable:1;
 318       GLuint pad:4;
 319       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 320    } gs;
 321
 322    struct
 323    {
 324       GLuint enable:1;
 325       GLuint pad:4;
 326       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 327    } clp;
 328
 329    struct
 330    {
 331       GLuint pad:5;
 332       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 333    } sf;
 334
 335    struct
 336    {
 337       GLuint pad:5;
 338       GLuint offset:27; /* Offset from GENERAL_STATE_BASE */
 339    } wm;
 340
 341    struct
 342    {
 343       GLuint pad:5;
 344       GLuint offset:27; /* Offset from GENERAL_STATE_BASE. KW: check me! */
 345    } cc;
 346 };
 347
 348
 349 struct brw_polygon_stipple_offset
 350 {
 351    struct header header;
 352
 353    struct {
 354       GLuint y_offset:5;
 355       GLuint pad:3;
 356       GLuint x_offset:5;
 357       GLuint pad0:19;
 358    } bits0;
 359 };
 360
 361
 362
 363 struct brw_polygon_stipple
 364 {
 365    struct header header;
 366    GLuint stipple[32];
 367 };
 368
 369
 370
 371 struct brw_pipeline_select
 372 {
 373    struct
 374    {
 375       GLuint pipeline_select:1;
 376       GLuint pad:15;
 377       GLuint opcode:16;
 378    } header;
 379 };
 380
 381
 382 struct brw_pipe_control
 383 {
 384    struct
 385    {
 386       GLuint length:8;
 387       GLuint notify_enable:1;
 388       GLuint texture_cache_flush_enable:1;
 389       GLuint indirect_state_pointers_disable:1;
 390       GLuint instruction_state_cache_flush_enable:1;
 391       GLuint write_cache_flush_enable:1;
 392       GLuint depth_stall_enable:1;
 393       GLuint post_sync_operation:2;
 394
 395       GLuint opcode:16;
 396    } header;
 397
 398    struct
 399    {
 400       GLuint pad:2;
 401       GLuint dest_addr_type:1;
 402       GLuint dest_addr:29;
 403    } bits1;
 404
 405    GLuint data0;
 406    GLuint data1;
 407 };
 408
 409
 410 struct brw_urb_fence
 411 {
 412    struct
 413    {
 414       GLuint length:8;
 415       GLuint vs_realloc:1;
 416       GLuint gs_realloc:1;
 417       GLuint clp_realloc:1;
 418       GLuint sf_realloc:1;
 419       GLuint vfe_realloc:1;
 420       GLuint cs_realloc:1;
 421       GLuint pad:2;
 422       GLuint opcode:16;
 423    } header;
 424
 425    struct
 426    {
 427       GLuint vs_fence:10;
 428       GLuint gs_fence:10;
 429       GLuint clp_fence:10;
 430       GLuint pad:2;
 431    } bits0;
 432
 433    struct
 434    {
 435       GLuint sf_fence:10;
 436       GLuint vf_fence:10;
 437       GLuint cs_fence:10;
 438       GLuint pad:2;
 439    } bits1;
 440 };
 441
 442 struct brw_constant_buffer_state /* previously brw_command_streamer */
 443 {
 444    struct header header;
 445
 446    struct
 447    {
 448       GLuint nr_urb_entries:3;
 449       GLuint pad:1;
 450       GLuint urb_entry_size:5;
 451       GLuint pad0:23;
 452    } bits0;
 453 };
 454
 455 struct brw_constant_buffer
 456 {
 457    struct
 458    {
 459       GLuint length:8;
 460       GLuint valid:1;
 461       GLuint pad:7;
 462       GLuint opcode:16;
 463    } header;
 464
 465    struct
 466    {
 467       GLuint buffer_length:6;
 468       GLuint buffer_address:26;
 469    } bits0;
 470 };
 471
 472 struct brw_state_base_address
 473 {
 474    struct header header;
 475
 476    struct
 477    {
 478       GLuint modify_enable:1;
 479       GLuint pad:4;
 480       GLuint general_state_address:27;
 481    } bits0;
 482
 483    struct
 484    {
 485       GLuint modify_enable:1;
 486       GLuint pad:4;
 487       GLuint surface_state_address:27;
 488    } bits1;
 489
 490    struct
 491    {
 492       GLuint modify_enable:1;
 493       GLuint pad:4;
 494       GLuint indirect_object_state_address:27;
 495    } bits2;
 496
 497    struct
 498    {
 499       GLuint modify_enable:1;
 500       GLuint pad:11;
 501       GLuint general_state_upper_bound:20;
 502    } bits3;
 503
 504    struct
 505    {
 506       GLuint modify_enable:1;
 507       GLuint pad:11;
 508       GLuint indirect_object_state_upper_bound:20;
 509    } bits4;
 510 };
 511
 512 struct brw_state_prefetch
 513 {
 514    struct header header;
 515
 516    struct
 517    {
 518       GLuint prefetch_count:3;
 519       GLuint pad:3;
 520       GLuint prefetch_pointer:26;
 521    } bits0;
 522 };
 523
 524 struct brw_system_instruction_pointer
 525 {
 526    struct header header;
 527
 528    struct
 529    {
 530       GLuint pad:4;
 531       GLuint system_instruction_pointer:28;
 532    } bits0;
 533 };
 534
 535
 536
 537
 538 /* State structs for the various fixed function units:
 539  */
 540
 541
 542 struct thread0
 543 {
 544    GLuint pad0:1;
 545    GLuint grf_reg_count:3;
 546    GLuint pad1:2;
 547    GLuint kernel_start_pointer:26; /* Offset from GENERAL_STATE_BASE */
 548 };
 549
 550 struct thread1
 551 {
 552    GLuint ext_halt_exception_enable:1;
 553    GLuint sw_exception_enable:1;
 554    GLuint mask_stack_exception_enable:1;
 555    GLuint timeout_exception_enable:1;
 556    GLuint illegal_op_exception_enable:1;
 557    GLuint pad0:3;
 558    GLuint depth_coef_urb_read_offset:6; /* WM only */
 559    GLuint pad1:2;
 560    GLuint floating_point_mode:1;
 561    GLuint thread_priority:1;
 562    GLuint binding_table_entry_count:8;
 563    GLuint pad3:5;
 564    GLuint single_program_flow:1;
 565 };
 566
 567 struct thread2
 568 {
 569    GLuint per_thread_scratch_space:4;
 570    GLuint pad0:6;
 571    GLuint scratch_space_base_pointer:22;
 572 };
 573
 574
 575 struct thread3
 576 {
 577    GLuint dispatch_grf_start_reg:4;
 578    GLuint urb_entry_read_offset:6;
 579    GLuint pad0:1;
 580    GLuint urb_entry_read_length:6;
 581    GLuint pad1:1;
 582    GLuint const_urb_entry_read_offset:6;
 583    GLuint pad2:1;
 584    GLuint const_urb_entry_read_length:6;
 585    GLuint pad3:1;
 586 };
 587
 588
 589
 590 struct brw_clip_unit_state
 591 {
 592    struct thread0 thread0;
 593    struct
 594    {
 595       GLuint pad0:7;
 596       GLuint sw_exception_enable:1;
 597       GLuint pad1:3;
 598       GLuint mask_stack_exception_enable:1;
 599       GLuint pad2:1;
 600       GLuint illegal_op_exception_enable:1;
 601       GLuint pad3:2;
 602       GLuint floating_point_mode:1;
 603       GLuint thread_priority:1;
 604       GLuint binding_table_entry_count:8;
 605       GLuint pad4:5;
 606       GLuint single_program_flow:1;
 607    } thread1;
 608
 609    struct thread2 thread2;
 610    struct thread3 thread3;
 611
 612    struct
 613    {
 614       GLuint pad0:9;
 615       GLuint gs_output_stats:1; /* not always */
 616       GLuint stats_enable:1;
 617       GLuint nr_urb_entries:7;
 618       GLuint pad1:1;
 619       GLuint urb_entry_allocation_size:5;
 620       GLuint pad2:1;
 621       GLuint max_threads:5;     /* may be less */
 622       GLuint pad3:2;
 623    } thread4;
 624
 625    struct
 626    {
 627       GLuint pad0:13;
 628       GLuint clip_mode:3;
 629       GLuint userclip_enable_flags:8;
 630       GLuint userclip_must_clip:1;
 631       GLuint negative_w_clip_test:1;
 632       GLuint guard_band_enable:1;
 633       GLuint viewport_z_clip_enable:1;
 634       GLuint viewport_xy_clip_enable:1;
 635       GLuint vertex_position_space:1;
 636       GLuint api_mode:1;
 637       GLuint pad2:1;
 638    } clip5;
 639
 640    struct
 641    {
 642       GLuint pad0:5;
 643       GLuint clipper_viewport_state_ptr:27;
 644    } clip6;
 645
 646
 647    GLfloat viewport_xmin;
 648    GLfloat viewport_xmax;
 649    GLfloat viewport_ymin;
 650    GLfloat viewport_ymax;
 651 };
 652
 653
 654
 655 struct brw_cc_unit_state
 656 {
 657    struct
 658    {
 659       GLuint pad0:3;
 660       GLuint bf_stencil_pass_depth_pass_op:3;
 661       GLuint bf_stencil_pass_depth_fail_op:3;
 662       GLuint bf_stencil_fail_op:3;
 663       GLuint bf_stencil_func:3;
 664       GLuint bf_stencil_enable:1;
 665       GLuint pad1:2;
 666       GLuint stencil_write_enable:1;
 667       GLuint stencil_pass_depth_pass_op:3;
 668       GLuint stencil_pass_depth_fail_op:3;
 669       GLuint stencil_fail_op:3;
 670       GLuint stencil_func:3;
 671       GLuint stencil_enable:1;
 672    } cc0;
 673
 674
 675    struct
 676    {
 677       GLuint bf_stencil_ref:8;
 678       GLuint stencil_write_mask:8;
 679       GLuint stencil_test_mask:8;
 680       GLuint stencil_ref:8;
 681    } cc1;
 682
 683
 684    struct
 685    {
 686       GLuint logicop_enable:1;
 687       GLuint pad0:10;
 688       GLuint depth_write_enable:1;
 689       GLuint depth_test_function:3;
 690       GLuint depth_test:1;
 691       GLuint bf_stencil_write_mask:8;
 692       GLuint bf_stencil_test_mask:8;
 693    } cc2;
 694
 695
 696    struct
 697    {
 698       GLuint pad0:8;
 699       GLuint alpha_test_func:3;
 700       GLuint alpha_test:1;
 701       GLuint blend_enable:1;
 702       GLuint ia_blend_enable:1;
 703       GLuint pad1:1;
 704       GLuint alpha_test_format:1;
 705       GLuint pad2:16;
 706    } cc3;
 707
 708    struct
 709    {
 710       GLuint pad0:5;
 711       GLuint cc_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */
 712    } cc4;
 713
 714    struct
 715    {
 716       GLuint pad0:2;
 717       GLuint ia_dest_blend_factor:5;
 718       GLuint ia_src_blend_factor:5;
 719       GLuint ia_blend_function:3;
 720       GLuint statistics_enable:1;
 721       GLuint logicop_func:4;
 722       GLuint pad1:11;
 723       GLuint dither_enable:1;
 724    } cc5;
 725
 726    struct
 727    {
 728       GLuint clamp_post_alpha_blend:1;
 729       GLuint clamp_pre_alpha_blend:1;
 730       GLuint clamp_range:2;
 731       GLuint pad0:11;
 732       GLuint y_dither_offset:2;
 733       GLuint x_dither_offset:2;
 734       GLuint dest_blend_factor:5;
 735       GLuint src_blend_factor:5;
 736       GLuint blend_function:3;
 737    } cc6;
 738
 739    struct {
 740       union {
 741          GLfloat f;
 742          GLubyte ub[4];
 743       } alpha_ref;
 744    } cc7;
 745 };
 746
 747
 748
 749 struct brw_sf_unit_state
 750 {
 751    struct thread0 thread0;
 752    struct thread1 thread1;
 753    struct thread2 thread2;
 754    struct thread3 thread3;
 755
 756    struct
 757    {
 758       GLuint pad0:10;
 759       GLuint stats_enable:1;
 760       GLuint nr_urb_entries:7;
 761       GLuint pad1:1;
 762       GLuint urb_entry_allocation_size:5;
 763       GLuint pad2:1;
 764       GLuint max_threads:6;
 765       GLuint pad3:1;
 766    } thread4;
 767
 768    struct
 769    {
 770       GLuint front_winding:1;
 771       GLuint viewport_transform:1;
 772       GLuint pad0:3;
 773       GLuint sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */
 774    } sf5;
 775
 776    struct
 777    {
 778       GLuint pad0:9;
 779       GLuint dest_org_vbias:4;
 780       GLuint dest_org_hbias:4;
 781       GLuint scissor:1;
 782       GLuint disable_2x2_trifilter:1;
 783       GLuint disable_zero_pix_trifilter:1;
 784       GLuint point_rast_rule:2;
 785       GLuint line_endcap_aa_region_width:2;
 786       GLuint line_width:4;
 787       GLuint fast_scissor_disable:1;
 788       GLuint cull_mode:2;
 789       GLuint aa_enable:1;
 790    } sf6;
 791
 792    struct
 793    {
 794       GLuint point_size:11;
 795       GLuint use_point_size_state:1;
 796       GLuint subpixel_precision:1;
 797       GLuint sprite_point:1;
 798       GLuint pad0:10;
 799       GLuint aa_line_distance_mode:1;
 800       GLuint trifan_pv:2;
 801       GLuint linestrip_pv:2;
 802       GLuint tristrip_pv:2;
 803       GLuint line_last_pixel_enable:1;
 804    } sf7;
 805
 806 };
 807
 808
 809 struct brw_gs_unit_state
 810 {
 811    struct thread0 thread0;
 812    struct thread1 thread1;
 813    struct thread2 thread2;
 814    struct thread3 thread3;
 815
 816    struct
 817    {
 818       GLuint pad0:10;
 819       GLuint stats_enable:1;
 820       GLuint nr_urb_entries:7;
 821       GLuint pad1:1;
 822       GLuint urb_entry_allocation_size:5;
 823       GLuint pad2:1;
 824       GLuint max_threads:5;
 825       GLuint pad3:2;
 826    } thread4;
 827
 828    struct
 829    {
 830       GLuint sampler_count:3;
 831       GLuint pad0:2;
 832       GLuint sampler_state_pointer:27;
 833    } gs5;
 834
 835
 836    struct
 837    {
 838       GLuint max_vp_index:4;
 839       GLuint pad0:12;
 840       GLuint svbi_post_inc_value:10;
 841       GLuint pad1:1;
 842       GLuint svbi_post_inc_enable:1;
 843       GLuint svbi_payload:1;
 844       GLuint discard_adjaceny:1;
 845       GLuint reorder_enable:1;
 846       GLuint pad2:1;
 847    } gs6;
 848 };
 849
 850
 851 struct brw_vs_unit_state
 852 {
 853    struct thread0 thread0;
 854    struct thread1 thread1;
 855    struct thread2 thread2;
 856    struct thread3 thread3;
 857
 858    struct
 859    {
 860       GLuint pad0:10;
 861       GLuint stats_enable:1;
 862       GLuint nr_urb_entries:7;
 863       GLuint pad1:1;
 864       GLuint urb_entry_allocation_size:5;
 865       GLuint pad2:1;
 866       GLuint max_threads:6;
 867       GLuint pad3:1;
 868    } thread4;
 869
 870    struct
 871    {
 872       GLuint sampler_count:3;
 873       GLuint pad0:2;
 874       GLuint sampler_state_pointer:27;
 875    } vs5;
 876
 877    struct
 878    {
 879       GLuint vs_enable:1;
 880       GLuint vert_cache_disable:1;
 881       GLuint pad0:30;
 882    } vs6;
 883 };
 884
 885
 886 struct brw_wm_unit_state
 887 {
 888    struct thread0 thread0;
 889    struct thread1 thread1;
 890    struct thread2 thread2;
 891    struct thread3 thread3;
 892
 893    struct {
 894       GLuint stats_enable:1;
 895       GLuint depth_buffer_clear:1;
 896       GLuint sampler_count:3;
 897       GLuint sampler_state_pointer:27;
 898    } wm4;
 899
 900    struct
 901    {
 902       GLuint enable_8_pix:1;
 903       GLuint enable_16_pix:1;
 904       GLuint enable_32_pix:1;
 905       GLuint enable_con_32_pix:1;
 906       GLuint enable_con_64_pix:1;
 907       GLuint pad0:5;
 908       GLuint legacy_global_depth_bias:1;
 909       GLuint line_stipple:1;
 910       GLuint depth_offset:1;
 911       GLuint polygon_stipple:1;
 912       GLuint line_aa_region_width:2;
 913       GLuint line_endcap_aa_region_width:2;
 914       GLuint early_depth_test:1;
 915       GLuint thread_dispatch_enable:1;
 916       GLuint program_uses_depth:1;
 917       GLuint program_computes_depth:1;
 918       GLuint program_uses_killpixel:1;
 919       GLuint legacy_line_rast: 1;
 920       GLuint transposed_urb_read_enable:1;
 921       GLuint max_threads:7;
 922    } wm5;
 923
 924    GLfloat global_depth_offset_constant;
 925    GLfloat global_depth_offset_scale;
 926 };
 927
 928 struct brw_sampler_default_color {
 929    GLfloat color[4];
 930 };
 931
 932 struct brw_sampler_state
 933 {
 934
 935    struct
 936    {
 937       GLuint shadow_function:3;
 938       GLuint lod_bias:11;
 939       GLuint min_filter:3;
 940       GLuint mag_filter:3;
 941       GLuint mip_filter:2;
 942       GLuint base_level:5;
 943       GLuint pad:1;
 944       GLuint lod_preclamp:1;
 945       GLuint default_color_mode:1;
 946       GLuint pad0:1;
 947       GLuint disable:1;
 948    } ss0;
 949
 950    struct
 951    {
 952       GLuint r_wrap_mode:3;
 953       GLuint t_wrap_mode:3;
 954       GLuint s_wrap_mode:3;
 955       GLuint pad:3;
 956       GLuint max_lod:10;
 957       GLuint min_lod:10;
 958    } ss1;
 959
 960
 961    struct
 962    {
 963       GLuint pad:5;
 964       GLuint default_color_pointer:27;
 965    } ss2;
 966
 967    struct
 968    {
 969       GLuint pad:19;
 970       GLuint max_aniso:3;
 971       GLuint chroma_key_mode:1;
 972       GLuint chroma_key_index:2;
 973       GLuint chroma_key_enable:1;
 974       GLuint monochrome_filter_width:3;
 975       GLuint monochrome_filter_height:3;
 976    } ss3;
 977 };
 978
 979
 980 struct brw_clipper_viewport
 981 {
 982    GLfloat xmin;
 983    GLfloat xmax;
 984    GLfloat ymin;
 985    GLfloat ymax;
 986 };
 987
 988 struct brw_cc_viewport
 989 {
 990    GLfloat min_depth;
 991    GLfloat max_depth;
 992 };
 993
 994 struct brw_sf_viewport
 995 {
 996    struct {
 997       GLfloat m00;
 998       GLfloat m11;
 999       GLfloat m22;
1000       GLfloat m30;
1001       GLfloat m31;
1002       GLfloat m32;
1003    } viewport;
1004
1005    /* scissor coordinates are inclusive */
1006    struct {
1007       GLshort xmin;
1008       GLshort ymin;
1009       GLshort xmax;
1010       GLshort ymax;
1011    } scissor;
1012 };
1013
1014 /* Documented in the subsystem/shared-functions/sampler chapter...
1015  */
1016 struct brw_surface_state
1017 {
1018    struct {
1019       GLuint cube_pos_z:1;
1020       GLuint cube_neg_z:1;
1021       GLuint cube_pos_y:1;
1022       GLuint cube_neg_y:1;
1023       GLuint cube_pos_x:1;
1024       GLuint cube_neg_x:1;
1025       GLuint pad:4;
1026       GLuint mipmap_layout_mode:1;
1027       GLuint vert_line_stride_ofs:1;
1028       GLuint vert_line_stride:1;
1029       GLuint color_blend:1;
1030       GLuint writedisable_blue:1;
1031       GLuint writedisable_green:1;
1032       GLuint writedisable_red:1;
1033       GLuint writedisable_alpha:1;
1034       GLuint surface_format:9;
1035       GLuint data_return_format:1;
1036       GLuint pad0:1;
1037       GLuint surface_type:3;
1038    } ss0;
1039
1040    struct {
1041       GLuint base_addr;
1042    } ss1;
1043
1044    struct {
1045       GLuint pad:2;
1046       GLuint mip_count:4;
1047       GLuint width:13;
1048       GLuint height:13;
1049    } ss2;
1050
1051    struct {
1052       GLuint tile_walk:1;
1053       GLuint tiled_surface:1;
1054       GLuint pad:1;
1055       GLuint pitch:18;
1056       GLuint depth:11;
1057    } ss3;
1058
1059    struct {
1060       GLuint multisample_position_palette_index:3;
1061       GLuint pad1:1;
1062       GLuint num_multisamples:3;
1063       GLuint pad0:1;
1064       GLuint render_target_view_extent:9;
1065       GLuint min_array_elt:11;
1066       GLuint min_lod:4;
1067    } ss4;
1068
1069    struct {
1070       GLuint pad1:16;
1071       GLuint llc_mapping:1;
1072       GLuint mlc_mapping:1;
1073       GLuint gfdt:1;
1074       GLuint gfdt_src:1;
1075       GLuint y_offset:4;
1076       GLuint pad0:1;
1077       GLuint x_offset:7;
1078    } ss5;   /* NEW in Integrated Graphics Device */
1079
1080 };
1081
1082
1083
1084 struct brw_vertex_buffer_state
1085 {
1086    struct {
1087       GLuint pitch:11;
1088       GLuint pad:15;
1089       GLuint access_type:1;
1090       GLuint vb_index:5;
1091    } vb0;
1092
1093    GLuint start_addr;
1094    GLuint max_index;
1095 #if 1
1096    GLuint instance_data_step_rate; /* not included for sequential/random vertices? */
1097 #endif
1098 };
1099
1100 #define BRW_VBP_MAX 17
1101
1102 struct brw_vb_array_state {
1103    struct header header;
1104    struct brw_vertex_buffer_state vb[BRW_VBP_MAX];
1105 };
1106
1107
1108 struct brw_vertex_element_state
1109 {
1110    struct
1111    {
1112       GLuint src_offset:11;
1113       GLuint pad:5;
1114       GLuint src_format:9;
1115       GLuint pad0:1;
1116       GLuint valid:1;
1117       GLuint vertex_buffer_index:5;
1118    } ve0;
1119
1120    struct
1121    {
1122       GLuint dst_offset:8;
1123       GLuint pad:8;
1124       GLuint vfcomponent3:4;
1125       GLuint vfcomponent2:4;
1126       GLuint vfcomponent1:4;
1127       GLuint vfcomponent0:4;
1128    } ve1;
1129 };
1130
1131 #define BRW_VEP_MAX 18
1132
1133 struct brw_vertex_element_packet {
1134    struct header header;
1135    struct brw_vertex_element_state ve[BRW_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */
1136 };
1137
1138
1139 struct brw_urb_immediate {
1140    GLuint opcode:4;
1141    GLuint offset:6;
1142    GLuint swizzle_control:2;
1143    GLuint pad:1;
1144    GLuint allocate:1;
1145    GLuint used:1;
1146    GLuint complete:1;
1147    GLuint response_length:4;
1148    GLuint msg_length:4;
1149    GLuint msg_target:4;
1150    GLuint pad1:3;
1151    GLuint end_of_thread:1;
1152 };
1153
1154 /* Instruction format for the execution units:
1155  */
1156
1157 struct brw_instruction
1158 {
1159    struct
1160    {
1161       GLuint opcode:7;
1162       GLuint pad:1;
1163       GLuint access_mode:1;
1164       GLuint mask_control:1;
1165       GLuint dependency_control:2;
1166       GLuint compression_control:2;
1167       GLuint thread_control:2;
1168       GLuint predicate_control:4;
1169       GLuint predicate_inverse:1;
1170       GLuint execution_size:3;
1171       GLuint destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */
1172       GLuint pad0:2;
1173       GLuint debug_control:1;
1174       GLuint saturate:1;
1175    } header;
1176
1177    union {
1178       struct
1179       {
1180          GLuint dest_reg_file:2;
1181          GLuint dest_reg_type:3;
1182          GLuint src0_reg_file:2;
1183          GLuint src0_reg_type:3;
1184          GLuint src1_reg_file:2;
1185          GLuint src1_reg_type:3;
1186          GLuint pad:1;
1187          GLuint dest_subreg_nr:5;
1188          GLuint dest_reg_nr:8;
1189          GLuint dest_horiz_stride:2;
1190          GLuint dest_address_mode:1;
1191       } da1;
1192
1193       struct
1194       {
1195          GLuint dest_reg_file:2;
1196          GLuint dest_reg_type:3;
1197          GLuint src0_reg_file:2;
1198          GLuint src0_reg_type:3;
1199          GLuint pad:6;
1200          GLint dest_indirect_offset:10; /* offset against the deref'd address reg */
1201          GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */
1202          GLuint dest_horiz_stride:2;
1203          GLuint dest_address_mode:1;
1204       } ia1;
1205
1206       struct
1207       {
1208          GLuint dest_reg_file:2;
1209          GLuint dest_reg_type:3;
1210          GLuint src0_reg_file:2;
1211          GLuint src0_reg_type:3;
1212          GLuint src1_reg_file:2;
1213          GLuint src1_reg_type:3;
1214          GLuint pad0:1;
1215          GLuint dest_writemask:4;
1216          GLuint dest_subreg_nr:1;
1217          GLuint dest_reg_nr:8;
1218          GLuint pad1:2;
1219          GLuint dest_address_mode:1;
1220       } da16;
1221
1222       struct
1223       {
1224          GLuint dest_reg_file:2;
1225          GLuint dest_reg_type:3;
1226          GLuint src0_reg_file:2;
1227          GLuint src0_reg_type:3;
1228          GLuint pad0:6;
1229          GLuint dest_writemask:4;
1230          GLint dest_indirect_offset:6;
1231          GLuint dest_subreg_nr:3;
1232          GLuint pad1:2;
1233          GLuint dest_address_mode:1;
1234       } ia16;
1235    } bits1;
1236
1237
1238    union {
1239       struct
1240       {
1241          GLuint src0_subreg_nr:5;
1242          GLuint src0_reg_nr:8;
1243          GLuint src0_abs:1;
1244          GLuint src0_negate:1;
1245          GLuint src0_address_mode:1;
1246          GLuint src0_horiz_stride:2;
1247          GLuint src0_width:3;
1248          GLuint src0_vert_stride:4;
1249          GLuint flag_reg_nr:1;
1250          GLuint pad:6;
1251       } da1;
1252
1253       struct
1254       {
1255          GLint src0_indirect_offset:10;
1256          GLuint src0_subreg_nr:3;
1257          GLuint src0_abs:1;
1258          GLuint src0_negate:1;
1259          GLuint src0_address_mode:1;
1260          GLuint src0_horiz_stride:2;
1261          GLuint src0_width:3;
1262          GLuint src0_vert_stride:4;
1263          GLuint flag_reg_nr:1;
1264          GLuint pad:6;
1265       } ia1;
1266
1267       struct
1268       {
1269          GLuint src0_swz_x:2;
1270          GLuint src0_swz_y:2;
1271          GLuint src0_subreg_nr:1;
1272          GLuint src0_reg_nr:8;
1273          GLuint src0_abs:1;
1274          GLuint src0_negate:1;
1275          GLuint src0_address_mode:1;
1276          GLuint src0_swz_z:2;
1277          GLuint src0_swz_w:2;
1278          GLuint pad0:1;
1279          GLuint src0_vert_stride:4;
1280          GLuint flag_reg_nr:1;
1281          GLuint pad1:6;
1282       } da16;
1283
1284       struct
1285       {
1286          GLuint src0_swz_x:2;
1287          GLuint src0_swz_y:2;
1288          GLint src0_indirect_offset:6;
1289          GLuint src0_subreg_nr:3;
1290          GLuint src0_abs:1;
1291          GLuint src0_negate:1;
1292          GLuint src0_address_mode:1;
1293          GLuint src0_swz_z:2;
1294          GLuint src0_swz_w:2;
1295          GLuint pad0:1;
1296          GLuint src0_vert_stride:4;
1297          GLuint flag_reg_nr:1;
1298          GLuint pad1:6;
1299       } ia16;
1300
1301    } bits2;
1302
1303    union
1304    {
1305       struct
1306       {
1307          GLuint src1_subreg_nr:5;
1308          GLuint src1_reg_nr:8;
1309          GLuint src1_abs:1;
1310          GLuint src1_negate:1;
1311          GLuint pad:1;
1312          GLuint src1_horiz_stride:2;
1313          GLuint src1_width:3;
1314          GLuint src1_vert_stride:4;
1315          GLuint pad0:7;
1316       } da1;
1317
1318       struct
1319       {
1320          GLuint src1_swz_x:2;
1321          GLuint src1_swz_y:2;
1322          GLuint src1_subreg_nr:1;
1323          GLuint src1_reg_nr:8;
1324          GLuint src1_abs:1;
1325          GLuint src1_negate:1;
1326          GLuint pad0:1;
1327          GLuint src1_swz_z:2;
1328          GLuint src1_swz_w:2;
1329          GLuint pad1:1;
1330          GLuint src1_vert_stride:4;
1331          GLuint pad2:7;
1332       } da16;
1333
1334       struct
1335       {
1336          GLint  src1_indirect_offset:10;
1337          GLuint src1_subreg_nr:3;
1338          GLuint src1_abs:1;
1339          GLuint src1_negate:1;
1340          GLuint pad0:1;
1341          GLuint src1_horiz_stride:2;
1342          GLuint src1_width:3;
1343          GLuint src1_vert_stride:4;
1344          GLuint flag_reg_nr:1;
1345          GLuint pad1:6;
1346       } ia1;
1347
1348       struct
1349       {
1350          GLuint src1_swz_x:2;
1351          GLuint src1_swz_y:2;
1352          GLint  src1_indirect_offset:6;
1353          GLuint src1_subreg_nr:3;
1354          GLuint src1_abs:1;
1355          GLuint src1_negate:1;
1356          GLuint pad0:1;
1357          GLuint src1_swz_z:2;
1358          GLuint src1_swz_w:2;
1359          GLuint pad1:1;
1360          GLuint src1_vert_stride:4;
1361          GLuint flag_reg_nr:1;
1362          GLuint pad2:6;
1363       } ia16;
1364
1365
1366       struct
1367       {
1368          GLint  jump_count:16;  /* note: signed */
1369          GLuint  pop_count:4;
1370          GLuint  pad0:12;
1371       } if_else;
1372
1373       struct {
1374          GLuint function:4;
1375          GLuint int_type:1;
1376          GLuint precision:1;
1377          GLuint saturate:1;
1378          GLuint data_type:1;
1379          GLuint pad0:8;
1380          GLuint response_length:4;
1381          GLuint msg_length:4;
1382          GLuint msg_target:4;
1383          GLuint pad1:3;
1384          GLuint end_of_thread:1;
1385       } math;
1386
1387       struct {
1388          GLuint binding_table_index:8;
1389          GLuint sampler:4;
1390          GLuint return_format:2;
1391          GLuint msg_type:2;
1392          GLuint response_length:4;
1393          GLuint msg_length:4;
1394          GLuint msg_target:4;
1395          GLuint pad1:3;
1396          GLuint end_of_thread:1;
1397       } sampler;
1398
1399       struct {
1400          GLuint binding_table_index:8;
1401          GLuint sampler:4;
1402          GLuint msg_type:4;
1403          GLuint response_length:4;
1404          GLuint msg_length:4;
1405          GLuint msg_target:4;
1406          GLuint pad1:3;
1407          GLuint end_of_thread:1;
1408       } sampler_g4x;
1409
1410       struct brw_urb_immediate urb;
1411
1412       struct {
1413          GLuint binding_table_index:8;
1414          GLuint msg_control:4;
1415          GLuint msg_type:2;
1416          GLuint target_cache:2;
1417          GLuint response_length:4;
1418          GLuint msg_length:4;
1419          GLuint msg_target:4;
1420          GLuint pad1:3;
1421          GLuint end_of_thread:1;
1422       } dp_read;
1423
1424       struct {
1425          GLuint binding_table_index:8;
1426          GLuint msg_control:3;
1427          GLuint pixel_scoreboard_clear:1;
1428          GLuint msg_type:3;
1429          GLuint send_commit_msg:1;
1430          GLuint response_length:4;
1431          GLuint msg_length:4;
1432          GLuint msg_target:4;
1433          GLuint pad1:3;
1434          GLuint end_of_thread:1;
1435       } dp_write;
1436
1437       struct {
1438          GLuint pad:16;
1439          GLuint response_length:4;
1440          GLuint msg_length:4;
1441          GLuint msg_target:4;
1442          GLuint pad1:3;
1443          GLuint end_of_thread:1;
1444       } generic;
1445
1446       GLint d;
1447       GLuint ud;
1448    } bits3;
1449 };
1450
1451
1452 #endif