src/mesa/drivers/dri/i965/brw_tcs.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * \file brw_tcs.c
  26  *
  27  * Tessellation control shader state upload code.
  28  */
  29
  30 #include "brw_context.h"
  31 #include "compiler/brw_nir.h"
  32 #include "brw_program.h"
  33 #include "brw_state.h"
  34 #include "program/prog_parameter.h"
  35 #include "nir_builder.h"
  36
  37 static void
  38 brw_tcs_debug_recompile(struct brw_context *brw, struct gl_program *prog,
  39                        const struct brw_tcs_prog_key *key)
  40 {
  41    perf_debug("Recompiling tessellation control shader for program %d\n",
  42               prog->Id);
  43
  44    bool found = false;
  45    const struct brw_tcs_prog_key *old_key =
  46       brw_find_previous_compile(&brw->cache, BRW_CACHE_TCS_PROG,
  47                                 key->program_string_id);
  48
  49    if (!old_key) {
  50       perf_debug("  Didn't find previous compile in the shader cache for "
  51                  "debug\n");
  52       return;
  53    }
  54
  55    found |= key_debug(brw, "input vertices", old_key->input_vertices,
  56                       key->input_vertices);
  57    found |= key_debug(brw, "outputs written", old_key->outputs_written,
  58                       key->outputs_written);
  59    found |= key_debug(brw, "patch outputs written", old_key->patch_outputs_written,
  60                       key->patch_outputs_written);
  61    found |= key_debug(brw, "TES primitive mode", old_key->tes_primitive_mode,
  62                       key->tes_primitive_mode);
  63    found |= key_debug(brw, "quads and equal_spacing workaround",
  64                       old_key->quads_workaround, key->quads_workaround);
  65    found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
  66
  67    if (!found) {
  68       perf_debug("  Something else\n");
  69    }
  70 }
  71
  72 static bool
  73 brw_codegen_tcs_prog(struct brw_context *brw, struct brw_program *tcp,
  74                      struct brw_program *tep, struct brw_tcs_prog_key *key)
  75 {
  76    struct gl_context *ctx = &brw->ctx;
  77    const struct brw_compiler *compiler = brw->screen->compiler;
  78    const struct gen_device_info *devinfo = compiler->devinfo;
  79    struct brw_stage_state *stage_state = &brw->tcs.base;
  80    nir_shader *nir;
  81    struct brw_tcs_prog_data prog_data;
  82    bool start_busy = false;
  83    double start_time = 0;
  84
  85    void *mem_ctx = ralloc_context(NULL);
  86    if (tcp) {
  87       nir = tcp->program.nir;
  88    } else {
  89       const nir_shader_compiler_options *options =
  90          ctx->Const.ShaderCompilerOptions[MESA_SHADER_TESS_CTRL].NirOptions;
  91       nir = brw_nir_create_passthrough_tcs(mem_ctx, compiler, options, key);
  92    }
  93
  94    memset(&prog_data, 0, sizeof(prog_data));
  95
  96    if (tcp) {
  97       brw_assign_common_binding_table_offsets(devinfo, &tcp->program,
  98                                               &prog_data.base.base, 0);
  99
 100       brw_nir_setup_glsl_uniforms(mem_ctx, nir, &tcp->program,
 101                                   &prog_data.base.base,
 102                                   compiler->scalar_stage[MESA_SHADER_TESS_CTRL]);
 103       brw_nir_analyze_ubo_ranges(compiler, tcp->program.nir, NULL,
 104                                  prog_data.base.base.ubo_ranges);
 105    } else {
 106       /* Upload the Patch URB Header as the first two uniforms.
 107        * Do the annoying scrambling so the shader doesn't have to.
 108        */
 109       assert(nir->num_uniforms == 32);
 110       prog_data.base.base.param = rzalloc_array(mem_ctx, uint32_t, 8);
 111       prog_data.base.base.nr_params = 8;
 112
 113       uint32_t *param = prog_data.base.base.param;
 114       for (int i = 0; i < 8; i++)
 115          param[i] = BRW_PARAM_BUILTIN_ZERO;
 116
 117       if (key->tes_primitive_mode == GL_QUADS) {
 118          for (int i = 0; i < 4; i++)
 119             param[7 - i] = BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X + i;
 120
 121          param[3] = BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_X;
 122          param[2] = BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_Y;
 123       } else if (key->tes_primitive_mode == GL_TRIANGLES) {
 124          for (int i = 0; i < 3; i++)
 125             param[7 - i] = BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X + i;
 126
 127          param[4] = BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_X;
 128       } else {
 129          assert(key->tes_primitive_mode == GL_ISOLINES);
 130          param[7] = BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_Y;
 131          param[6] = BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X;
 132       }
 133    }
 134
 135    int st_index = -1;
 136    if (unlikely((INTEL_DEBUG & DEBUG_SHADER_TIME) && tep))
 137       st_index = brw_get_shader_time_index(brw, &tep->program, ST_TCS, true);
 138
 139    if (unlikely(brw->perf_debug)) {
 140       start_busy = brw->batch.last_bo && brw_bo_busy(brw->batch.last_bo);
 141       start_time = get_time();
 142    }
 143
 144    char *error_str;
 145    const unsigned *program =
 146       brw_compile_tcs(compiler, brw, mem_ctx, key, &prog_data, nir, st_index,
 147                       &error_str);
 148    if (program == NULL) {
 149       if (tep) {
 150          tep->program.sh.data->LinkStatus = LINKING_FAILURE;
 151          ralloc_strcat(&tep->program.sh.data->InfoLog, error_str);
 152       }
 153
 154       _mesa_problem(NULL, "Failed to compile tessellation control shader: "
 155                     "%s\n", error_str);
 156
 157       ralloc_free(mem_ctx);
 158       return false;
 159    }
 160
 161    if (unlikely(brw->perf_debug)) {
 162       if (tcp) {
 163          if (tcp->compiled_once) {
 164             brw_tcs_debug_recompile(brw, &tcp->program, key);
 165          }
 166          tcp->compiled_once = true;
 167       }
 168
 169       if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
 170          perf_debug("TCS compile took %.03f ms and stalled the GPU\n",
 171                     (get_time() - start_time) * 1000);
 172       }
 173    }
 174
 175    /* Scratch space is used for register spilling */
 176    brw_alloc_stage_scratch(brw, stage_state,
 177                            prog_data.base.base.total_scratch);
 178
 179    /* The param and pull_param arrays will be freed by the shader cache. */
 180    ralloc_steal(NULL, prog_data.base.base.param);
 181    ralloc_steal(NULL, prog_data.base.base.pull_param);
 182    brw_upload_cache(&brw->cache, BRW_CACHE_TCS_PROG,
 183                     key, sizeof(*key),
 184                     program, prog_data.base.base.program_size,
 185                     &prog_data, sizeof(prog_data),
 186                     &stage_state->prog_offset, &brw->tcs.base.prog_data);
 187    ralloc_free(mem_ctx);
 188
 189    return true;
 190 }
 191
 192 void
 193 brw_tcs_populate_key(struct brw_context *brw,
 194                      struct brw_tcs_prog_key *key)
 195 {
 196    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 197    struct brw_program *tcp =
 198       (struct brw_program *) brw->programs[MESA_SHADER_TESS_CTRL];
 199    struct brw_program *tep =
 200       (struct brw_program *) brw->programs[MESA_SHADER_TESS_EVAL];
 201    struct gl_program *tes_prog = &tep->program;
 202
 203    uint64_t per_vertex_slots = tes_prog->info.inputs_read;
 204    uint32_t per_patch_slots = tes_prog->info.patch_inputs_read;
 205
 206    memset(key, 0, sizeof(*key));
 207
 208    if (tcp) {
 209       struct gl_program *prog = &tcp->program;
 210       per_vertex_slots |= prog->info.outputs_written;
 211       per_patch_slots |= prog->info.patch_outputs_written;
 212    }
 213
 214    if (devinfo->gen < 8 || !tcp)
 215       key->input_vertices = brw->ctx.TessCtrlProgram.patch_vertices;
 216    key->outputs_written = per_vertex_slots;
 217    key->patch_outputs_written = per_patch_slots;
 218
 219    /* We need to specialize our code generation for tessellation levels
 220     * based on the domain the DS is expecting to tessellate.
 221     */
 222    key->tes_primitive_mode = tep->program.info.tess.primitive_mode;
 223    key->quads_workaround = devinfo->gen < 9 &&
 224                            tep->program.info.tess.primitive_mode == GL_QUADS &&
 225                            tep->program.info.tess.spacing == TESS_SPACING_EQUAL;
 226
 227    if (tcp) {
 228       key->program_string_id = tcp->id;
 229
 230       /* _NEW_TEXTURE */
 231       brw_populate_sampler_prog_key_data(&brw->ctx, &tcp->program, &key->tex);
 232    }
 233 }
 234
 235 void
 236 brw_upload_tcs_prog(struct brw_context *brw)
 237 {
 238    struct brw_stage_state *stage_state = &brw->tcs.base;
 239    struct brw_tcs_prog_key key;
 240    /* BRW_NEW_TESS_PROGRAMS */
 241    struct brw_program *tcp =
 242       (struct brw_program *) brw->programs[MESA_SHADER_TESS_CTRL];
 243    MAYBE_UNUSED struct brw_program *tep =
 244       (struct brw_program *) brw->programs[MESA_SHADER_TESS_EVAL];
 245    assert(tep);
 246
 247    if (!brw_state_dirty(brw,
 248                         _NEW_TEXTURE,
 249                         BRW_NEW_PATCH_PRIMITIVE |
 250                         BRW_NEW_TESS_PROGRAMS))
 251       return;
 252
 253    brw_tcs_populate_key(brw, &key);
 254
 255    if (brw_search_cache(&brw->cache, BRW_CACHE_TCS_PROG, &key, sizeof(key),
 256                         &stage_state->prog_offset, &brw->tcs.base.prog_data,
 257                         true))
 258       return;
 259
 260    if (brw_disk_cache_upload_program(brw, MESA_SHADER_TESS_CTRL))
 261       return;
 262
 263    tcp = (struct brw_program *) brw->programs[MESA_SHADER_TESS_CTRL];
 264    if (tcp)
 265       tcp->id = key.program_string_id;
 266
 267    MAYBE_UNUSED bool success = brw_codegen_tcs_prog(brw, tcp, tep, &key);
 268    assert(success);
 269 }
 270
 271 void
 272 brw_tcs_populate_default_key(const struct gen_device_info *devinfo,
 273                              struct brw_tcs_prog_key *key,
 274                              struct gl_shader_program *sh_prog,
 275                              struct gl_program *prog)
 276 {
 277    struct brw_program *btcp = brw_program(prog);
 278    const struct gl_linked_shader *tes =
 279       sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
 280
 281    memset(key, 0, sizeof(*key));
 282
 283    key->program_string_id = btcp->id;
 284    brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
 285
 286    /* Guess that the input and output patches have the same dimensionality. */
 287    if (devinfo->gen < 8)
 288       key->input_vertices = prog->info.tess.tcs_vertices_out;
 289
 290    if (tes) {
 291       key->tes_primitive_mode = tes->Program->info.tess.primitive_mode;
 292       key->quads_workaround = devinfo->gen < 9 &&
 293                               tes->Program->info.tess.primitive_mode == GL_QUADS &&
 294                               tes->Program->info.tess.spacing == TESS_SPACING_EQUAL;
 295    } else {
 296       key->tes_primitive_mode = GL_TRIANGLES;
 297    }
 298
 299    key->outputs_written = prog->nir->info.outputs_written;
 300    key->patch_outputs_written = prog->nir->info.patch_outputs_written;
 301 }
 302
 303 bool
 304 brw_tcs_precompile(struct gl_context *ctx,
 305                    struct gl_shader_program *shader_prog,
 306                    struct gl_program *prog)
 307 {
 308    struct brw_context *brw = brw_context(ctx);
 309    struct brw_tcs_prog_key key;
 310    uint32_t old_prog_offset = brw->tcs.base.prog_offset;
 311    struct brw_stage_prog_data *old_prog_data = brw->tcs.base.prog_data;
 312    bool success;
 313
 314    struct brw_program *btcp = brw_program(prog);
 315    const struct gl_linked_shader *tes =
 316       shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
 317    struct brw_program *btep = tes ? brw_program(tes->Program) : NULL;
 318
 319    brw_tcs_populate_default_key(&brw->screen->devinfo, &key, shader_prog, prog);
 320
 321    success = brw_codegen_tcs_prog(brw, btcp, btep, &key);
 322
 323    brw->tcs.base.prog_offset = old_prog_offset;
 324    brw->tcs.base.prog_data = old_prog_data;
 325
 326    return success;
 327 }