src/mesa/drivers/dri/i965/brw_tcs.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * \file brw_tcs.c
  26  *
  27  * Tessellation control shader state upload code.
  28  */
  29
  30 #include "brw_context.h"
  31 #include "brw_nir.h"
  32 #include "brw_program.h"
  33 #include "brw_shader.h"
  34 #include "brw_state.h"
  35 #include "program/prog_parameter.h"
  36 #include "nir_builder.h"
  37
  38 static nir_shader *
  39 create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler,
  40                        const nir_shader_compiler_options *options,
  41                        const struct brw_tcs_prog_key *key)
  42 {
  43    nir_builder b;
  44    nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_TESS_CTRL,
  45                                   options);
  46    nir_shader *nir = b.shader;
  47    nir_variable *var;
  48    nir_intrinsic_instr *load;
  49    nir_intrinsic_instr *store;
  50    nir_ssa_def *zero = nir_imm_int(&b, 0);
  51    nir_ssa_def *invoc_id =
  52       nir_load_system_value(&b, nir_intrinsic_load_invocation_id, 0);
  53
  54    nir->info->inputs_read = key->outputs_written &
  55       ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
  56    nir->info->outputs_written = key->outputs_written;
  57    nir->info->tcs.vertices_out = key->input_vertices;
  58    nir->info->name = ralloc_strdup(nir, "passthrough");
  59    nir->num_uniforms = 8 * sizeof(uint32_t);
  60
  61    var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_0");
  62    var->data.location = 0;
  63    var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_1");
  64    var->data.location = 1;
  65
  66    /* Write the patch URB header. */
  67    for (int i = 0; i <= 1; i++) {
  68       load = nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform);
  69       load->num_components = 4;
  70       load->src[0] = nir_src_for_ssa(zero);
  71       nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
  72       nir_intrinsic_set_base(load, i * 4 * sizeof(uint32_t));
  73       nir_builder_instr_insert(&b, &load->instr);
  74
  75       store = nir_intrinsic_instr_create(nir, nir_intrinsic_store_output);
  76       store->num_components = 4;
  77       store->src[0] = nir_src_for_ssa(&load->dest.ssa);
  78       store->src[1] = nir_src_for_ssa(zero);
  79       nir_intrinsic_set_base(store, VARYING_SLOT_TESS_LEVEL_INNER - i);
  80       nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW);
  81       nir_builder_instr_insert(&b, &store->instr);
  82    }
  83
  84    /* Copy inputs to outputs. */
  85    uint64_t varyings = nir->info->inputs_read;
  86
  87    while (varyings != 0) {
  88       const int varying = ffsll(varyings) - 1;
  89
  90       load = nir_intrinsic_instr_create(nir,
  91                                         nir_intrinsic_load_per_vertex_input);
  92       load->num_components = 4;
  93       load->src[0] = nir_src_for_ssa(invoc_id);
  94       load->src[1] = nir_src_for_ssa(zero);
  95       nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
  96       nir_intrinsic_set_base(load, varying);
  97       nir_builder_instr_insert(&b, &load->instr);
  98
  99       store = nir_intrinsic_instr_create(nir,
 100                                          nir_intrinsic_store_per_vertex_output);
 101       store->num_components = 4;
 102       store->src[0] = nir_src_for_ssa(&load->dest.ssa);
 103       store->src[1] = nir_src_for_ssa(invoc_id);
 104       store->src[2] = nir_src_for_ssa(zero);
 105       nir_intrinsic_set_base(store, varying);
 106       nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW);
 107       nir_builder_instr_insert(&b, &store->instr);
 108
 109       varyings &= ~BITFIELD64_BIT(varying);
 110    }
 111
 112    nir_validate_shader(nir);
 113
 114    nir = brw_preprocess_nir(compiler, nir);
 115
 116    return nir;
 117 }
 118
 119 static void
 120 brw_tcs_debug_recompile(struct brw_context *brw, struct gl_program *prog,
 121                        const struct brw_tcs_prog_key *key)
 122 {
 123    struct brw_cache_item *c = NULL;
 124    const struct brw_tcs_prog_key *old_key = NULL;
 125    bool found = false;
 126
 127    perf_debug("Recompiling tessellation control shader for program %d\n",
 128               prog->Id);
 129
 130    for (unsigned int i = 0; i < brw->cache.size; i++) {
 131       for (c = brw->cache.items[i]; c; c = c->next) {
 132          if (c->cache_id == BRW_CACHE_TCS_PROG) {
 133             old_key = c->key;
 134
 135             if (old_key->program_string_id == key->program_string_id)
 136                break;
 137          }
 138       }
 139       if (c)
 140          break;
 141    }
 142
 143    if (!c) {
 144       perf_debug("  Didn't find previous compile in the shader cache for "
 145                  "debug\n");
 146       return;
 147    }
 148
 149    found |= key_debug(brw, "input vertices", old_key->input_vertices,
 150                       key->input_vertices);
 151    found |= key_debug(brw, "outputs written", old_key->outputs_written,
 152                       key->outputs_written);
 153    found |= key_debug(brw, "patch outputs written", old_key->patch_outputs_written,
 154                       key->patch_outputs_written);
 155    found |= key_debug(brw, "TES primitive mode", old_key->tes_primitive_mode,
 156                       key->tes_primitive_mode);
 157    found |= key_debug(brw, "quads and equal_spacing workaround",
 158                       old_key->quads_workaround, key->quads_workaround);
 159    found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
 160
 161    if (!found) {
 162       perf_debug("  Something else\n");
 163    }
 164 }
 165
 166 static bool
 167 brw_codegen_tcs_prog(struct brw_context *brw, struct brw_program *tcp,
 168                      struct brw_program *tep, struct brw_tcs_prog_key *key)
 169 {
 170    struct gl_context *ctx = &brw->ctx;
 171    const struct brw_compiler *compiler = brw->screen->compiler;
 172    const struct gen_device_info *devinfo = compiler->devinfo;
 173    struct brw_stage_state *stage_state = &brw->tcs.base;
 174    nir_shader *nir;
 175    struct brw_tcs_prog_data prog_data;
 176    bool start_busy = false;
 177    double start_time = 0;
 178
 179    void *mem_ctx = ralloc_context(NULL);
 180    if (tcp) {
 181       nir = tcp->program.nir;
 182    } else {
 183       /* Create a dummy nir_shader.  We won't actually use NIR code to
 184        * generate assembly (it's easier to generate assembly directly),
 185        * but the whole compiler assumes one of these exists.
 186        */
 187       const nir_shader_compiler_options *options =
 188          ctx->Const.ShaderCompilerOptions[MESA_SHADER_TESS_CTRL].NirOptions;
 189       nir = create_passthrough_tcs(mem_ctx, compiler, options, key);
 190    }
 191
 192    memset(&prog_data, 0, sizeof(prog_data));
 193
 194    /* Allocate the references to the uniforms that will end up in the
 195     * prog_data associated with the compiled program, and which will be freed
 196     * by the state cache.
 197     *
 198     * Note: param_count needs to be num_uniform_components * 4, since we add
 199     * padding around uniform values below vec4 size, so the worst case is that
 200     * every uniform is a float which gets padded to the size of a vec4.
 201     */
 202    int param_count = nir->num_uniforms / 4;
 203
 204    prog_data.base.base.param =
 205       rzalloc_array(NULL, const gl_constant_value *, param_count);
 206    prog_data.base.base.pull_param =
 207       rzalloc_array(NULL, const gl_constant_value *, param_count);
 208    prog_data.base.base.nr_params = param_count;
 209
 210    if (tcp) {
 211       brw_assign_common_binding_table_offsets(devinfo, &tcp->program,
 212                                               &prog_data.base.base, 0);
 213
 214       prog_data.base.base.image_param =
 215          rzalloc_array(NULL, struct brw_image_param,
 216                        tcp->program.info.num_images);
 217       prog_data.base.base.nr_image_params = tcp->program.info.num_images;
 218
 219       brw_nir_setup_glsl_uniforms(nir, &tcp->program, &prog_data.base.base,
 220                                   compiler->scalar_stage[MESA_SHADER_TESS_CTRL]);
 221    } else {
 222       /* Upload the Patch URB Header as the first two uniforms.
 223        * Do the annoying scrambling so the shader doesn't have to.
 224        */
 225       const float **param = (const float **) prog_data.base.base.param;
 226       static float zero = 0.0f;
 227       for (int i = 0; i < 8; i++)
 228          param[i] = &zero;
 229
 230       if (key->tes_primitive_mode == GL_QUADS) {
 231          for (int i = 0; i < 4; i++)
 232             param[7 - i] = &ctx->TessCtrlProgram.patch_default_outer_level[i];
 233
 234          param[3] = &ctx->TessCtrlProgram.patch_default_inner_level[0];
 235          param[2] = &ctx->TessCtrlProgram.patch_default_inner_level[1];
 236       } else if (key->tes_primitive_mode == GL_TRIANGLES) {
 237          for (int i = 0; i < 3; i++)
 238             param[7 - i] = &ctx->TessCtrlProgram.patch_default_outer_level[i];
 239
 240          param[4] = &ctx->TessCtrlProgram.patch_default_inner_level[0];
 241       } else {
 242          assert(key->tes_primitive_mode == GL_ISOLINES);
 243          param[7] = &ctx->TessCtrlProgram.patch_default_outer_level[1];
 244          param[6] = &ctx->TessCtrlProgram.patch_default_outer_level[0];
 245       }
 246    }
 247
 248    int st_index = -1;
 249    if (unlikely((INTEL_DEBUG & DEBUG_SHADER_TIME) && tep))
 250       st_index = brw_get_shader_time_index(brw, &tep->program, ST_TCS, true);
 251
 252    if (unlikely(brw->perf_debug)) {
 253       start_busy = brw->batch.last_bo && drm_intel_bo_busy(brw->batch.last_bo);
 254       start_time = get_time();
 255    }
 256
 257    unsigned program_size;
 258    char *error_str;
 259    const unsigned *program =
 260       brw_compile_tcs(compiler, brw, mem_ctx, key, &prog_data, nir, st_index,
 261                       &program_size, &error_str);
 262    if (program == NULL) {
 263       if (tep) {
 264          tep->program.sh.data->LinkStatus = false;
 265          ralloc_strcat(&tep->program.sh.data->InfoLog, error_str);
 266       }
 267
 268       _mesa_problem(NULL, "Failed to compile tessellation control shader: "
 269                     "%s\n", error_str);
 270
 271       ralloc_free(mem_ctx);
 272       return false;
 273    }
 274
 275    if (unlikely(brw->perf_debug)) {
 276       if (tcp) {
 277          if (tcp->compiled_once) {
 278             brw_tcs_debug_recompile(brw, &tcp->program, key);
 279          }
 280          tcp->compiled_once = true;
 281       }
 282
 283       if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
 284          perf_debug("TCS compile took %.03f ms and stalled the GPU\n",
 285                     (get_time() - start_time) * 1000);
 286       }
 287    }
 288
 289    /* Scratch space is used for register spilling */
 290    brw_alloc_stage_scratch(brw, stage_state,
 291                            prog_data.base.base.total_scratch,
 292                            devinfo->max_tcs_threads);
 293
 294    brw_upload_cache(&brw->cache, BRW_CACHE_TCS_PROG,
 295                     key, sizeof(*key),
 296                     program, program_size,
 297                     &prog_data, sizeof(prog_data),
 298                     &stage_state->prog_offset, &brw->tcs.base.prog_data);
 299    ralloc_free(mem_ctx);
 300
 301    return true;
 302 }
 303
 304 void
 305 brw_tcs_populate_key(struct brw_context *brw,
 306                      struct brw_tcs_prog_key *key)
 307 {
 308    struct brw_program *tcp = (struct brw_program *) brw->tess_ctrl_program;
 309    struct brw_program *tep = (struct brw_program *) brw->tess_eval_program;
 310    struct gl_program *tes_prog = &tep->program;
 311
 312    uint64_t per_vertex_slots = tes_prog->info.inputs_read;
 313    uint32_t per_patch_slots = tes_prog->info.patch_inputs_read;
 314
 315    memset(key, 0, sizeof(*key));
 316
 317    if (tcp) {
 318       struct gl_program *prog = &tcp->program;
 319       per_vertex_slots |= prog->info.outputs_written;
 320       per_patch_slots |= prog->info.patch_outputs_written;
 321    }
 322
 323    if (brw->gen < 8 || !tcp)
 324       key->input_vertices = brw->ctx.TessCtrlProgram.patch_vertices;
 325    key->outputs_written = per_vertex_slots;
 326    key->patch_outputs_written = per_patch_slots;
 327
 328    /* We need to specialize our code generation for tessellation levels
 329     * based on the domain the DS is expecting to tessellate.
 330     */
 331    key->tes_primitive_mode = tep->program.info.tes.primitive_mode;
 332    key->quads_workaround = brw->gen < 9 &&
 333                            tep->program.info.tes.primitive_mode == GL_QUADS &&
 334                            tep->program.info.tes.spacing == GL_EQUAL;
 335
 336    if (tcp) {
 337       key->program_string_id = tcp->id;
 338
 339       /* _NEW_TEXTURE */
 340       brw_populate_sampler_prog_key_data(&brw->ctx, &tcp->program, &key->tex);
 341    }
 342 }
 343
 344 void
 345 brw_upload_tcs_prog(struct brw_context *brw)
 346 {
 347    struct brw_stage_state *stage_state = &brw->tcs.base;
 348    struct brw_tcs_prog_key key;
 349    /* BRW_NEW_TESS_PROGRAMS */
 350    struct brw_program *tcp = (struct brw_program *) brw->tess_ctrl_program;
 351    MAYBE_UNUSED struct brw_program *tep =
 352       (struct brw_program *) brw->tess_eval_program;
 353    assert(tep);
 354
 355    if (!brw_state_dirty(brw,
 356                         _NEW_TEXTURE,
 357                         BRW_NEW_PATCH_PRIMITIVE |
 358                         BRW_NEW_TESS_PROGRAMS))
 359       return;
 360
 361    brw_tcs_populate_key(brw, &key);
 362
 363    if (!brw_search_cache(&brw->cache, BRW_CACHE_TCS_PROG,
 364                          &key, sizeof(key),
 365                          &stage_state->prog_offset,
 366                          &brw->tcs.base.prog_data)) {
 367       bool success = brw_codegen_tcs_prog(brw, tcp, tep, &key);
 368       assert(success);
 369       (void)success;
 370    }
 371 }
 372
 373
 374 bool
 375 brw_tcs_precompile(struct gl_context *ctx,
 376                    struct gl_shader_program *shader_prog,
 377                    struct gl_program *prog)
 378 {
 379    struct brw_context *brw = brw_context(ctx);
 380    struct brw_tcs_prog_key key;
 381    uint32_t old_prog_offset = brw->tcs.base.prog_offset;
 382    struct brw_stage_prog_data *old_prog_data = brw->tcs.base.prog_data;
 383    bool success;
 384
 385    struct brw_program *btcp = brw_program(prog);
 386    const struct gl_linked_shader *tes =
 387       shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
 388
 389    memset(&key, 0, sizeof(key));
 390
 391    key.program_string_id = btcp->id;
 392    brw_setup_tex_for_precompile(brw, &key.tex, prog);
 393
 394    /* Guess that the input and output patches have the same dimensionality. */
 395    if (brw->gen < 8) {
 396       key.input_vertices = shader_prog->
 397          _LinkedShaders[MESA_SHADER_TESS_CTRL]->info.TessCtrl.VerticesOut;
 398    }
 399
 400    struct brw_program *btep;
 401    if (tes) {
 402       btep = brw_program(tes->Program);
 403       key.tes_primitive_mode = tes->info.TessEval.PrimitiveMode;
 404       key.quads_workaround = brw->gen < 9 &&
 405                              tes->info.TessEval.PrimitiveMode == GL_QUADS &&
 406                              tes->info.TessEval.Spacing == GL_EQUAL;
 407    } else {
 408       btep = NULL;
 409       key.tes_primitive_mode = GL_TRIANGLES;
 410    }
 411
 412    key.outputs_written = prog->nir->info->outputs_written;
 413    key.patch_outputs_written = prog->nir->info->patch_outputs_written;
 414
 415    success = brw_codegen_tcs_prog(brw, btcp, btep, &key);
 416
 417    brw->tcs.base.prog_offset = old_prog_offset;
 418    brw->tcs.base.prog_data = old_prog_data;
 419
 420    return success;
 421 }