i965: Access TES shader info via NIR.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_tes.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 /**
25 * \file brw_tes.c
26 *
27 * Tessellation evaluation shader state upload code.
28 */
29
30 #include "brw_context.h"
31 #include "brw_nir.h"
32 #include "brw_program.h"
33 #include "brw_shader.h"
34 #include "brw_state.h"
35 #include "program/prog_parameter.h"
36
37 static void
38 brw_tes_debug_recompile(struct brw_context *brw, struct gl_program *prog,
39 const struct brw_tes_prog_key *key)
40 {
41 struct brw_cache_item *c = NULL;
42 const struct brw_tes_prog_key *old_key = NULL;
43 bool found = false;
44
45 perf_debug("Recompiling tessellation evaluation shader for program %d\n",
46 prog->Id);
47
48 for (unsigned int i = 0; i < brw->cache.size; i++) {
49 for (c = brw->cache.items[i]; c; c = c->next) {
50 if (c->cache_id == BRW_CACHE_TES_PROG) {
51 old_key = c->key;
52
53 if (old_key->program_string_id == key->program_string_id)
54 break;
55 }
56 }
57 if (c)
58 break;
59 }
60
61 if (!c) {
62 perf_debug(" Didn't find previous compile in the shader cache for "
63 "debug\n");
64 return;
65 }
66
67 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
68 found |= key_debug(brw, "inputs read", old_key->inputs_read,
69 key->inputs_read);
70 found |= key_debug(brw, "patch inputs read", old_key->patch_inputs_read,
71 key->patch_inputs_read);
72
73 if (!found) {
74 perf_debug(" Something else\n");
75 }
76 }
77
78 static bool
79 brw_codegen_tes_prog(struct brw_context *brw,
80 struct brw_program *tep,
81 struct brw_tes_prog_key *key)
82 {
83 const struct brw_compiler *compiler = brw->screen->compiler;
84 const struct gen_device_info *devinfo = &brw->screen->devinfo;
85 struct brw_stage_state *stage_state = &brw->tes.base;
86 nir_shader *nir = tep->program.nir;
87 struct brw_tes_prog_data prog_data;
88 bool start_busy = false;
89 double start_time = 0;
90
91 memset(&prog_data, 0, sizeof(prog_data));
92
93 brw_assign_common_binding_table_offsets(devinfo, &tep->program,
94 &prog_data.base.base, 0);
95
96 STATIC_ASSERT(BRW_TESS_PARTITIONING_INTEGER == TESS_SPACING_EQUAL - 1);
97 STATIC_ASSERT(BRW_TESS_PARTITIONING_ODD_FRACTIONAL ==
98 TESS_SPACING_FRACTIONAL_ODD - 1);
99 STATIC_ASSERT(BRW_TESS_PARTITIONING_EVEN_FRACTIONAL ==
100 TESS_SPACING_FRACTIONAL_EVEN - 1);
101
102 prog_data.partitioning = nir->info->tes.spacing - 1;
103
104 switch (nir->info->tes.primitive_mode) {
105 case GL_QUADS:
106 prog_data.domain = BRW_TESS_DOMAIN_QUAD;
107 break;
108 case GL_TRIANGLES:
109 prog_data.domain = BRW_TESS_DOMAIN_TRI;
110 break;
111 case GL_ISOLINES:
112 prog_data.domain = BRW_TESS_DOMAIN_ISOLINE;
113 break;
114 default:
115 unreachable("invalid domain shader primitive mode");
116 }
117
118 if (nir->info->tes.point_mode) {
119 prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_POINT;
120 } else if (nir->info->tes.primitive_mode == GL_ISOLINES) {
121 prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_LINE;
122 } else {
123 /* Hardware winding order is backwards from OpenGL */
124 prog_data.output_topology =
125 nir->info->tes.ccw ? BRW_TESS_OUTPUT_TOPOLOGY_TRI_CW
126 : BRW_TESS_OUTPUT_TOPOLOGY_TRI_CCW;
127 }
128
129 /* Allocate the references to the uniforms that will end up in the
130 * prog_data associated with the compiled program, and which will be freed
131 * by the state cache.
132 *
133 * Note: param_count needs to be num_uniform_components * 4, since we add
134 * padding around uniform values below vec4 size, so the worst case is that
135 * every uniform is a float which gets padded to the size of a vec4.
136 */
137 int param_count = nir->num_uniforms / 4;
138
139 prog_data.base.base.param =
140 rzalloc_array(NULL, const gl_constant_value *, param_count);
141 prog_data.base.base.pull_param =
142 rzalloc_array(NULL, const gl_constant_value *, param_count);
143 prog_data.base.base.image_param =
144 rzalloc_array(NULL, struct brw_image_param,
145 tep->program.info.num_images);
146 prog_data.base.base.nr_params = param_count;
147 prog_data.base.base.nr_image_params = tep->program.info.num_images;
148
149 brw_nir_setup_glsl_uniforms(nir, &tep->program, &prog_data.base.base,
150 compiler->scalar_stage[MESA_SHADER_TESS_EVAL]);
151
152 int st_index = -1;
153 if (unlikely(INTEL_DEBUG & DEBUG_SHADER_TIME))
154 st_index = brw_get_shader_time_index(brw, &tep->program, ST_TES, true);
155
156 if (unlikely(brw->perf_debug)) {
157 start_busy = brw->batch.last_bo && drm_intel_bo_busy(brw->batch.last_bo);
158 start_time = get_time();
159 }
160
161 void *mem_ctx = ralloc_context(NULL);
162 unsigned program_size;
163 char *error_str;
164 const unsigned *program =
165 brw_compile_tes(compiler, brw, mem_ctx, key, &prog_data, nir,
166 &tep->program, st_index, &program_size, &error_str);
167 if (program == NULL) {
168 tep->program.sh.data->LinkStatus = false;
169 ralloc_strcat(&tep->program.sh.data->InfoLog, error_str);
170
171 _mesa_problem(NULL, "Failed to compile tessellation evaluation shader: "
172 "%s\n", error_str);
173
174 ralloc_free(mem_ctx);
175 return false;
176 }
177
178 if (unlikely(brw->perf_debug)) {
179 if (tep->compiled_once) {
180 brw_tes_debug_recompile(brw, &tep->program, key);
181 }
182 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
183 perf_debug("TES compile took %.03f ms and stalled the GPU\n",
184 (get_time() - start_time) * 1000);
185 }
186 tep->compiled_once = true;
187 }
188
189 /* Scratch space is used for register spilling */
190 brw_alloc_stage_scratch(brw, stage_state,
191 prog_data.base.base.total_scratch,
192 devinfo->max_tes_threads);
193
194 brw_upload_cache(&brw->cache, BRW_CACHE_TES_PROG,
195 key, sizeof(*key),
196 program, program_size,
197 &prog_data, sizeof(prog_data),
198 &stage_state->prog_offset, &brw->tes.base.prog_data);
199 ralloc_free(mem_ctx);
200
201 return true;
202 }
203
204 void
205 brw_tes_populate_key(struct brw_context *brw,
206 struct brw_tes_prog_key *key)
207 {
208 struct brw_program *tcp = (struct brw_program *) brw->tess_ctrl_program;
209 struct brw_program *tep = (struct brw_program *) brw->tess_eval_program;
210 struct gl_program *prog = &tep->program;
211
212 uint64_t per_vertex_slots = prog->info.inputs_read;
213 uint32_t per_patch_slots = prog->info.patch_inputs_read;
214
215 memset(key, 0, sizeof(*key));
216
217 key->program_string_id = tep->id;
218
219 /* The TCS may have additional outputs which aren't read by the
220 * TES (possibly for cross-thread communication). These need to
221 * be stored in the Patch URB Entry as well.
222 */
223 if (tcp) {
224 struct gl_program *tcp_prog = &tcp->program;
225 per_vertex_slots |= tcp_prog->info.outputs_written &
226 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
227 per_patch_slots |= tcp_prog->info.patch_outputs_written;
228 }
229
230 key->inputs_read = per_vertex_slots;
231 key->patch_inputs_read = per_patch_slots;
232
233 /* _NEW_TEXTURE */
234 brw_populate_sampler_prog_key_data(&brw->ctx, prog, &key->tex);
235 }
236
237 void
238 brw_upload_tes_prog(struct brw_context *brw)
239 {
240 struct brw_stage_state *stage_state = &brw->tes.base;
241 struct brw_tes_prog_key key;
242 /* BRW_NEW_TESS_PROGRAMS */
243 struct brw_program *tep = (struct brw_program *) brw->tess_eval_program;
244
245 if (!brw_state_dirty(brw,
246 _NEW_TEXTURE,
247 BRW_NEW_TESS_PROGRAMS))
248 return;
249
250 brw_tes_populate_key(brw, &key);
251
252 if (!brw_search_cache(&brw->cache, BRW_CACHE_TES_PROG,
253 &key, sizeof(key),
254 &stage_state->prog_offset,
255 &brw->tes.base.prog_data)) {
256 bool success = brw_codegen_tes_prog(brw, tep, &key);
257 assert(success);
258 (void)success;
259 }
260 }
261
262
263 bool
264 brw_tes_precompile(struct gl_context *ctx,
265 struct gl_shader_program *shader_prog,
266 struct gl_program *prog)
267 {
268 struct brw_context *brw = brw_context(ctx);
269 struct brw_tes_prog_key key;
270 uint32_t old_prog_offset = brw->tes.base.prog_offset;
271 struct brw_stage_prog_data *old_prog_data = brw->tes.base.prog_data;
272 bool success;
273
274 struct brw_program *btep = brw_program(prog);
275
276 memset(&key, 0, sizeof(key));
277
278 key.program_string_id = btep->id;
279 key.inputs_read = prog->nir->info->inputs_read;
280 key.patch_inputs_read = prog->nir->info->patch_inputs_read;
281
282 if (shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) {
283 struct gl_program *tcp =
284 shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program;
285 key.inputs_read |= tcp->nir->info->outputs_written &
286 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
287 key.patch_inputs_read |= tcp->nir->info->patch_outputs_written;
288 }
289
290 brw_setup_tex_for_precompile(brw, &key.tex, prog);
291
292 success = brw_codegen_tes_prog(brw, btep, &key);
293
294 brw->tes.base.prog_offset = old_prog_offset;
295 brw->tes.base.prog_data = old_prog_data;
296
297 return success;
298 }