src/mesa/drivers/dri/i965/brw_tex_layout.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 /* Code to layout images in a mipmap tree for i965.
  33  */
  34
  35 #include "intel_mipmap_tree.h"
  36 #include "intel_tex_layout.h"
  37 #include "intel_context.h"
  38 #include "main/macros.h"
  39
  40 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
  41
  42 static void
  43 brw_miptree_layout_texture_array(struct intel_context *intel,
  44                                  struct intel_mipmap_tree *mt)
  45 {
  46    GLuint align_w;
  47    GLuint align_h;
  48    GLuint level;
  49    GLuint qpitch = 0;
  50    int h0, h1, q;
  51
  52    intel_get_texture_alignment_unit(mt->format, &align_w, &align_h);
  53
  54    h0 = ALIGN(mt->height0, align_h);
  55    h1 = ALIGN(minify(mt->height0), align_h);
  56    qpitch = (h0 + h1 + (intel->gen >= 7 ? 12 : 11) * align_h);
  57    if (mt->compressed)
  58       qpitch /= 4;
  59
  60    i945_miptree_layout_2d(mt);
  61
  62    for (level = mt->first_level; level <= mt->last_level; level++) {
  63       for (q = 0; q < mt->depth0; q++) {
  64          intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch);
  65       }
  66    }
  67    mt->total_height = qpitch * mt->depth0;
  68 }
  69
  70 void
  71 brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt)
  72 {
  73    /* XXX: these vary depending on image format: */
  74    /* GLint align_w = 4; */
  75
  76    switch (mt->target) {
  77    case GL_TEXTURE_CUBE_MAP:
  78       if (intel->gen >= 5) {
  79          /* On Ironlake, cube maps are finally represented as just a series of
  80           * MIPLAYOUT_BELOW 2D textures (like 2D texture arrays), separated by a
  81           * pitch of qpitch rows, where qpitch is defined by the equation given
  82           * in Volume 1 of the BSpec.
  83           */
  84          brw_miptree_layout_texture_array(intel, mt);
  85          break;
  86       }
  87       /* FALLTHROUGH */
  88
  89    case GL_TEXTURE_3D: {
  90       GLuint width  = mt->width0;
  91       GLuint height = mt->height0;
  92       GLuint depth = mt->depth0;
  93       GLuint pack_x_pitch, pack_x_nr;
  94       GLuint pack_y_pitch;
  95       GLuint level;
  96       GLuint align_h = 2;
  97       GLuint align_w = 4;
  98
  99       mt->total_height = 0;
 100       intel_get_texture_alignment_unit(mt->format, &align_w, &align_h);
 101
 102       if (mt->compressed) {
 103           mt->total_width = ALIGN(width, align_w);
 104           pack_y_pitch = (height + 3) / 4;
 105       } else {
 106          mt->total_width = mt->width0;
 107          pack_y_pitch = ALIGN(mt->height0, align_h);
 108       }
 109
 110       pack_x_pitch = width;
 111       pack_x_nr = 1;
 112
 113       for (level = mt->first_level ; level <= mt->last_level ; level++) {
 114          GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6;
 115          GLint x = 0;
 116          GLint y = 0;
 117          GLint q, j;
 118
 119          intel_miptree_set_level_info(mt, level,
 120                                       0, mt->total_height,
 121                                       width, height, depth);
 122
 123          for (q = 0; q < nr_images;) {
 124             for (j = 0; j < pack_x_nr && q < nr_images; j++, q++) {
 125                intel_miptree_set_image_offset(mt, level, q, x, y);
 126                x += pack_x_pitch;
 127             }
 128
 129             x = 0;
 130             y += pack_y_pitch;
 131          }
 132
 133
 134          mt->total_height += y;
 135          width  = minify(width);
 136          height = minify(height);
 137          depth  = minify(depth);
 138
 139          if (mt->compressed) {
 140             pack_y_pitch = (height + 3) / 4;
 141
 142             if (pack_x_pitch > ALIGN(width, align_w)) {
 143                pack_x_pitch = ALIGN(width, align_w);
 144                pack_x_nr <<= 1;
 145             }
 146          } else {
 147             if (pack_x_pitch > 4) {
 148                pack_x_pitch >>= 1;
 149                pack_x_nr <<= 1;
 150                assert(pack_x_pitch * pack_x_nr <= mt->total_width);
 151             }
 152
 153             if (pack_y_pitch > 2) {
 154                pack_y_pitch >>= 1;
 155                pack_y_pitch = ALIGN(pack_y_pitch, align_h);
 156             }
 157          }
 158
 159       }
 160       /* The 965's sampler lays cachelines out according to how accesses
 161        * in the texture surfaces run, so they may be "vertical" through
 162        * memory.  As a result, the docs say in Surface Padding Requirements:
 163        * Sampling Engine Surfaces that two extra rows of padding are required.
 164        */
 165       if (mt->target == GL_TEXTURE_CUBE_MAP)
 166          mt->total_height += 2;
 167       break;
 168    }
 169
 170    case GL_TEXTURE_2D_ARRAY:
 171    case GL_TEXTURE_1D_ARRAY:
 172       brw_miptree_layout_texture_array(intel, mt);
 173       break;
 174
 175    default:
 176       i945_miptree_layout_2d(mt);
 177       break;
 178    }
 179    DBG("%s: %dx%dx%d\n", __FUNCTION__,
 180        mt->total_width, mt->total_height, mt->cpp);
 181 }
 182