Merge branch 'gallium-nopointsizeminmax'
[mesa.git] / src / mesa / drivers / dri / i965 / brw_tex_layout.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 /* Code to layout images in a mipmap tree for i965.
33 */
34
35 #include "intel_mipmap_tree.h"
36 #include "intel_tex_layout.h"
37 #include "intel_context.h"
38 #include "main/macros.h"
39
40 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
41
42 GLboolean brw_miptree_layout(struct intel_context *intel,
43 struct intel_mipmap_tree *mt,
44 uint32_t tiling)
45 {
46 /* XXX: these vary depending on image format: */
47 /* GLint align_w = 4; */
48
49 switch (mt->target) {
50 case GL_TEXTURE_CUBE_MAP:
51 if (intel->is_ironlake) {
52 GLuint align_h = 2, align_w = 4;
53 GLuint level;
54 GLuint x = 0;
55 GLuint y = 0;
56 GLuint width = mt->width0;
57 GLuint height = mt->height0;
58 GLuint qpitch = 0;
59 GLuint y_pitch = 0;
60
61 mt->pitch = mt->width0;
62 intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
63 y_pitch = ALIGN(height, align_h);
64
65 if (mt->compressed) {
66 mt->pitch = ALIGN(mt->width0, align_w);
67 }
68
69 if (mt->first_level != mt->last_level) {
70 GLuint mip1_width;
71
72 if (mt->compressed) {
73 mip1_width = ALIGN(minify(mt->width0), align_w)
74 + ALIGN(minify(minify(mt->width0)), align_w);
75 } else {
76 mip1_width = ALIGN(minify(mt->width0), align_w)
77 + minify(minify(mt->width0));
78 }
79
80 if (mip1_width > mt->pitch) {
81 mt->pitch = mip1_width;
82 }
83 }
84
85 mt->pitch = intel_miptree_pitch_align(intel, mt, tiling, mt->pitch);
86
87 if (mt->compressed) {
88 qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4;
89 mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * 6;
90 } else {
91 qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h);
92 mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * 6;
93 }
94
95 for (level = mt->first_level; level <= mt->last_level; level++) {
96 GLuint img_height;
97 GLuint nr_images = 6;
98 GLuint q = 0;
99
100 intel_miptree_set_level_info(mt, level, nr_images, x, y, width,
101 height, 1);
102
103 for (q = 0; q < nr_images; q++)
104 intel_miptree_set_image_offset(mt, level, q,
105 x, y + q * qpitch);
106
107 if (mt->compressed)
108 img_height = MAX2(1, height/4);
109 else
110 img_height = ALIGN(height, align_h);
111
112 if (level == mt->first_level + 1) {
113 x += ALIGN(width, align_w);
114 }
115 else {
116 y += img_height;
117 }
118
119 width = minify(width);
120 height = minify(height);
121 }
122
123 break;
124 }
125
126 case GL_TEXTURE_3D: {
127 GLuint width = mt->width0;
128 GLuint height = mt->height0;
129 GLuint depth = mt->depth0;
130 GLuint pack_x_pitch, pack_x_nr;
131 GLuint pack_y_pitch;
132 GLuint level;
133 GLuint align_h = 2;
134 GLuint align_w = 4;
135
136 mt->total_height = 0;
137 intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
138
139 if (mt->compressed) {
140 mt->pitch = ALIGN(width, align_w);
141 pack_y_pitch = (height + 3) / 4;
142 } else {
143 mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
144 pack_y_pitch = ALIGN(mt->height0, align_h);
145 }
146
147 pack_x_pitch = width;
148 pack_x_nr = 1;
149
150 for (level = mt->first_level ; level <= mt->last_level ; level++) {
151 GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6;
152 GLint x = 0;
153 GLint y = 0;
154 GLint q, j;
155
156 intel_miptree_set_level_info(mt, level, nr_images,
157 0, mt->total_height,
158 width, height, depth);
159
160 for (q = 0; q < nr_images;) {
161 for (j = 0; j < pack_x_nr && q < nr_images; j++, q++) {
162 intel_miptree_set_image_offset(mt, level, q, x, y);
163 x += pack_x_pitch;
164 }
165
166 x = 0;
167 y += pack_y_pitch;
168 }
169
170
171 mt->total_height += y;
172 width = minify(width);
173 height = minify(height);
174 depth = minify(depth);
175
176 if (mt->compressed) {
177 pack_y_pitch = (height + 3) / 4;
178
179 if (pack_x_pitch > ALIGN(width, align_w)) {
180 pack_x_pitch = ALIGN(width, align_w);
181 pack_x_nr <<= 1;
182 }
183 } else {
184 if (pack_x_pitch > 4) {
185 pack_x_pitch >>= 1;
186 pack_x_nr <<= 1;
187 assert(pack_x_pitch * pack_x_nr <= mt->pitch);
188 }
189
190 if (pack_y_pitch > 2) {
191 pack_y_pitch >>= 1;
192 pack_y_pitch = ALIGN(pack_y_pitch, align_h);
193 }
194 }
195
196 }
197 /* The 965's sampler lays cachelines out according to how accesses
198 * in the texture surfaces run, so they may be "vertical" through
199 * memory. As a result, the docs say in Surface Padding Requirements:
200 * Sampling Engine Surfaces that two extra rows of padding are required.
201 * We don't know of similar requirements for pre-965, but given that
202 * those docs are silent on padding requirements in general, let's play
203 * it safe.
204 */
205 if (mt->target == GL_TEXTURE_CUBE_MAP)
206 mt->total_height += 2;
207 break;
208 }
209
210 default:
211 i945_miptree_layout_2d(intel, mt, tiling);
212 break;
213 }
214 DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
215 mt->pitch,
216 mt->total_height,
217 mt->cpp,
218 mt->pitch * mt->total_height * mt->cpp );
219
220 return GL_TRUE;
221 }
222